39results about "Semiconductor characterisation" patented technology

The invention relates to the technical field of semiconductor material preparation, and discloses a preparation and passivation process of a carrier decay time standard sample wafer, which comprises the following steps: preparing a passivation precursor solution; carrying out pretreatment on the semiconductor substrate; applying the passivation precursor solution to the surface of the semiconductor substrate in a spin-coating deposition mode to form a wet film; performing low-temperature gelation treatment on the wet film to form a solid gel film; two-stage annealing treatment is carried out on the semiconductor substrate with the solid gel film, the first-stage annealing is carried out in a high-purity nitrogen atmosphere carrying heavy water vapor, and the second-stage annealing is carried out in a high-purity dry nitrogen atmosphere; and cooling the semiconductor substrate subjected to the two-stage annealing treatment. The passivation layer with high stability, long service life and low cost is prepared through heavy water vapor passivation and two-stage annealing processes.

The invention belongs to the technical field of reliability analysis of devices, and particularly relates to a quantitative analysis method for migration characteristics of an indium component in an epitaxial wafer. Comprising the following steps: providing epitaxial wafers with consistent initial characteristics, and carrying out uniform cleavage; taking one small block as a reference sample, and performing external disturbance treatment on other small blocks; the method comprises the following steps: respectively carrying out non-destructive structure characterization treatment on a reference sample and a sample subjected to external disturbance treatment, including high-resolution X-ray diffraction test, photoluminescence and cathode fluorescence combined test and time-resolved photoluminescence spectrum measurement; comprising high-resolution transmission electron microscope and EDS energy spectrum combined imaging and secondary ion mass spectrum; finally, FP lasers are prepared respectively, and electrical characterization processing is carried out. And quantitatively analyzing the influence of indium component migration on the electrical properties of the FP laser according to the result. The method has the advantages that the migration of indium atoms is analyzed according to a method for changing the microstructure in the quantum well and changing the dynamic behavior of a carrier.

The application discloses a kind of gallium nitride-based double heterojunction HEMT field effect mobility characterization method, including the HEMT to be tested is prepared as the HEMT of fat-FET structure, wherein the HEMT to be tested is gallium nitride-based double heterojunction HEMT, the HEMT of fat-FET structure is the gallium nitride-based double heterojunction HEMT of fat-FET structure.Canal conductance test is carried out to the HEMT of fat-FET structure;The CV characteristic curve of the HEMT of fat-FET structure is tested to obtain first capacitance-voltage variation curve;First capacitance-voltage variation curve is processed by addition;According to preset formula, the field effect mobility-gate voltage curve of upper channel and lower channel is obtained;The electron surface density-gate voltage curve of upper channel and lower channel is obtained respectively;The field effect mobility-electron surface density curve of upper channel and lower channel is obtained respectively.The application can characterize the specific field effect mobility of upper channel and lower channel respectively, improve the characterization accuracy of the field effect mobility of gallium nitride-based double heterojunction HEMT, and be beneficial to the characteristic analysis and process optimization of gallium nitride-based double heterojunction HEMT.

A position measurement method includes: performing a calibration operation; and measuring a position of a stage according to a mapping table so as to control movement of the stage during an inspection operation. Performing the calibration operation includes: moving the stage along an axis; measuring N sets of first values, wherein each set of first values includes a first distance between a first mirror and a first laser interferometer and a second distance between the first mirror and a second laser interferometer; measuring N sets of second values, wherein each set of second values includes a third distance between a second mirror and a third laser interferometer and a fourth distance between the second mirror and a fourth laser interferometer; obtaining a flatness profile of the first mirror along the axis according to the first values and the second values; and generating the mapping table according to the flatness profile.

The invention relates to various devices and methods for preventing the injection of a substrate current into the substrate sub of a CMOS circuit. For this purpose, the devices implement different methods for preventing such injection. They detect the potential of a contact (PDH, PDL) of the integrated CMOS circuit, compare the value of the detected potential with a reference value, and connect the contact (PDH, PDL) to a leakage circuit node (ABK) to drain the current, so that it does not flow through the parasitic bipolar lateral structure, i.e., not into the substrate. The leakage circuit node can be connected, for example, to the reference potential line (GND) or to another line that has a higher potential than that of the reference potential line (GND). This electrical connection is then activated or...initiated when the value of the contact potential (PDH, PDL) is below or equal to a reference value, where this reference value is below the potential of the substrate Sub and / or below the potential of the reference potential line (GND) or the other line mentioned above.

The application discloses a kind of semiconductor material eddy conductivity testing methods with cooling function, including the silicon wafer to be measured motion to be measured site, the conductivity probe is moved to the measured site, while using the cooling spray head cooling spray, according to the vortex cold gas calibration curve, determine the gas supply amount required to be provided by the cooling spray head, while according to the standard relationship curve between the current in the existing passive coil and the conductivity of the standard silicon wafer determines the conductivity of the measured site;The application utilizes the hollow part of active electromagnetic coil, by installing cooling spray head in hollow part, according to the heat quantity of material, a certain flow and pressure cooling air is passed in, the heat of semiconductor material surface is promptly exported, ensure that the temperature of semiconductor material surface is in specified range, improve the measurement accuracy of conductivity tester.

The invention relates to the technical field of semiconductor material detection equipment, and discloses a broadband microwave probe device for measuring attenuation characteristics of current carriers. The outer wall of the detection pen is fixedly connected with a limiting ring, and one end of the detection pen is provided with a probe; the switching mechanism is mounted on one side of the probe pen; the switching mechanism comprises a limiting frame; the lifting mechanism is mounted on one side of the lifting mechanism; the moving mechanism is installed on one side of the moving mechanism, and the moving mechanism is connected with a supporting table through a supporting column; the fixing mechanism is mounted in the supporting table; the adjusting mechanism is mounted in the same side of the supporting table and the fixing mechanism; and the feeding mechanism is mounted on the upper surface of the supporting table. A limiting frame is driven to move through movement of a second connecting frame, the limiting frame pushes a first limiting rod, one end of the first limiting rod rotates in the limiting frame, then a fixing plate is pulled to be taken out of the limiting frame, and the effect of replacing the probe is achieved.

The invention relates to the technical field of semiconductor manufacturing and testing, in particular to a wafer edge sheet resistance testing method based on an eddy current method probe, and the method comprises the steps: 1, scanning a wafer according to computer vision, and carrying out the modeling of the wafer; step 2, digital twinning construction and synchronous calibration; step 3, pre-simulation and edge correction library construction; step 4, motion control and real-time edge processing; 5, dynamic compensation and square resistance calculation are carried out; step 6, generating a full-wafer sheet resistance distribution map and outputting data; step 7, testing data feedback and model iterative optimization; according to the method, the wafer-equipment integrated digital twinborn model is constructed, and the probe coordinate-edge effect correction coefficient mapping relation library is pre-established by utilizing finite element simulation, so that accurate dynamic compensation can be performed for near-edge vortex field distortion in an actual test; the systematic measurement error caused by incomplete physical field in the edge area in the traditional eddy current method is effectively overcome, and the accuracy and repeatability of the edge sheet resistance test are remarkably improved.

The application discloses a kind of carrier effective diffusion length test method and test system.The test method includes: providing first epitaxial structure and second epitaxial structure;Make laser respectively irradiation produce photo-generated carrier, diffuse to multiple quantum well layer and produce recombination luminescence, form photoluminescence spectrum;Based on photoluminescence spectrum, obtain first photoluminescence intensity, second photoluminescence intensity;Based on the correlation with the thickness of corresponding test layer, calculate the carrier effective diffusion length in test layer.The test method provided by the application does not need to cut the fragment, is more convenient for practical application, and is also expected to be used for whole piece multi-point scanning type test;Test cost is low, method is simple, and operability is strong;Evaluation obtained is the carrier effective diffusion length in test layer, reflects the carrier transport capacity of epitaxial layer as a whole;Test obtained is the diffusion length in the direction perpendicular to the surface of epitaxial wafer, is favorable for directly reflecting the carrier transport characteristics of vertical device.

The invention relates to the technical field of semiconductor testing and metering, and discloses a standard sample carrier lifetime valuing method and traceability system, and the method comprises the following steps: positioning a sample to be tested, stabilizing the environment, and initializing the system; constructing a periodically modulated acoustic potential well in the sample body, and exciting a coherent quantum state at the center of the potential well by using a coherent double-pulse sequence; a returned optical signal is collected, and an attenuation envelope of the returned optical signal is extracted through a differential locking demodulation technology; physical self-consistency verification is carried out through a rotating acoustic field stress axis, and attenuation envelope fitting is carried out to extract carrier life parameters; and performing statistical analysis on the multiple groups of parameters to determine a final constant value, and constructing a quantity value tracing chain to a frequency reference. According to the invention, the three-dimensional acoustic standing wave field is adopted to construct the acoustic potential well in the sample sheet material, and the photon-generated carriers are confined in the sample sheet in a non-contact manner, so that the direct measurement of the carrier body lifetime is realized, and the defect that the measurement result is seriously influenced by the surface state of the sample sheet is overcome.

The invention relates to various devices and methods for preventing the injection of a substrate current into the substrate sub of a CMOS circuit. For this purpose, the devices implement different methods for preventing such injection. They detect the potential of a contact (PDH, PDL) of the integrated CMOS circuit, compare the value of the detected potential with a reference value, and connect the contact (PDH, PDL) to a leakage circuit node (ABK) to drain the current, so that it does not flow through the parasitic bipolar lateral structure, i.e., not into the substrate. The leakage circuit node can be connected, for example, to the reference potential line (GND) or to another line that has a higher potential than that of the reference potential line (GND). This electrical connection is then activated or...initiated when the potential value of the contact (PDH, PDL) is below or equal to a reference value, where this reference value is below the potential value of the substrate Sub and / or below the potential value of the reference potential line (GND) or the other line mentioned above.

The invention discloses a wafer film carrier characteristic measurement sample table integrated with a temperature control function, and relates to the technical field of wafer films, the wafer film carrier characteristic measurement sample table comprises a measurement table main body, the outer wall of the measurement table main body is fixedly connected with a temperature control box, and the inner wall of the measurement table main body is fixedly connected with a main body shell; a plurality of bearing assemblies are distributed on the top of the main body shell in an arc-shaped array mode, a plurality of fixing mechanisms are distributed on the outer wall of the main body shell in an arc-shaped array mode, and a hot air mechanism is arranged on the inner wall of the main body shell. According to the wafer film carrier characteristic measurement sample stage integrated with the temperature control function, the fixed mechanism and the hot air mechanism are arranged, and a wafer film-substrate complex as a wafer film carrier characteristic measurement object is directionally heated in a hot air non-contact mode; and a fixing mechanism for fixing the wafer film-substrate complex is in a non-contact mode, so that deformation caused by heating expansion of the clamp is prevented.

The invention relates to a method and a system for identifying influence of epitaxial wafer defects on performance of a SiC device in the technical field of semiconductors. The method comprises the following steps: acquiring photoluminescence parameters of an epitaxial wafer of the SiC device through NUV-PL scanning; determining a sharp corner direction of the triangular epitaxial wafer defect based on a scanning result of NUV-PL scanning, and determining a step flow direction of the SiC device based on the sharp corner direction; determining a first orientation of the defect of the triangular epitaxial wafer in the SiC device based on the step flow direction, and determining a second orientation of the defect of the triangular epitaxial wafer in the SiC device based on the photoluminescence parameter; obtaining the defect position of the triangular epitaxial wafer based on the first orientation and the second orientation; and obtaining a device performance influence result according to the defect position, thereby solving the problem that the influence degree of the performance of the SiC device influenced by the defect of the epitaxial wafer cannot be judged because the defect position of the epitaxial wafer cannot be identified in the manufacturing process of the existing SiC device.

The application discloses a carrier concentration gallium-based liquid metal measuring probe, a conductive wire is connected with a tungsten carbide rod, one end of the tungsten carbide rod is inserted into a liquid metal container made of a corrosion-resistant material, the liquid metal container is provided with a through cavity and a capillary, and the cavity is communicated with the capillary; the cavity is filled with gallium-based liquid metal, the gallium-based liquid metal is immersed in the tungsten carbide rod, and a measuring probe is formed by using the gallium-based liquid metal in the capillary, so that the safety and environmental protection of the probe are solved; the measuring probe is in surface contact with a measuring sample, compared with point contact of a traditional probe, the contact area is increased, the repeatability of the measuring data is good, and the accuracy of the measuring data is improved; the container and the capillary of the liquid metal made of a corrosion-resistant material such as polytetrafluoroethylene are not corroded by the gallium-based alloy and are not adhered to the gallium-based liquid metal, the flowability of the gallium-based liquid metal is improved, and therefore the measuring precision is improved.

The invention provides a method and a device for measuring the diffusion length of a semiconductor material, and the method comprises the steps: enhancing the sensitivity of carrier space distribution to the diffusion length through a magnetic field, changing the magnetic field to enable the reflectivity of the material to change, obtaining () data, fitting the () data to a theoretical model, and obtaining the diffusion length of the semiconductor material. The accurate measurement of the diffusion length is realized; in addition, a sample is not contacted in the measurement process, so that nondestructive measurement is realized; in addition, magnetic field-optical cooperative modulation is used, the signal-to-noise ratio limitation of a traditional optical method is overcome, and the requirement for a measuring device is lowered.

The present disclosure relates to a steady-state microwave conductivity method that includes modulating a light beam to form an amplitude modulated light having a modulation frequency 1, producing a microwave waveform, exposing a sample to the amplitude modulated light and a first portion of the microwave waveform to produce an amplitude modulation signal on the first portion of the microwave waveform, and mixing a second portion of the microwave waveform and the amplitude modulation signal to produce a first signal and a second signal.

Provided is a semiconductor sample evaluation method which includes: acquiring a decay curve by subjecting a semiconductor sample being evaluated to measurement by means of a photoconductive decay method for multiple times while changing a surface charge density; applying signal data processing using a model formula including an exponential decay term and a constant term to at least one decay curve among the decay curves obtained by the multiple measurements; obtaining a recombination lifetime τeff of the semiconductor sample from an exponential decay formula obtained by the signal data processing; obtaining a quadratic function, in which a surface charge density-related value is represented by a variable x and a value related to the constant term is represented by a variable y, from measurement results obtained by the multiple measurements; and obtaining a surface recombination lifetime τs of the semiconductor sample from the quadratic function.

The present application relates to a kind of construction methods for the construction of multi-parameter constraint dispersion model for optical measurement, comprising: establishing physical optical model;Extract the external process parameters affecting physical parameters, establish the mapping relationship between external process parameters and physical parameters, and optimize physical optical model based on the mapping relationship;Sampling is carried out on external process parameters and structure parameters within the whole process window, and the corresponding theoretical optical response signal is generated in batches using physical optical model;The sampled external process parameters and theoretical optical response signal are used as the input of machine learning algorithm, and the mapping relationship between physical parameters and multiple external process parameters is used as the output, and the multi-parameter constraint dispersion model is pre-trained;Further optimize the multi-parameter constraint dispersion model by using the sampled external process parameters and the optical signal actually collected as input.The multi-parameter constraint dispersion model has good numerical stability, high robustness and compatibility with external process parameters.

This invention relates to the field of semiconductor material testing equipment technology, and discloses a broadband microwave probe device for measuring carrier attenuation characteristics, comprising: a probe pen, with a limiting ring fixedly connected to the outer wall of the probe pen, and a probe disposed at one end of the probe pen; a switching mechanism installed on one side of the probe pen; the switching mechanism including a limiting frame; a lifting mechanism installed on one side of the switching mechanism; a moving mechanism installed on one side of the lifting mechanism, the moving mechanism being connected to a support platform via a support column; a fixing mechanism installed inside the support platform; an adjusting mechanism installed inside the support platform on the same side as the fixing mechanism; and a feeding mechanism installed on the upper surface of the support platform. The movement of a connecting frame two drives the limiting frame to move, causing the limiting frame to push a limiting rod one, causing one end of the limiting rod one to rotate inside the limiting frame, and then pulling the fixing plate out of the limiting frame, thus achieving the effect of changing the probe.

The present application relates to a kind of device epitaxial layer parameter estimation method, system, power device structure in the field of semiconductor technology, comprising the following steps: calculating the total volume of device depletion region-depth function relationship formula;Based on total volume-depletion depth function relationship formula, obtain the capacitance-voltage function relationship formula of device, and based on capacitance-voltage function relationship formula, generate the apparent doping concentration-epitaxial depth function relationship formula of epitaxial layer;Through experimental test, obtain the capacitance-voltage characteristic data of device, and based on capacitance-voltage characteristic data, calculate the apparent doping concentration-epitaxial depth data of epitaxial layer;Using curve fitting method, fit apparent doping concentration-epitaxial depth function relationship formula and apparent doping concentration-epitaxial depth data, obtain the actual doping concentration and epitaxial thickness of device epitaxial layer, solve the problem of accurately calculating the doping concentration and thickness of device epitaxial layer without damaging device.

The invention provides a method for measuring the recombination lifetime of a depletion layer and the recombination lifetime of an inversion layer interface state of a semiconductor based on ac-SPV, and the method comprises the following steps: building an equivalent circuit model of the semiconductor in a strong inversion state; the equivalent circuit model characterizes the surface response of the semiconductor as depletion layer capacitance, depletion layer composite conductivity, inversion layer charge storage capacitance and inversion layer charge transfer conductivity which are connected in parallel; the light intensity of the incident laser is fixed, measurement is carried out under multiple modulation frequencies f, and ac-SPV signals under each frequency point are obtained; converting the measured signals into total conductance and total capacitance; a depletion layer composite conductance and an inversion layer charge transfer conductance are separated from the total conductance in combination with the known sum; substituting the multiple groups of omega and the corresponding data into a formula for curve fitting to obtain the composite life of the depletion layer; and the multiple groups of omega and corresponding data are substituted into a formula for curve fitting, and the inversion layer interface state composite life is obtained.

A system includes a semiconductor device that includes a source terminal, a drain terminal, and an interface layer between the source terminal and the drain terminal, the interface layer including a plurality of interface channels. The system also includes a degradation monitoring circuit that includes an electrical sensor, wherein the degradation monitoring circuit is configured to: generate, using the electrical sensor, a sensor signal corresponding to one or more interface channels of the plurality of interface channels; determine, based on the sensor signal, whether a degradation of a material is present at the one or more interface channels of the plurality of interface channels; and output information indicating whether the degradation of the material is present at the one or more interface channels of the plurality of interface channels.

Provided is a semiconductor sample evaluation method including acquiring, a plurality of times, a decay curve by performing measurement on a semiconductor sample which is an evaluation target in accordance with a photoconductive decay method while changing a surface charge density; performing signal data processing using a model expression including an exponential decay term and a constant term on at least one decay curve among decay curves obtained through the plurality of measurements; obtaining a recombination lifetime τeff of the semiconductor sample from an exponential decay expression obtained through the signal data processing; obtaining a quadratic function, in which a surface charge density related value is represented by a variable x and a value related to the constant term is represented by a variable y, from measurement results obtained through the plurality of measurements; and obtaining a surface recombination lifetime τs of the semiconductor sample from the quadratic function.

The invention relates to various devices and methods for preventing the injection of a substrate current into the substrate sub of a CMOS circuit. For this purpose, the devices implement different methods for preventing such injection. They detect the potential of a contact (PDH, PDL) of the integrated CMOS circuit, compare the value of the detected potential with a reference value, and connect the contact (PDH, PDL) to a leakage circuit node (ABK) to drain the current, so that it does not flow through the parasitic bipolar lateral structure, i.e., not into the substrate. The leakage circuit node can be connected, for example, to the reference potential line (GND) or to another line that has a higher potential than that of the reference potential line (GND). This electrical connection is then activated or...initiated when the value of the contact potential (PDH, PDL) is below or equal to a reference value, where this reference value is below the potential of the substrate Sub and / or below the potential of the reference potential line (GND) or the other line mentioned above.

The single set-up measurement of time-resolved photovoltage (TPV) and time- resolved photocurrent (TPC) of optoelectronic and photoelectrochemical devices is achieved by an automated system that enables charge generation, and analysis of extraction and recombination dynamics of the devices at interfacial and bulk regions at different measurement conditions. The system comprises of sample holder and controllers section (1), light sources and controllers section (2), data acquisition unit (3), electronic switches (50), which are controlled and monitored by a data processor (40). The system provides for optical perturbation wavelengths, pulse- width, and light-soaking, in addition to different electric field polarizations, magnetic field polarizations and various temperature regimes for the measurement of photovoltage and photocurrent over time. Examples of optoelectronic and photoelectrochemical devices include devices for water splitting, carbon dioxide reduction, nitrogen reduction, light emitting diodes, photodetectors, and solar cells.

Method for measuring an iron concentration in a p-type silicon wafer (W) based on a measurement employing a surface photovoltage, hereinafter referred to as SPV, method, wherein the method for measuring comprises: Performing the measurement in a measurement mode in which the p-type silicon wafer (W) is irradiated with a plurality of lights having different wavelengths during the same time period, the measurement being performed under the following conditions: (i) the time between readouts is 35 ms or more and 120 ms or less, and a time constant is 20 ms or more, or the time between readouts is 10 ms or more and less than 35 ms and the time constant is 100 ms or more, and (ii) a number of readouts is 12 times or less, where the number of readouts means the number of SPV signals that are captured in an SPV measurement, The time constant represents the acquisition time during which each SPV signal is acquired, out of the number of SPV signals. The time between readouts means the time interval between times at which successive SPV signals are recorded.

A method for characterizing semiconductor doping in a wide-bandgap semiconductor sample involves measuring the initial surface potential V0 of a region on the surface of the semiconductor sample in the dark, charging the region to a deep depletion state in the dark by applying a predetermined corona charge to the region, measuring the surface potential value of the region in the dark after charging, and then applying a specific photon flux f having a photon energy exceeding the semiconductor's bandgap, sufficient to generate free minority carriers in the semiconductor sample and cause photoneutralization of the corona charge. eff Irradiation with light, non-contact time-resolved measurement of surface potential V(t) to monitor corona charge decay induced by photoneutralization in the region as a result of light irradiation time t, and analysis of the monitored time-resolved surface potential decay data V(t) to determine the photoneutralization time constant τ ph To determine a specific photon flux f eff The photo-neutralization time constant τ in ph This includes using a semiconductor doping index and characterizing the semiconductor doping concentration in a region based on that value.

A reliability measuring apparatus includes an oxide-nitride-oxide-alumina (ONOA) current measuring circuit configured to measure an ONOA current by applying an ONOA current measuring voltage to a selected word line coupled to a selected memory cell in a flash memory and a reliability indicator generator configured to a reliability indicator using the ONOA current measured through the measuring circuit.

The invention relates to various devices and methods for preventing the injection of a substrate current into the substrate sub of a CMOS circuit. For this purpose, the devices implement different methods for preventing such injection. They detect the potential of a contact (PDH, PDL) of the integrated CMOS circuit, compare the value of the detected potential with a reference value, and connect the contact (PDH, PDL) to a leakage circuit node (ABK) to drain the current, so that it does not flow through the parasitic bipolar lateral structure, i.e., not into the substrate. The leakage circuit node can be connected, for example, to the reference potential line (GND) or to another line that has a higher potential than that of the reference potential line (GND). This electrical connection is then activated or...initiated when the potential value of the contact (PDH, PDL) is below or equal to a reference value, where this reference value is below the potential value of the substrate Sub and / or below the potential value of the reference potential line (GND) or the other line mentioned above.

The invention relates to method for determining respective transport properties of majority as well as minority charge carriers in a sample (107) comprising the majority and the minority charge carriers that correspond to electrons and holes or vice versa. The method particularly allows to determine the charge carrier density of the majority charge carriers and the charge carrier density of the minority charge carriers. For the method, a plurality of Hall measurement trials is performed on the sample (107), wherein during each Hall measurement trial, the sample (107) is exposed to an illumination intensity I, wherein a Hall coefficient and a conductivity are acquired from each Hall measurement trial, wherein in a first Hall measurement trial, the sample (107) is exposed to a first illumination intensity I1, in the range of zero to 0.02 suns, particularly wherein the first illumination intensity is zero, and a first Hall coefficient RH(I1) and a first conductivity σ(I1) are acquired, wherein from the first Hall coefficient and the first conductivity, a carrier mobility μ1 is determined, wherein in a second measurement trial, the sample (107) is exposed to a second illumination intensity I2 and a second Hall coefficient RH(I2) and a second conductivity σ(I2) are acquired, wherein from the second Hall coefficient and the second conductivity, a second carrier mobility μ2 is determined, wherein the second illumination intensity I2 is so high that a charge carrier density of electrons and a charge carrier density of holes in the sample (107) are identical, that the second Hall coefficient asymptotically approaches zero and that a second Hall mobility obtained from the product of the second Hall coefficient and the second conductivity asymptotically approaches a constant value, wherein a third carrier mobility μ3 is determined from the first and the second carrier mobility, particularly by subtracting the second carrier mobility from the first carrier mobility if the Hall coefficient has the same sign for the first and the second illumination intensity or by adding the second carrier mobility to the first carrier mobility if the Hall coefficient changes its sign for the first and the second illumination intensity, wherein the first carrier mobility μ1 is assigned to, particularly corresponds to a mobility of the majority charge carriers, μ2 is assigned to, particularly corresponds the absolute value of the difference between hole and electron mobility, and the third carrier mobility μ3 is assigned to, particularly corresponds to a mobility of the minority charge carriers in the sample (107). The invention also relates to a computer program and a system for determining respective transport properties of majority as well as minority charge carriers in a sample (107).