Apparatus and method for combined micro-scale and nano-scale c-v, q-v, and i-v testing of semiconductor materials

a semiconductor material and micro-scale technology, applied in the direction of individual semiconductor device testing, scanning probe techniques, instruments, etc., can solve the problems of adverse effects on the signal to noise ratio of measurement, adverse effects on the properties of the device to be measured, and reduction of the sampled area, so as to reduce the measurement area and small capacitance variations
US20100148813A1Inactive Publication Date: 2010-06-17MULTIPROBE
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Patent Information

Authority / Receiving Office
US Β· United States
Current Assignee / Owner
MULTIPROBE
Publication Date
2010-06-17
Estimated Expiration
Not applicable Β· inactive patent

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Abstract

Current Voltage and Capacitance Voltage (IV and CV) measurements are critical in measurement of properties of electronic materials especially semiconductors. A semiconductor testing device to accomplish IV and CV measurement supports a semiconductor wafer and provides a probe for contacting a surface on the wafer under control of an atomic Force Microscope or similar probing device for positioning the probe to a desired measurement point on the wafer surface. Detection of contact by the probe on the surface is accomplished and test voltage is supplied to the semiconductor wafer. A first circuit for measuring capacitance sensed by the probe based on the test voltage and a complimentary circuit for measuring Fowler Nordheim current sensed by the probe based on the test voltage are employed with the probe allowing the calculation of characteristics of the semiconductor wafer based on the measured capacitance and Fowler Nordheim current.
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Description

REFERENCE TO RELATED APPLICATIONS

[0001] This patent application claims the priority of U.S. Provisional Patent Application Ser. No. 60 / 807,678 filed on Jul. 18, 2006 having the same title as the present application, the disclosure of which is incorporated fully herein by reference.BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] This patent relates generally to the field of electrical characterization of materials and structures and, more particularly, to a non-destructive testing device and method for characterization of semiconductor materials using combined C-V and I-V testing using atomic force probing. It also pertains to the use of multiple probes on a semiconductor device at the nanoscale in order to enable new, novel combinations of measurements of current, charge, and capacitance.

[0004] 2. Description of the Related Art

[0005] It is well known that in the processing and fabrication of semiconductor structures, it is advantageous to measure their performance and p...

Claims

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