728results about "Radiofrequency circuit testing" patented technology

An electronic diagnostic device for testing electronic monitoring tags for devices such as replaceable modules for a printing apparatus includes a tag reader with a reader wireless communication element. The tag reader is adapted to read tag diagnostic information from an electronic monitoring tag. The electronic diagnostic device further includes a data processor in communication with the tag reader. The data processor is adapted to determine from the tag diagnostic data whether the electronic monitoring tag is operating within predetermined parameters, to identify one of a predetermined set of error categories if the electronic monitoring tag is operating outside the predetermined parameters, and to generate error category information. The electronic diagnostic device further includes a results communication element adapted to communicate the error category information generated by the data processor. The diagnostic device may also communicate correction information to the electronic monitoring tag.

A high frequency component is constructed such that the characteristics of a high frequency circuit that cannot be measured only by an outwardly extending terminal electrode are easily measured at the final-product stage. In the high frequency component, a substrate has an electrode pattern provided including a signal measuring electrode pad. Additionally, chip components are mounted on the substrate. A metal cover has a hole provided near the signal measuring electrode pad. Through the hole, a probe of a measuring apparatus is inserted from the outside to abut with the electrode pad. With the arrangement, a voltage signal obtained at a predetermined point of the high frequency circuit is measured.

Signal modules and methods for electrically interfacing with an electronic device are provided. The signal module includes a dielectric and a conductor extending through a surface of the dielectric. The surface of the dielectric is located away from perpendicular relative to an axis of the conductor and is located based on an electromagnetic field produced as a result of a signal flowing through the conductor.

A read-write processing device communicates with an RFID tag provided with a semiconductor memory to carry out read and write processes. A communication processing device executes communication processes with the RFID tag, exchanging commands and responses, and a data creating device creates safety data indicative of a margin of safety of communication based on communication results by the communication processing device. The created safety data are displayed or outputted to the outside by an output device.

A non-contact tester for electronic circuits consists of an electronic circuit and independent scanning head, in combination. The electronic circuit includes a micro-fabricated wireless i / o cell and means for sending and receiving signals via the wireless i / o cell. The independent scanning head has a wireless i / o cell that is compatible with the wireless i / o cell on the electronic circuit. This enables data to be exchanged with the electronic circuit to confirm proper functioning of the electronic circuit.

To provide a semiconductor device capable of being easily subjected to a physical test without deteriorating characteristics. According to a measuring method of a semiconductor device in which an element layer provided with a test element including a terminal portion is sealed with first and second films having flexibility, the first film formed over the terminal portion is removed to form a contact hole reaching the terminal portion; the contact hole is filled with a resin containing a conductive material; heating is carried out after arranging a wiring substrate having flexibility over the resin with which filling has been performed so that the terminal portion and the wiring substrate having flexibility are electrically connected via the resin containing a conductive material; and a measurement is performed.

A method, system, and apparatus for a radio frequency identification (RFID) tag inlay tester and sorter system are described. A tag inlay is received. A characteristic of the tag inlay is tested. The tag inlay is disposed if the tag inlay is determined to fail the test of characteristic. The tag inlay is transported to a processing station if the tag inlay is determined to have passed the test of characteristic. The tag inlay is processed at the processing station. In an aspect, the tag inlay testing and tag inlay processing is performed in a single apparatus. In an alternative aspect, the tag inlay testing is performed by a first apparatus, and the tag inlay processing is performed by a second apparatus.

An impedance analyzer is provided. The analyzer includes a signal excitation generator comprising a digital to analog converter, where a transfer function of the digital to analog converter from digital to analog is programmable. The impedance analyzer further includes a receiver comprising a low noise amplifier (LNA) and an analog to digital converter (ADC), where the LNA is a current to voltage converter; where the programmable digital to analog transfer function is implemented by a direct digital synthesizer (DDS) and a voltage mode digital to analog converter, or a digital phase locked loop (PLL), or both. Further, a multivariable sensor node having an impedance analyzer is provided. Furthermore, a multivariable sensor network having a plurality of multivariable sensor nodes is provided.

A non-contact tester for electronic circuits consists of an electronic circuit and independent scanning head, in combination. The electronic circuit includes a micro-fabricated wireless i / o cell and means for sending and receiving signals via the wireless i / o cell. The independent scanning head has a wireless i / o cell that is compatible with the wireless i / o cell on the electronic circuit. This enables data to be exchanged with the electronic circuit to confirm proper functioning of the electronic circuit.

A system for validating each of a plurality of radio frequency identification tags disposed on a web in close proximity to one another to ensure proper functioning thereof includes a narrow angle radio frequency identification tag reading station which reads a designation of each radio frequency identification tag individually in order to generate a first list of tag designations read thereby and a wide angle radio frequency identification tag reading station which reads designations of a plurality of radio frequency identification tags simultaneously from a long range in order to generate a second list of tag designations read thereby. The system also includes a processor which compares the first list of tag designations with the second list of tag designations and evaluates the functionality of the plurality of radio frequency identification tags based at least in part upon the comparison.

A test fixture has a flexible plastic cable that acts as a waveguide. The Device-Under-Test (DUT) is a small transceiver and antenna that operate in the Extremely High-Frequency (EHF) band of 30-300 GHz. The size of the DUT transceiver is very small, limiting the power of emitted electromagnetic radiation so that close-proximity communication is used. The envelope for reception may only extend for about a centimeter from the DUT transceiver, about the same size as the test socket. A slot is formed in the test socket very near to the antenna. The slot receives one end of the plastic waveguide. The slot extends into the envelope by the DUT transceiver so that close-proximity radiation is captured by the plastic waveguide. The waveguide has a high relative permittivity and reflective metalized walls so that the radiation may be carried to a receiver that is outside the envelope.

A modularized probe head for high frequency probing is provided. The probe head mainly includes a probe head, a mounting board and an interposer between the probe head and the mounting board. The probe head has a plurality of cavities on its back surface. A plurality of decoupling components are installed inside the cavities and are electrically coupled to the ground / power circuitry of the probe head via by-pass circuitry. The interposer has a bottom surface corresponding to the back surface of the probe head, and includes a plurality of contact ends on the bottom surface. Some of the contact ends electrically contact the decoupling components and electrically coupled to the ground plane of the mounting board.

There is a desire to provide a testing method and apparatus that can be successfully integrated into a PLL and PLL-like circuits (e.g. frequency synthesizers, delay lock loops, etc.). It is desirable that the PLL or PLL-like circuit integrated with testing apparatus does not suffer from performance degradations during nominal (mission mode) operation. Furthermore, it is desirable that the PLL and the testing apparatus share the same interface. In order to produce a PLL having integrated testing apparatus, without having the PLL suffer severe performance degradations during nominal operation nor having the combination of the PLL and testing apparatus be unnecessarily large, a modified PLL integrated with testing apparatus is provided.

An apparatus for testing radio frequency (RF) and / or mixed signal semiconductor devices and or modules is described. specifically described is how the distributed stimulus for RF automatic test applications, unified testhead for automatic test applications, reverse card backplane for automatic test applications, direct coaxial interface for automatic test applications, cable-free interface for automatic test applications, micromachine switch matrix for automatic test applications, device specific module high speed date for RF automatic test applications may be used within tester apparatus described herein or in other test applications. Additionally a high speed date communications test apparatus which may be used in a variety of device testers is described herein.

An integrated circuit (IC) is provided. The IC includes an RF transmitter and an RF receiver. The RF transmitter is configured to generate an RF signal in response to an analog test signal from a test signal generator of a module circuitry that is external to the IC. The RF receiver is configured to generate an outgoing signal according to an input RF signal, and to report the outgoing signal to the module circuitry. The module circuitry performs a test analysis on the RF signal generated by the RF transmitter or on the outgoing signal generated by the RF receiver to determine a test result. The test result is reported to a test equipment having no RF instruments.

Wirelessly testing an RFID tag before it is packaged or otherwise entered into a process reserved for “working” RFID tags is described. Various processes that employ such wireless testing as well as various “on-die” RFID tag antenna designs for facilitating the wireless testing are also described.

A receiver system which may be implemented in an integrated circuit device and suitable for use in automotive radar systems such as collision avoidance systems, includes self test circuitry whereby a local oscillator test signal is generated by an on-board frequency multiplier and mixed in a down-conversion mixer with an RF test signal. The RF test signal is generated on the device by up-conversion of an externally generated low-frequency test signal with the local oscillator test signal. Baseband components may also be checked using test signals of suitable frequency divided down from the local oscillator test signal by a programmable frequency divider. This self test arrangement obviates any need for applying externally generated RF test signals to the IC device.

Described herein are methods, devices and systems for characterizing an attached antenna to an electronic device, such as a radio frequency identification (“RFID”) reader. One exemplary embodiment is related to a method comprising outputting a low amplitude modulation (“AM”) index radio frequency (“RF”) waveform, the waveform simulating tag data timing and bandwidth, removing a direct current (“DC”) component from the waveform to create a chopped portion of the waveform, applying at least one vector analyzer technique on the chopped portion of the waveform, characterizing at least one antenna impedance vector of the waveform.

The illustrative embodiments provide a computer implemented method, an apparatus, and a computer program product for testing a radio frequency identification reader. The radio frequency identification reader transmits a test signal to a diagnostic tag during a diagnostic period. Responsive to receiving a return signal from the diagnostic tag, the radio frequency identification reader compares the return signal with an expected return signal to form a comparison. The radio frequency identification reader identifies an operational status for the radio frequency identification reader using the comparison.

A method and apparatus for determining capacitance of wires in an integrated circuit is described. The capacitance information derived according to the invention can be used, for example, to calibrate a parasitic extraction engine or to calibrate an integrated circuit fabrication process. The capacitance information can also be used for timing and noise circuit simulations, particularly for deep sub-Micron circuit design simulations. Briefly, the invention allows measurement of both total capacitance of a line and cross coupling capacitance between two lines by applying predetermined voltage signals to specific circuit elements. The resulting current allows simple computation of total capacitance and cross coupling capacitance. Multiple cross coupling capacitance can be measured with a single device, thus improving the art of library generation, and the overall method is free of uncertainties related to transistor capacitance couplings. The capacitance values obtained can then be used to calibrate procedures, processes, devices, etc.

An on-chip receiver sensitivity test mechanism for use in an integrated RF transmitter wherein the transmitter and the receiver share the same oscillator. The mechanism obviates the need to use expensive RF signal generator test equipment with built-in modulation capability and instead permits the use of very low cost external RF test equipment. The invention utilizes circuitry already existing in the transceiver, namely the modulation circuitry and local oscillator, to perform sensitivity testing. The on-chip LO is used to generate the modulated test signal that otherwise would need to be provided by expensive external RF test equipment with modulation capability. The modulated LO signal is mixed with an externally generated unmodulated CW RF signal to generate a modulated signal at IF which is subsequently processed by the remainder of the receiver chain. The recovered data bits are compared using an on-chip BER meter or counter and a BER reading is generated. The BER reading is used either externally or by an on-chip processor or controller to establish a pass / fail indication for the chip.

Wirelessly testing an RFID tag before it is packaged or otherwise entered into a process reserved for “working” RFID tags is described. Various processes that employ such wireless testing as well as various “on-die” RFID tag antennae designs for facilitating the wireless testing are also described.

An active load or source impedance synthesis apparatus for experimental characterization of electronic components (E) working in the range from 500 MHz to 110 GHz, includes an active loop with at least one amplifier (Am), one magnitude and phase control system (Ra, Rs, one directional coupler (Acc) and a measurement system connected to a device under test (E), where the directional coupler (Acc) is connected after the most significant losses of the measurement system.

A Transmission Line Pulse (“TLP”) measurement system for testing devices such as integrated circuits (“ICs”), and especially for testing the electrostatic discharge (“ESD”) protection structures connected to terminals on such ICs. The TLP measurement system measures the pulsed voltage and / or current of a device under test (“DUT”) by recording voltage and / or current pulse waveforms traveling in a constant impedance cable to and from the DUT. The pulses going to and returning from the DUT are processed to create signal replicas of the voltage and current pulses that actually occurred at the DUT. Oscilloscope operating settings optimize the recording of these signal replicas by improving the measurement signal-to-noise ratio. This improved TLP system is especially useful when very short width pulses on the order of less than 10 nanoseconds are used to test the DUT's response.

An integrated circuit device is provided having one or more pairs of ring oscillator circuits. Each ring oscillator circuit of the one or more pairs of ring oscillator circuits is configured to connect to at least one voltage source capable of applying a stress to a ring oscillator circuit. One or more frequency measurement circuits are each electrically connected to a respective pair of the one or more pairs of ring oscillator circuits. Each frequency measurement circuit is configured to measure a stress induced change in frequency difference of the respective pair of the one or more pairs of ring oscillator circuits.

A method and apparatus for testing RFID straps. Arrays of RFID straps in a roll-to-roll process are coupled to an array of test elements. RF programming and interrogation signals are frequency and time multiplexed to the RFID array. Return signals are detected to determine sensitivity and programmability parameters of the RFID straps.

Methods, systems, and apparatuses for a radio frequency identification (RFID) tag tester / programmer and marker are described. A surface is in contact with a web of RFID tags. The surface has a first portion and a second portion. The first portion of the surface is grounded to ground tags of the web that are in contact with the first portion. A radio frequency (RF) source transmits a RF signal to interact with a tag adjacent to the second portion of the surface. The RF signal may be a signal for testing the tag and / or a signal for programming the tag.

The invention provides methods and devices for estimating power amplifier nonlinearity using simple correlation techniques. Methods and devices of the invention can monitor a power amplifier that has digitally modulated inputs and an output containing more than one signal stream. A preferred method of the invention creates a test signal by forming the products of several pseudorandom noise sequences from the digitally modulated inputs to the power amplifier. Nonlinear contributions of the power amplifier output are determined by cross-correlating the test signal and the total output signal of the power amplifier. In preferred embodiments, the determined nonlinear contributions of the power amplifier are used to introduce corrective predistortion in the power amplifier.

Systems and methods for precision phase noise measurements of radio frequency (RF) oscillators are provided. An RF signal under test can be modulated on a continuous wave (cw) laser carrier frequency via generation of modulation sidebands using an appropriate modulator. A photonic delay line can be implemented as a self-heterodyne detection system for the phase noise, allowing for photonic down-conversion of the phase noise measurement to direct current (DC). The self-heterodyne detection system allows detection outside of any 1 / f noise issues. Ultra-low phase noise detection for RF frequencies in a range from below 1 GHz to beyond 100 GHz is enabled with a low noise floor in the whole frequency range. Higher-order modulation sidebands can further reduce the noise floor of the system. Ultra-low noise RF (microwave) output can be generated. The RF signal under test can be generated by a dielectric resonance oscillator or opto-electronic oscillator.

A modularized probe head for high frequency probing is provided. The probe head mainly includes a probe head, a mounting board and an interposer between the probe head and the mounting board. The probe head has a plurality of cavities on its back surface. A plurality of decoupling components are installed inside the cavities and are electrically coupled to the ground / power circuitry of the probe head via by-pass circuitry. The interposer has a bottom surface corresponding to the back surface of the probe head, and includes a plurality of contact ends on the bottom surface. Some of the contact ends electrically contact the decoupling components and electrically coupled to the ground plane of the mounting board.