30 results about "Frequency multiplier" patented technology

Embodiments described herein are directed to a position sensor that includes a first receiver coil electrically coupled to a first multiplier to generate a first output, a second receiver coil electrically coupled to a second multiplier to generate a second output, a transmitter coil electrically coupled to an oscillator, the oscillator electrically coupled to a third multiplier to generate a third output, a phase-locked loop electrically coupled to the oscillator and the transmitter coil, a summing circuit configured to receive the first output and the second output and configured to generate a signal, a phase detector configured to receive the signal and the third output, the phase detector outputting a sense signal that is indicative of an angle of the motor position sensor, and a pair of op amps electrically coupled to the phase detector. The op amps configured to output an analog differential signal and a differential phase signal.

This invention belongs to the field of time-frequency unification and relates to a fast discipline method and system based on a high-stability OCXO. The method includes selecting a primary reference source, inputting the reference signal into a phase-locked loop frequency multiplier for frequency multiplication, and inputting the processed high-frequency reference signal into a high-precision phase measurement module. A monitoring and processing platform controls two frequency standard signals output from the OCXO frequency standard source through a control word. The first frequency standard signal of the first channel is input into a phase-locked loop frequency divider, and the second frequency standard signal is output to the high-precision phase measurement module. The third frequency standard signal of the second channel is directly input into the high-precision phase measurement module to measure the phase difference between the high-frequency reference signal and the second frequency standard signal. The monitoring and processing platform outputs an updated control word through a fast discipline algorithm to correct the OCXO frequency standard source parameters. The fast discipline process continues until the OCXO frequency standard source stabilizes and the phase difference with the reference source converges, ending the fast discipline state.

This invention discloses a reconfigurable injection-locked local oscillator system, comprising a voltage-controlled oscillator (VCO), an injection-locked frequency multiplier (ILL), and an injection-locked amplifier (ILA). The first output terminal of the VCO is connected to the first input terminal of the ILL, the second output terminal of the VCO is connected to the second input terminal of the ILL, the first output terminal of the ILL is connected to the first input terminal of the ILL, and the second output terminal of the ILL is connected to the second input terminal of the ILL. The VCO generates a low-frequency fundamental wave, the ILL multiplier performs frequency multiplication on the low-frequency fundamental wave to generate a second or third harmonic wave, and the ILL amplifies the power of the second or third harmonic wave, thereby improving the accuracy of the output millimeter-wave frequency.

This invention discloses a millimeter-wave broadband high harmonic suppression tripler, comprising an input matching network, a time-domain shaping tripler unit, and a differential common-source output stage. The proposed time-domain shaping tripler unit employs transistor pairs with different gate widths and bias voltages to superimpose two sets of voltage signals of different amplitudes in the time domain, thereby enhancing the inherent harmonic suppression of the tripler unit. Furthermore, by connecting a common-mode impedance control in series at the center tap of the primary inductor coil of the output transformer of the tripler unit, the output power of the third harmonic is further improved. The input matching network achieves single-ended to differential conversion, with its primary and secondary coil center taps grounded and open-circuited respectively in a counterintuitive manner, improving differential-mode balance and common-mode stability. Simultaneously, by using a series-coupled inductor, the quality factor of the transistor input impedance is reduced, improving the bandwidth performance of the tripler.

The application discloses a duty cycle tunable frequency multiplier, a phase-locked loop circuit and electronic equipment, wherein the frequency multiplier comprises an input port, a first adjusting unit, a second adjusting unit, a third adjusting unit, a first control unit, a second control unit, a third control unit and a frequency multiplication unit. The frequency multiplier performs delay processing on a reference frequency through the adjusting units, selects a target delay signal through the control units, and then multiplies the reference frequency signal to generate a frequency multiplication signal, so that the duty cycle of the output clock signal is flexibly adjusted while the frequency multiplication is realized.

The application discloses a low-power consumption full-differential multiple harmonic IQ zero intermediate frequency mixing circuit, which comprises a quadrature all-pass filter QAF, a phase-shifting driver based on current vector synthesis, an mth harmonic frequency mixer I_MIXER based on a frequency multiplication structure and an mth harmonic frequency mixer Q_MIXER based on a frequency multiplication structure. The input local oscillator differential signal is changed into a quadrature IQ differential signal through the quadrature all-pass filter, then the driver module is used to realize the amplification signal and phase-shifting functions, generate and amplify the differential signal with the required phase, and then the differential signal is injected into the IQ mixer, and the mixer is used to realize the frequency multiplication function through the circuit structure based on the frequency multiplier and the state class B bias state of the adjusting transistor, so that the local oscillator signal is multiplied and mixed with the input RF signal. The application saves the power consumption of the frequency multiplier, effectively reduces the power consumption of the local oscillator signal link, and optimizes the linearity and noise of the mixer.

The application provides a power synthesis frequency multiplier, comprising: a Y-shaped power divider, which is used for dividing a signal into two equal-amplitude opposite signals; two input matching circuits, which are used for transmitting the input signal to two diode three-dimensional models; two diode three-dimensional models, input ports of which are connected with output ends of the input matching circuits respectively, and output ports of the diode three-dimensional models are connected with transverse branches of a T-shaped matching structure; a T-shaped matching circuit, which is used for the same-direction power synthesis of the output signal; and an output probe, a suspended microstrip line port of which is connected with a longitudinal branch of the T-shaped matching circuit. The application adopts the T-shaped matching structure, directly synthesizes the output signals of each branch frequency multiplier, reduces the volume of the power synthesis frequency multiplier, and reduces the transmission loss. The application has the comprehensive advantages of miniaturization, low loss and high efficiency, and is suitable for the application scenes of portable devices, spaceborne terahertz transceiver systems and other scenes with strict requirements on size and efficiency.

This invention discloses a photonic terahertz communication system based on non-uniform probabilistic shaping, belonging to the field of terahertz communication. Specifically, it includes a transmitter and a receiver. The transmitter incorporates non-uniform probabilistic shaping and phase fuzzy encryption techniques, using photonic beat frequency generation to produce a terahertz signal. This signal is then transmitted wirelessly via single-mode fiber to the receiver, where it is mixed with a frequency-multiplied local oscillator signal to achieve down-conversion of the terahertz signal, obtaining an intermediate frequency (IF) signal. The IF signal is then sampled and input to an RX-DSP module for digital signal processing, ultimately obtaining the original data and calculating the bit error rate (BER). This invention improves the system's BER performance and significantly enhances the security of the photonic terahertz communication system.

In an embodiment, a radio frequency circuitry includes one or more transceivers and a frequency multiplier. The frequency multiplier is coupled to the one or more transceivers to provide a high frequency signal based in part on a local oscillator signal. The frequency multiplier includes: a multi-phase generator and an edge combiner. The multi-phase generator includes a plurality of output lines and is configured to generate a plurality of delayed signals respectively at the plurality of output lines, each delayed signal having a respective delay with respect to the local oscillator signal. The edge combiner is coupled to the multi-phase generator and configured to provide the high frequency signal based in part on a rising edge or a falling edge in the plurality of delayed signals. The frequency multiplier can be implemented in any access point or client device in a wireless communication network such as IEEE 802.11.

This application provides a frequency multiplier, including an oscillator and a harmonic generator. The oscillator includes a resonant cavity and a negative resistance unit. The harmonic generator is configured to generate a harmonic signal based on an input fundamental frequency signal. The oscillator is electrically connected to the harmonic generator, and is configured to receive the harmonic signal, and output an intrinsic signal by using the resonant cavity. A frequency of the intrinsic signal is a multiple of a frequency of the fundamental frequency signal. The negative resistance unit includes a feedback capacitor and a parasitic capacitor. The feedback capacitor and the parasitic capacitor collectively provide negative resistance for the resonant cavity. This application further provides a wireless communication device. Therefore, according to the frequency multiplier and the wireless communication device provided in this application, energy efficiency of the frequency multiplier may be improved, thereby optimizing a balance between bandwidth, energy efficiency, and power consumption of the frequency multiplier.

Aspects of the present disclosure improve operating efficiency of a Terahertz RADAR device, facilitating implementation of Terahertz RADAR on a low power budget. Some aspects of the present disclosure relate to regulating a bias state of a harmonic generation circuit in a receiver and / or transmitter of a Terahertz RADAR device. Some aspects of the present disclosure relate to coupling frequency multipliers between RF amplifiers and RF antennas in a transmitter of a Terahertz RADAR device. Some aspects of the present disclosure relate to frequency multipliers, e.g., in a transmitter of a Terahertz RADAR device, using certain transistor configurations (e.g., common-collector or common-drain). A THz RADAR device May implement one, two, or all three of these aspects.

Aspects of the present disclosure improve operating efficiency of a Terahertz RADAR device, facilitating implementation of Terahertz RADAR on a low power budget. Some aspects of the present disclosure relate to regulating a bias state of a harmonic generation circuit in a receiver and / or transmitter of a Terahertz RADAR device. Some aspects of the present disclosure relate to coupling frequency multipliers between RF amplifiers and RF antennas in a transmitter of a Terahertz RADAR device. Some aspects of the present disclosure relate to frequency multipliers, e.g., in a transmitter of a Terahertz RADAR device, using certain transistor configurations (e.g., common-collector or common-drain). A THz RADAR device May implement one, two, or all three of these aspects.

Systems and methods for an implicit frequency multiplier are described. In some embodiments, an implicit frequency multiplier may include a cross-coupled oscillator having a transistor pair, a primary coil coupled to source terminals of the transistor pair, and a secondary coil magnetically coupled to the primary coil. In another embodiment, a method may include operating a cross-coupled oscillator having a transistor pair and extracting a harmonic component of a current flowing through the cross-coupled oscillator using a transformer coupled to source terminals of the transistor pair.

A clock doubler includes a first triggering circuit, a second triggering circuit, and a gating circuit. The first triggering circuit generates a first trigger clock signal using rising edges of a first phase clock signal and a second phase clock signal. The second triggering circuit generates a second trigger clock signal using rising edges of a third phase clock signal and a fourth phase clock signal. The gating circuit gates the first and second trigger clock signals to generate an output clock signal the frequency of which is twice the frequency of clock signals provided to the triggering circuits.

A rate estimator circuit is provided for adjusting the sampling rate filter of a sampling rate converter circuit. The rate estimator circuit includes a first integrator clocked by a first clock signal having a first sampling frequency and a second integrator clocked by a second clock signal having a second sampling frequency; a resolution upscaling circuit including a third integrator clocked by a system clock signal; a digital clock multiplier circuit including the second integrator and a multiplier loop circuit having a fourth integrator; a multiplier output stage connected to the output of the fourth integrator; and a rate estimator circuit including the first integrator and an estimator loop circuit having a fifth integrator.

This application provides a laser and a method for generating laser light. The laser includes: a laser seed source for providing a first pulse; a first amplifier for amplifying the energy of the first pulse to obtain a second pulse; a frequency multiplier for amplifying the frequency of the second pulse to obtain a third pulse; and a second amplifier, the second amplifier including a crystal, for amplifying the energy of the third pulse to obtain a fourth pulse. The laser provided by this application can achieve high-energy pulse output.

This invention provides a back-to-back double-layer Schottky diode and its fabrication method, belonging to the field of semiconductor microwave frequency doubling technology. It includes: a first Schottky diode and a second Schottky diode connected back-to-back; wherein, the first cathode of the first Schottky diode is connected to a first busbar via a first lead, and the second cathode of the second Schottky diode is connected to the first busbar via a first conductive adhesive; the first anode of the first Schottky diode is connected to a second busbar via a second lead, and the second anode of the second Schottky diode is connected to the second busbar via a second conductive adhesive. This invention, by synchronously busing the electrodes of two back-to-back Schottky diodes, essentially forms two single diodes in parallel or symmetrical configuration in the circuit, providing strong support for achieving high power carrying capacity and high output power in frequency multipliers and mixers.

A multiplier arrangement (1000) for receiving an input signal and for generating a frequency multiplied output signal with a controllable phase, and an IQ-mixer arrangement (1100) comprising a first and a second of said multiplier arrangement (1000). The multiplier arrangement (1000) comprises a frequency multiplier circuit (210, 810, 1010) and a control circuit (1080). The frequency multiplier circuit (210, 810, 1010) comprises a transistor (250) configured to receive a supply voltage (VCC), to receive a bias voltage (Vtune, Vtune_I, Vtune_Q, Vtune_1, Vtune_), and to multiply the input signal to provide the frequency multiplied output signal. The control circuit (1080) is configured to: obtain first data indicative of a first target phase of the frequency multiplied output signal; and provide a specific bias voltage (Vtune, Vtune_I, Vtune_Q, Vtune_1, Vtune_2) to the transistor (250) based on the obtained first data.

To reduce individual differences in the oscillation frequency of standard oscillators used for communications. [Solution] The communication standard oscillator 1 comprises a gas cell 13 filled with alkali metal atoms and buffer gas, a photodetector 15 that detects laser light transmitted through the gas cell, a high-frequency oscillator 17 that generates a high-frequency signal, a signal processing unit 20 that generates a modulated high-frequency signal by synchronously detecting the photodetection signal from the photodetector and modulating the high-frequency signal, a laser light source 11 that emits laser light modulated by the modulated high-frequency signal into the gas cell, a memory 31 that stores a predetermined multiplication ratio, and a frequency multiplier 33 that multiplies the frequency of the high-frequency signal generated by the high-frequency oscillator by the multiplication ratio stored in the memory and outputs it as a reference frequency signal. The multiplication ratio stored in the memory is a device-specific value determined by measuring the difference between the oscillation frequency generated in the high-frequency oscillator due to fluctuations in the partial pressure of the buffer gas, which differ for each individual gas cell, and a desired communication reference frequency.

The application discloses a kind of based on double microwave source's multi-channel microwave diagnostic system, including two independent microwave sources, power divider, doubler, band-pass filter, two directional couplers and transmitting antenna, different frequency microwave signals are generated by two independent microwave sources, each microwave source can generate a specific frequency signal;The generated different frequency microwave signals are merged into a composite signal by power divider (used as beam combiner);The input composite signal is multiplied into a series of interval microwave signals using doubler;The microwave signals of effective frequency band are retained using band-pass filter;Effective frequency band microwave signal passes two directional couplers in turn, and finally effective frequency band microwave signal is transmitted into plasma by transmitting antenna, and is used as probe microwave signal.The system can solve the problem of high cost of microwave source caused by multiple microwave sources in the multiple microwave source superposition scheme, and the problem of complex power distribution adjustment of multi-channel signal.

A standard oscillator (1) for communication comprises: a photodetector (15) that detects laser light transmitted through a gas cell (13); a high-frequency oscillator (17) that generates a high-frequency signal; a signal processing unit (20) that synchronously detects a light detection signal from the photodetector and generates a modulated high-frequency signal; a laser light source (11) that emits the laser light modulated by the modulated high-frequency signal to a gas cell; a memory 31; and a frequency multiplier (33) that performs frequency-multiplication on the high-frequency signal by a multiplication ratio stored in the memory, and outputs the frequency-multiplied signal as a reference frequency signal. The multiplication ratio is a device-specific value determined by actually measuring the difference between an oscillation frequency generated in the high-frequency oscillator and a desired reference frequency for communication.

This disclosure provides a plasma density measurement system, relating to the field of microwave technology, comprising: a low-frequency power divider for dividing a first low-frequency signal into a low-frequency reference signal and a low-frequency local oscillator signal; a frequency multiplier module for multiplying the second low-frequency signal to generate a high-frequency microwave signal; a high-frequency power divider for dividing the high-frequency microwave signal into a high-frequency reference signal and a high-frequency detection signal, wherein the high-frequency detection signal is used to penetrate the plasma under test to generate a detection and reception signal; a harmonic mixer, including a reference harmonic mixer and a detection harmonic mixer, wherein the reference harmonic mixer is used to mix the low-frequency reference signal and the high-frequency reference signal to generate an intermediate-frequency reference signal; the detection harmonic mixer is used to mix the low-frequency local oscillator signal and the detection and reception signal to generate an intermediate-frequency detection signal; and a data acquisition card for determining the density of the plasma under test based on the phase of the intermediate-frequency reference signal and the intermediate-frequency detection signal. This system can measure the density of various types of plasmas.

The application discloses a kind of based on waveguide reconfigurable multi-band terahertz high-efficiency frequency multiplier, belong to terahertz technical field, including sequentially first input narrow waveguide, microstrip circuit, output narrow waveguide and output rectangular waveguide, and multiple detachable reconfigurable input matching integrated structure connected with first input narrow waveguide, flange choke ring is arranged in the periphery of first input narrow waveguide;By detaching and replacing input matching integrated structure, the frequency multiplication output of multiple frequency points in target waveguide bandwidth is realized.The application only uses one microstrip circuit chip, one main cavity, one output matching structure and multiple detachable reconfigurable input matching integrated structure, i.e.can realize the high-efficiency frequency multiplication output of multiple frequency points in target waveguide bandwidth, not only satisfies model miniaturization trend, also greatly reduces chip cost.

The application belongs to the technical field of terahertz devices, and particularly relates to a four-way output terahertz frequency doubler, a communication transmitting end and a system. The four-way output terahertz frequency doubler comprises two frequency doubling circuits arranged on a circuit board, one frequency doubling circuit comprises one input and two outputs; two diode pairs, one diode pair is the input of one frequency doubling circuit, and the two diode pairs are symmetrically arranged; two Y-type power dividers, the Y-type power dividers are arranged on the circuit board, and one frequency doubling circuit is connected with one Y-type power divider; an input waveguide is connected with the circuit board, and the input waveguide is perpendicular to the plane where the circuit board is located; the distance from the center surface of the input waveguide to the two diode pairs is equal, and the two diode pairs are located in the input waveguide; four output waveguides are connected with the circuit board, and one output of the frequency doubling circuit is located in one output waveguide; and the outlets of the four output waveguides are oriented in the same direction. The application realizes the output of four-way second harmonic, and has the advantage of high communication efficiency.

Aspects of the present disclosure improve operating efficiency of a Terahertz RADAR device, facilitating implementation of Terahertz RADAR on a low power budget. Some aspects of the present disclosure relate to regulating a bias state of a harmonic generation circuit in a receiver and / or transmitter of a Terahertz RADAR device. Some aspects of the present disclosure relate to coupling frequency multipliers between RF amplifiers and RF antennas in a transmitter of a Terahertz RADAR device. Some aspects of the present disclosure relate to frequency multipliers, e.g., in a transmitter of a Terahertz RADAR device, using certain transistor configurations (e.g., common-collector or common-drain). A THz RADAR device May implement one, two, or all three of these aspects.

To provide a system and method for detecting wafers using nonlinear optical signals. [Solution] A system and method for detecting a wafer using a nonlinear optical signal acquires the emitted light from the sample under test using a noise reduction module. The core assembly of the noise reduction module includes a series of beam splitter assemblies and a photodetector assembly that receives the ratio beams of the beam splitter assemblies. By reducing the signal from the homogeneous region of the sample under test and the background noise that randomly occurs during the photoelectric conversion process, the overall background noise is reduced, thereby clarifying the frequency multiplier signal to be retained and improving the signal-to-noise ratio.

The application discloses a local oscillator signal generation circuit and a superheterodyne receiver, and belongs to the technical field of superheterodyne receivers. The local oscillator signal generation circuit comprises a first local oscillator circuit and a second local oscillator circuit. In the first local oscillator circuit, a K frequency multiplier multiplies a reference signal by K, a first phase discriminator generates an error signal based on the reference signal and a second mixer output, a first loop filter outputs a tuning voltage to control a first voltage-controlled oscillator to generate an oscillation signal, and a first local oscillator coupler divides the oscillation signal into two paths, one path generates a first local oscillator signal, and the other path mixes a second local oscillator signal output by the second local oscillator circuit to obtain a first mixed signal, the first mixed signal is mixed with a K frequency signal to obtain a second mixed signal and is fed back to the first phase discriminator. The application maps the phase noise of the second local oscillator to the first local oscillator, realizes coherent cancellation in cooperation with the second mixing of the receiver, and significantly reduces the total phase noise of the system without a frequency divider in the feedback path.

This application discloses a dual-wavelength time-domain blood oxygen detection system, method, device, and medium, belonging to the fields of optics and biomedical engineering. The system includes a signal generator, a timing controller, two pulsed lasers, an optical fiber coupler, a silicon photomultiplier tube, a signal frequency multiplier, and a time-correlated single-photon counter. The timing controller achieves interleaved excitation of dual-wavelength pulses, and the coupler separates 1% reference light and 99% probe light. At the detection end, the single-photon counter labels photons according to the excitation sequence, filters out shallow noise, and accumulates to construct a dual-wavelength photon histogram. Combined with finite element forward modeling based on the diffusion equation and Robin boundary conditions, the tissue absorption and scattering coefficients are simultaneously inverted, and the total hemoglobin concentration and blood oxygen saturation are calculated by modifying the Lambert-Beer law. This application achieves high-speed acquisition and high-precision reconstruction under the same physiological conditions with dual wavelengths, overcoming the problems of large dynamic errors and strong shallow interference in traditional systems.

This application discloses a signal generating device, a quantum computing measurement and control system, and a quantum computer, including a frequency multiplier circuit for processing a received first clock signal to generate a second clock signal with a higher frequency; a phase-locked loop circuit, which includes a mixer, a first filter, and a voltage-controlled oscillator; the two inputs of the mixer are electrically connected to the outputs of the frequency multiplier circuit and the voltage-controlled oscillator, respectively, to generate a difference frequency signal based on the frequency difference between the received second clock signal and a frequency signal; the input of the first filter is electrically connected to the output of the mixer to perform low-pass filtering on the difference frequency signal and generate a first voltage-controlled signal; the input of the voltage-controlled oscillator is electrically connected to the output of the first filter to output a frequency signal and adjust the frequency of the frequency signal according to the first voltage-controlled signal until it is locked to a target frequency. The signal generating device of this application improves the near-end and far-end phase noise performance of the final output signal.