247 results about "Frequency multiplier" patented technology

An even harmonic multiplier employing complementary current reuse is disclosed. The even harmonic multiplier employs supply voltage and current density scaling to reduce power consumption. Further, by using complimentary NMOS and PMOS transistors, the even harmonic multiplier achieves high areal efficiency. Current reuse causes a reduction in noise at the first harmonic, as the corresponding first harmonic currents from the NMOS and PMOS transistors are in opposite, i.e., canceling, directions. Complementary current reuse is now feasible, as the performance of PMOS transistors at current process nodes is similar to those of NMOS transistors, with appropriate sizing leading to approximately equivalent transconductances. Multiple even harmonic multiplier configurations are possible, with many using transformer circuits at the input and / or the output. The resultant even harmonic multipliers find ready application in millimeter wave radio frequency receivers. The most common even harmonic multiplier is a frequency doubler, which produces a strong second harmonic signal.

A computer-implemented method comprising receiving, by an input device from a host computing device, a display refresh rate for a display, both the display and the input device being communicatively coupled to the host computing device. The method further includes computing, by the input device, a frequency multiplier based on the display refresh rate and a selected report rate of the input device, the report rate corresponding to a frequency at which the input device reports activity of the input device to the host computing device and calibrating, by the input device, the report rate to a new report rate based on the computed frequency multiplier. The method may further include reporting activity of the input device to the host computing device at the new report rate.

A phase lock loop includes a clock multiplier configured to receive a reference clock and output a multiplied clock; a phase detector configured to receive the multiplied clock and a divided clock and output a phase error signal; a loop filter configured to receive the phase error signal and output a control signal; a controllable oscillator configured to output an output clock in accordance with the control signal; and a clock divider configured to receive the output clock and output the divided clock, wherein the clock multiplier is either a frequency doubler or a frequency quadrupler, and a frequency response of the loop filter comprises a first notch at the frequency of the reference clock and a second notch at twice the frequency of the reference clock.

The utility model provides a large-bandwidth 220G terahertz emission front end, which comprises a frequency doubler, a filter, an amplifier, a one-to-two power divider, a first one-to-four power divider and a second one-to-four power divider, wherein the frequency doubler, the filter, the amplifier and the one-to-two power divider are sequentially connected, and the first one-to-four power divider and the second one-to-four power divider are respectively connected with two output ends of the one-to-two power divider. The output end of the first one-to-four power divider and the output end of the second one-to-four power divider are connected with four transmitter frequency doubling amplification modules. According to the utility model, input 15G-21.7 GHz low-frequency signals are subjected to frequency doubling amplification to obtain 30G-42.4 GHz signals, the 30G-42.4 GHz signals are divided into 8 paths of transmitter frequency doubling amplification modules 7 through two power division links, the 8 paths of signals are respectively controlled by a single-pole four-throw switch to obtain 32 paths of signals, the 60-84.8 GHz signals are obtained after frequency doubling amplification, and the 60-84.8 GHz signals are transmitted to the transmitter frequency doubling amplification modules 7. The signals are divided into 64 paths of signals under the control of a single-pole double-throw switch, and the 64 paths of signals are amplified by a frequency tripler to obtain final 180-260GHz emission signals. According to the utility model, emission of multi-channel signals can be simultaneously realized, and the production and manufacturing cost of the terahertz front end is obviously reduced.

The invention discloses a differential magnetic coupling millimeter wave terahertz frequency multiplier, which comprises differential paths, the differential paths are used for transmitting differential signals to grids of active transistors, and the two differential paths enhance forward differential mode signals through magnetic coupling and inhibit reverse leakage common mode signals at the same time. According to the invention, the differential channels of the frequency multiplier are magnetically coupled, so that differential-mode signals are enhanced, common-mode signals are suppressed, and the output power, the efficiency and the harmonic suppression ratio of the frequency multiplier are improved.

The embodiment of the invention provides a voltage-controlled oscillator, an oscillator circuit, a chip and electronic equipment, relates to the technical field of communication or radar detection, and can improve the linearity of the voltage-controlled oscillator. The voltage-controlled oscillator comprises a voltage-controlled oscillator resonant cavity, an even harmonic generator circuit and a self-mixing frequency tripler circuit. The voltage-controlled oscillator resonant cavity comprises a voltage transformation diode array and a first-stage mode switching capacitor. The even harmonic generator circuit comprises a group of cross coupling tubes, one end of each cross coupling tube is electrically connected to the two differential ends of the voltage-controlled oscillator, and the even harmonic generator circuit serves as an even harmonic generator and is electrically connected to the self-mixing frequency tripler circuit. The self-mixing frequency tripler circuit comprises a differential unit and a resonant cavity, and one end of the self-mixing frequency tripler circuit is electrically connected to the even harmonic generator circuit. The low-frequency voltage-controlled oscillator and the self-mixing frequency tripler circuit achieve current multiplexing, the even harmonic generator circuit serves as a negative resistor of the oscillator and also serves as an even harmonic generator of the self-mixing frequency tripler, and the linearity of the millimeter wave frequency source is improved.

The invention provides a temperature compensation method and device for laser frequency doubling, electronic equipment and a storage medium. The method comprises the steps that the initial temperature of a frequency doubling crystal of a frequency doubling laser is determined according to the power of input fundamental frequency light; adjusting the initial temperature, and determining a target temperature corresponding to the maximum value of the frequency-doubled optical power output by the frequency-doubled laser; according to the invention, active following compensation is carried out on the temperature of the frequency doubling crystal, and the temperature of the frequency doubling crystal is controlled at the target temperature, so that the active following compensation is carried out on the temperature of the frequency doubling crystal, thereby enabling the frequency doubling laser to maintain high output power, and further improving the frequency doubling efficiency of the crystal. Therefore, the laser frequency multiplier can quickly reach a steady state in the power switching process, and accurate dynamic control of the laser frequency multiplication system is realized.

The invention discloses an ultra-wideband ultra-low power consumption millimeter wave injection locking quadrupler, which realizes frequency multiplication bandwidth exceeding 100 GHz, 3 dB working bandwidth exceeding 10 GHz, 10 mW total power consumption and 1t under millimeter wave frequency through innovative resonant cavity design, adaptive bias and output equalization technology. And the output power fluctuation of 0.1 dB is obviously superior to that of other existing schemes, and the millimeter-wave radar antenna is suitable for a 76-81 GHz high-performance millimeter-wave radar system.

A frequency multiplier includes an oscillator and a harmonic generator. The oscillator has a resonant cavity and a negative resistance unit. The negative resistance unit includes a feedback capacitor and a parasitic capacitor. The feedback capacitor and the parasitic capacitor collectively provide negative resistance for the resonant cavity. The harmonic generator is configured to generate a harmonic signal based on a fundamental frequency signal taken as input. The oscillator is electrically connected to the harmonic generator, and is configured to receive the harmonic signal, and to output an intrinsic signal with the resonant cavity. A frequency of the intrinsic signal is a multiple of a frequency of the fundamental frequency signal.

Embodiments described herein are directed to a position sensor that includes a first receiver coil electrically coupled to a first multiplier to generate a first output, a second receiver coil electrically coupled to a second multiplier to generate a second output, a transmitter coil electrically coupled to an oscillator, the oscillator electrically coupled to a third multiplier to generate a third output, a phase-locked loop electrically coupled to the oscillator and the transmitter coil, a summing circuit configured to receive the first output and the second output and configured to generate a signal, a phase detector configured to receive the signal and the third output, the phase detector outputting a sense signal that is indicative of an angle of the motor position sensor, and a pair of op amps electrically coupled to the phase detector. The op amps configured to output an analog differential signal and a differential phase signal.

The embodiment of the application provides a voltage-controlled oscillator, an oscillator circuit, a chip and an electronic device, relates to the technical field of communication or radar detection, and can improve the linearity of the voltage-controlled oscillator. The voltage-controlled oscillator comprises a voltage-controlled oscillator resonant cavity, an even harmonic generator circuit and a self-mixing tripler circuit. The voltage-controlled oscillator resonant cavity comprises a voltage change diode array and a first mode switching capacitor. The even harmonic generator circuit comprises a group of cross-coupled tubes, one end of the group of cross-coupled tubes is electrically connected to differential two ends of the voltage-controlled oscillator, and the group of cross-coupled tubes simultaneously serves as an even harmonic generator and is electrically connected to the self-mixing tripler circuit. The self-mixing tripler circuit comprises a differential unit and a resonant cavity, and one end of the self-mixing tripler circuit is electrically connected to the even harmonic generator circuit. The low-frequency voltage-controlled oscillator and the self-mixing tripler circuit realize current multiplexing, the even harmonic generator circuit serves as an even harmonic generator of the self-mixing tripler in addition to serving as negative resistance of the oscillator, and the linearity of the millimeter wave frequency source is improved.

The utility model discloses a Ka wave band frequency source based on a phase-locked loop structure, which comprises a master controller, a crystal oscillator module, a phase-locked loop module and a frequency doubling processing module, and the phase-locked loop module is respectively connected with the master controller, the crystal oscillator module and the frequency doubling processing module. The phase-locked loop module comprises a power supply module, a phase-locked loop main chip, a loop filter module and a locking state indication module, and the phase-locked loop main chip is respectively connected with the power supply module, the loop filter module, the locking state indication module and the main controller; the frequency doubling processing module comprises a low-pass filter, a high-pass filter, a fixed frequency attenuator, a power amplifier, a frequency doubling chip and a band-pass filter which are connected in sequence, and the input end of the low-pass filter is connected with the output end of the voltage-controlled oscillator. The frequency output by the phase-locked loop module is input to the frequency multiplication processing module, and the frequency multiplication processing module carries out harmonic suppression, attenuation, amplification and frequency multiplication processing on the input frequency, so that the output frequency has the advantages of low phase noise, wide frequency band and high stability.

The present invention discloses a relay node download method and device based on an optical frequency comb. The present invention is used to address the problem of difficulty for nodes in obtaining frequency information transmitted in a link in a time-frequency information transmission system. The present invention is characterized in that an optical comb signal transmitted and a return optical comb signal in the optical comb-based time-frequency transmission system link are obtained through an optical coupling module. The transmitted optical comb signal is converted into an electrical signal through a photoelectric detection module, and then two electrical signals are obtained through a power distribution module. The center frequencies of the electrical bandpass filters connected to the two electrical signals are then adjusted to obtain low-order harmonic components and high-order harmonic components with a frequency doubled. The return optical comb signal is mirrored, and the two low-order harmonic components are connected to a phase detection module to obtain relative delay information. Based on this delay information, the high-order harmonic components are directly phase-shifted through a phase shift module to restore the original signal. Compared with the prior art, the present invention fully utilizes the characteristic of optical comb signals containing multiple frequency components, avoids the use of complex electrical components such as frequency dividers and multipliers, reduces costs, significantly reduces electrical noise at the download node, and improves the stability of node frequency extraction.

A system for controlling power provided to an electronic device is disclosed herein. The system includes a switching direct current (DC) power source configured to provide an input voltage at a first frequency, a forward converter coupled to the switching DC power source, wherein the forward converter outputs a first voltage and a second voltage, a frequency multiplier coupled to the forward converter and configured to receive the first voltage as an input, a switch coupled to the frequency multiplier and configured to be driven by the frequency multiplier, wherein the switch outputs a fourth voltage, and a voltage multiplier coupled to the switch and configured to be driven by the switch, wherein the voltage multiplier receives the second voltage and outputs a fifth voltage that is greater than the second voltage.

The invention discloses a frequency duplex synthesis method for realizing a terahertz ultra-wideband frequency multiplier, and relates to the technical field of submillimeter wave / terahertz solid-state frequency multipliers, a'frequency division-frequency multiplication-frequency combination 'duplex circuit architecture is adopted, a frequency division circuit and a frequency combination circuit are both based on a hybrid network type waveguide duplexer design, and the frequency division-frequency multiplication-frequency combination duplex circuit design is adopted. The frequency multiplier circuit is realized by adopting a hybrid integrated frequency doubler, the cost is low, the cavity structure is completely processed by adopting a CNC milling process, and the solid-state characteristic is realized; therefore, under the condition that the frequency doubling / frequency conversion efficiency is not reduced, the frequency doubler capable of covering the full frequency band of 170-260GHz (WR-4 frequency band) can be realized, namely, the double advantages of wide frequency band and high efficiency of the frequency doubler are considered, and the technical problem that the wide frequency band and the high efficiency of a submillimeter wave / terahertz schottky frequency doubler at the present stage cannot be achieved at the same time is solved.

This invention belongs to the field of time-frequency unification and relates to a fast discipline method and system based on a high-stability OCXO. The method includes selecting a primary reference source, inputting the reference signal into a phase-locked loop frequency multiplier for frequency multiplication, and inputting the processed high-frequency reference signal into a high-precision phase measurement module. A monitoring and processing platform controls two frequency standard signals output from the OCXO frequency standard source through a control word. The first frequency standard signal of the first channel is input into a phase-locked loop frequency divider, and the second frequency standard signal is output to the high-precision phase measurement module. The third frequency standard signal of the second channel is directly input into the high-precision phase measurement module to measure the phase difference between the high-frequency reference signal and the second frequency standard signal. The monitoring and processing platform outputs an updated control word through a fast discipline algorithm to correct the OCXO frequency standard source parameters. The fast discipline process continues until the OCXO frequency standard source stabilizes and the phase difference with the reference source converges, ending the fast discipline state.

A method and device for outputting frequency multiplication signal having high harmonic suppression, and a storage medium. The method includes: obtaining initial signal; inputting the initial signal into target circuit, where the target circuit includes parallel circuit, first circuit of the parallel circuit is provided with frequency multiplier, second circuit of the parallel circuit is provided with phase adjustment module, the first circuit is connected to input end and output ends of the target circuit, the second circuit is disconnected from the input end and the output end, the phase adjustment module is configured to adjust a phase of the second circuit to a target phase, and phase difference between the target phase and a first phase of the first circuit is greater than 90 degrees; taking a target signal output from the target circuit as frequency multiplication signal of the initial signal.

This high-frequency signal generation device is provided with: (A) a clock signal generation unit that generates a clock signal using a harmonic component generated by an amplifier having nonlinearity; (B) a direct digital synthesizer (DDS) that generates a frequency signal having a frequency set by the frequency setting data, using the clock signal as a system clock for operating the internal processing; and (C) a frequency-increasing unit that is configured from a non-active frequency multiplier that does not use an active element, and that increases the frequency of the frequency signal generated by the DDS. A clock signal is generated using a harmonic component generated by an amplifier having nonlinearity, and in a frequency variable function, a delay time is shortened to cope with a high speed, and spurious and phase noise are suppressed to cope with a high C / N ratio.

The invention relates to the field of signal processing, in particular to a frequency doubler device for suppressing quartic stray. The device comprises: a power divider-90 DEG for receiving an input signal; the input ends of the two frequency doublers are respectively connected with the two output ends of the power divider (-90 degrees); and the input end of the power combiner (180 DEG) is connected with the output ends of the two frequency doublers. According to the frequency multiplier device for suppressing the quartic stray, the high suppression degree of quartic harmonics is achieved, and the frequency multiplier device has a large application prospect in broadband radar signal generation.

This invention discloses a reconfigurable injection-locked local oscillator system, comprising a voltage-controlled oscillator (VCO), an injection-locked frequency multiplier (ILL), and an injection-locked amplifier (ILA). The first output terminal of the VCO is connected to the first input terminal of the ILL, the second output terminal of the VCO is connected to the second input terminal of the ILL, the first output terminal of the ILL is connected to the first input terminal of the ILL, and the second output terminal of the ILL is connected to the second input terminal of the ILL. The VCO generates a low-frequency fundamental wave, the ILL multiplier performs frequency multiplication on the low-frequency fundamental wave to generate a second or third harmonic wave, and the ILL amplifies the power of the second or third harmonic wave, thereby improving the accuracy of the output millimeter-wave frequency.

This invention belongs to the field of communication and signal processing technology, specifically relating to a GMSK quadrature modulator. It comprises a bidirectional counter, a four-curve data table, an in-phase component processor, and a quadrature component processor, forming a quadrature modulation baseband generator. A binary symbol sequence and a system clock are input to this generator. The system clock is divided to generate a symbol frequency multiplier clock, driving the bidirectional counter to oscillate and count repeatedly. The in-phase and quadrature component processors process and generate curve selection types and curve symbols. The output of the bidirectional counter is used as the curve lookup table address. A quadrature modulation baseband signal is generated by looking up the pre-stored four-curve data table, and then input to a digital up-converter (DUC) circuit to produce a GMSK modulated signal. Compared to existing technologies, this invention is more resource-efficient, has higher accuracy, and lower spurious emissions, making it highly suitable for embedded system or programmable device design and implementation.

The invention discloses a radio frequency microwave frequency multiplier which comprises an input resonance filter network, an oscillation amplification network and an output resonance filter network, the oscillation amplification network is adopted as a core architecture, and high power and high gain in a microwave frequency band can be achieved. And meanwhile, the self-adaptive linearization feedback network is used for adjusting the linearity component of the stacked field effect transistors at the bottom layer of the self-bias negative feedback amplification network, so that the whole radio frequency microwave frequency multiplier obtains good high gain, high linearity and high power output capability.

Embodiments of the present application provide a phase detection circuit, a method and an electronic device. The circuit comprises: a quadrature generator, a frequency multiplier, a comparator and a bidirectional shift register. The frequency multiplier is connected to the quadrature generator at an input end and connected to the comparator at an output end, configured to multiply the differential signal generated by the quadrature generator, and output the multiplied signal to the comparator; the comparator is configured to compare the reference signal and the signal output by the frequency multiplier, generate high and low levels, and output the high and low levels to the bidirectional shift register; and the bidirectional shift register is connected to the quadrature generator at an output end, configured to change the phase difference of the differential signal generated by the quadrature generator according to the high and low levels output by the comparator. Through the embodiments of the present application, the performance deterioration problem caused by poor quadrature of the frequency multiplier in the related art is solved.

This invention discloses a millimeter-wave broadband high harmonic suppression tripler, comprising an input matching network, a time-domain shaping tripler unit, and a differential common-source output stage. The proposed time-domain shaping tripler unit employs transistor pairs with different gate widths and bias voltages to superimpose two sets of voltage signals of different amplitudes in the time domain, thereby enhancing the inherent harmonic suppression of the tripler unit. Furthermore, by connecting a common-mode impedance control in series at the center tap of the primary inductor coil of the output transformer of the tripler unit, the output power of the third harmonic is further improved. The input matching network achieves single-ended to differential conversion, with its primary and secondary coil center taps grounded and open-circuited respectively in a counterintuitive manner, improving differential-mode balance and common-mode stability. Simultaneously, by using a series-coupled inductor, the quality factor of the transistor input impedance is reduced, improving the bandwidth performance of the tripler.

The utility model discloses a low power consumption multichannel transmit-receive frequency agility device, which comprises a fast hopping frequency source unit, an up-conversion channel unit, a down-conversion channel unit and a control and power supply unit, and a frequency source assembly comprises a one-to-two power divider A, a first phase-locked loop branch, a second phase-locked loop branch, a one-out-of-two switch, a one-to-two power divider B and a frequency multiplier. The first phase-locked loop branch and the second phase-locked loop branch are respectively connected between the one-to-two power divider A and the one-out-of-two switch, the one-out-of-two switch is connected with the one-to-two power divider B, the rear end of the one-to-two power divider B is provided with a first output branch and a second output branch, and the frequency multiplier is arranged in the second output branch; the up-conversion channel unit and the down-conversion channel unit are respectively connected with the frequency source assembly. Two phase-locked loop circuits are configured for a channel to form a set of architecture in which a local oscillator signal 1 and a local oscillator signal 2 share a frequency source, so that the use of phase-locked loops is reduced, and the power consumption and the heat consumption are reduced.

The application discloses a duty cycle tunable frequency multiplier, a phase-locked loop circuit and electronic equipment, wherein the frequency multiplier comprises an input port, a first adjusting unit, a second adjusting unit, a third adjusting unit, a first control unit, a second control unit, a third control unit and a frequency multiplication unit. The frequency multiplier performs delay processing on a reference frequency through the adjusting units, selects a target delay signal through the control units, and then multiplies the reference frequency signal to generate a frequency multiplication signal, so that the duty cycle of the output clock signal is flexibly adjusted while the frequency multiplication is realized.

The present invention provides a low-noise broadband millimeter-wave frequency source based on multi-phase injection locking, which includes a multi-phase clock generation module and a multi-phase injection-locked frequency multiplier module; the differential input end of the multi-phase clock generation module is connected to the injection voltage signal of an external signal source; the multi-phase clock generation module is used to generate a plurality of voltage signals with different phases from the injection voltage signal of the external signal source and output them to the multi-phase injection-locked frequency multiplier module; the multi-phase injection-locked frequency multiplier module includes a resonant cavity, and the resonant cavity includes a in-phase coupling transformer, a in-phase coupling transformer and an anti-phase coupling transformer. The plurality of voltage signals with different phases are respectively converted into current signals and then divided into two groups of injection signal sources. The two groups of injection signal sources are respectively injected into the in-phase coupling transformer and the in-phase coupling transformer and then output through the reverse coupling transformer. This millimeter-wave frequency source can reduce harmonic spurs in the entire frequency band and improve the power of the output signal.

The application discloses a kind of very small step local oscillator devices, comprising: reference signal source;DDS synthesizer is used to receive the output signal of reference signal source, and output the first output signal of lower frequency;First filter is used to filter the first output signal, and obtain the first to-be-mixed signal;Frequency multiplier is used to receive the output signal of reference signal source, and output the second output signal of higher frequency;Second filter is used to filter the second output signal, and obtain the second to-be-mixed signal;Mixing frequency ware is used to mix the first to-be-mixed signal and the second to-be-mixed signal, and obtain mixed signal;Third filter is used to filter mixed signal, and obtain phase-locked loop reference signal;Phase-locked loop module is used to receive phase-locked loop reference signal, and output local oscillator signal.It also discloses a kind of very small step local oscillator method.The application is while realizing very small step local oscillator scheme, also has very low decimal step spur.

The application relates to a thin film electric frequency doubling device based on a band edge enhancement effect. When a fundamental wave is obliquely incident, a voltage is applied to a first electrode layer and a second electrode layer. The fundamental wave passes through the transparent first electrode layer and a thin film layer, is reflected by the second electrode layer, and then passes through the thin film layer and exits from the first electrode layer. In the process, the third-order nonlinear susceptibility is enhanced by using the band edge enhancement effect of the thin film layer, so that the generation efficiency of the second harmonic wave appears a sharp peak at a certain wavelength position. The fundamental wave wavelength corresponding to the sharp peak is just covered by the energy band of the thin film layer, so that the generation efficiency of the second harmonic wave is greatly improved under the condition of applying the voltage. Further, an extremely high modulation ratio is obtained, and the modulation depth is much higher than that of a conventional electric frequency doubling device. The thin film electric frequency doubling device based on the band edge enhancement effect disclosed in the application can realize the purpose of realizing strong modulation by using electric frequency doubling in a nonlinear material.

The invention provides a design method of an ultra-low phase noise frequency synthesizer based on regenerative frequency division. The design method comprises the following steps: step 1, enabling a source frequency to generate a multiple frequency through a frequency multiplier; step 2, inputting the multiple frequency into a two-way power divider, and generating an excessive frequency 1 through a phase-locked loop 1 by one path of output of the two-way power divider; the other path of output of the two-way power divider generates an excessive frequency 2 through a phase-locked loop 2; 3, the transition frequency 1 passes through a digital frequency divider and a regeneration frequency divider in sequence to generate transition frequency 3; and step 4, inputting the transition frequency 2 and the transition frequency 3 into a frequency mixer for frequency mixing, and then processing through a filter and an amplifier again to generate a target frequency. When the circuit topology and the transition frequency are designed, how to reduce the phase noise index is considered. According to the design method, the low-phase noise characteristic of the regenerative frequency divider is fully utilized.