145 results about "Frequency multiplier" patented technology

The utility model provides a large-bandwidth 220G terahertz emission front end, which comprises a frequency doubler, a filter, an amplifier, a one-to-two power divider, a first one-to-four power divider and a second one-to-four power divider, wherein the frequency doubler, the filter, the amplifier and the one-to-two power divider are sequentially connected, and the first one-to-four power divider and the second one-to-four power divider are respectively connected with two output ends of the one-to-two power divider. The output end of the first one-to-four power divider and the output end of the second one-to-four power divider are connected with four transmitter frequency doubling amplification modules. According to the utility model, input 15G-21.7 GHz low-frequency signals are subjected to frequency doubling amplification to obtain 30G-42.4 GHz signals, the 30G-42.4 GHz signals are divided into 8 paths of transmitter frequency doubling amplification modules 7 through two power division links, the 8 paths of signals are respectively controlled by a single-pole four-throw switch to obtain 32 paths of signals, the 60-84.8 GHz signals are obtained after frequency doubling amplification, and the 60-84.8 GHz signals are transmitted to the transmitter frequency doubling amplification modules 7. The signals are divided into 64 paths of signals under the control of a single-pole double-throw switch, and the 64 paths of signals are amplified by a frequency tripler to obtain final 180-260GHz emission signals. According to the utility model, emission of multi-channel signals can be simultaneously realized, and the production and manufacturing cost of the terahertz front end is obviously reduced.

The invention provides a temperature compensation method and device for laser frequency doubling, electronic equipment and a storage medium. The method comprises the steps that the initial temperature of a frequency doubling crystal of a frequency doubling laser is determined according to the power of input fundamental frequency light; adjusting the initial temperature, and determining a target temperature corresponding to the maximum value of the frequency-doubled optical power output by the frequency-doubled laser; according to the invention, active following compensation is carried out on the temperature of the frequency doubling crystal, and the temperature of the frequency doubling crystal is controlled at the target temperature, so that the active following compensation is carried out on the temperature of the frequency doubling crystal, thereby enabling the frequency doubling laser to maintain high output power, and further improving the frequency doubling efficiency of the crystal. Therefore, the laser frequency multiplier can quickly reach a steady state in the power switching process, and accurate dynamic control of the laser frequency multiplication system is realized.

A frequency multiplier includes an oscillator and a harmonic generator. The oscillator has a resonant cavity and a negative resistance unit. The negative resistance unit includes a feedback capacitor and a parasitic capacitor. The feedback capacitor and the parasitic capacitor collectively provide negative resistance for the resonant cavity. The harmonic generator is configured to generate a harmonic signal based on a fundamental frequency signal taken as input. The oscillator is electrically connected to the harmonic generator, and is configured to receive the harmonic signal, and to output an intrinsic signal with the resonant cavity. A frequency of the intrinsic signal is a multiple of a frequency of the fundamental frequency signal.

Embodiments described herein are directed to a position sensor that includes a first receiver coil electrically coupled to a first multiplier to generate a first output, a second receiver coil electrically coupled to a second multiplier to generate a second output, a transmitter coil electrically coupled to an oscillator, the oscillator electrically coupled to a third multiplier to generate a third output, a phase-locked loop electrically coupled to the oscillator and the transmitter coil, a summing circuit configured to receive the first output and the second output and configured to generate a signal, a phase detector configured to receive the signal and the third output, the phase detector outputting a sense signal that is indicative of an angle of the motor position sensor, and a pair of op amps electrically coupled to the phase detector. The op amps configured to output an analog differential signal and a differential phase signal.

The embodiment of the application provides a voltage-controlled oscillator, an oscillator circuit, a chip and an electronic device, relates to the technical field of communication or radar detection, and can improve the linearity of the voltage-controlled oscillator. The voltage-controlled oscillator comprises a voltage-controlled oscillator resonant cavity, an even harmonic generator circuit and a self-mixing tripler circuit. The voltage-controlled oscillator resonant cavity comprises a voltage change diode array and a first mode switching capacitor. The even harmonic generator circuit comprises a group of cross-coupled tubes, one end of the group of cross-coupled tubes is electrically connected to differential two ends of the voltage-controlled oscillator, and the group of cross-coupled tubes simultaneously serves as an even harmonic generator and is electrically connected to the self-mixing tripler circuit. The self-mixing tripler circuit comprises a differential unit and a resonant cavity, and one end of the self-mixing tripler circuit is electrically connected to the even harmonic generator circuit. The low-frequency voltage-controlled oscillator and the self-mixing tripler circuit realize current multiplexing, the even harmonic generator circuit serves as an even harmonic generator of the self-mixing tripler in addition to serving as negative resistance of the oscillator, and the linearity of the millimeter wave frequency source is improved.

The utility model discloses a Ka wave band frequency source based on a phase-locked loop structure, which comprises a master controller, a crystal oscillator module, a phase-locked loop module and a frequency doubling processing module, and the phase-locked loop module is respectively connected with the master controller, the crystal oscillator module and the frequency doubling processing module. The phase-locked loop module comprises a power supply module, a phase-locked loop main chip, a loop filter module and a locking state indication module, and the phase-locked loop main chip is respectively connected with the power supply module, the loop filter module, the locking state indication module and the main controller; the frequency doubling processing module comprises a low-pass filter, a high-pass filter, a fixed frequency attenuator, a power amplifier, a frequency doubling chip and a band-pass filter which are connected in sequence, and the input end of the low-pass filter is connected with the output end of the voltage-controlled oscillator. The frequency output by the phase-locked loop module is input to the frequency multiplication processing module, and the frequency multiplication processing module carries out harmonic suppression, attenuation, amplification and frequency multiplication processing on the input frequency, so that the output frequency has the advantages of low phase noise, wide frequency band and high stability.

The invention discloses a frequency duplex synthesis method for realizing a terahertz ultra-wideband frequency multiplier, and relates to the technical field of submillimeter wave / terahertz solid-state frequency multipliers, a'frequency division-frequency multiplication-frequency combination 'duplex circuit architecture is adopted, a frequency division circuit and a frequency combination circuit are both based on a hybrid network type waveguide duplexer design, and the frequency division-frequency multiplication-frequency combination duplex circuit design is adopted. The frequency multiplier circuit is realized by adopting a hybrid integrated frequency doubler, the cost is low, the cavity structure is completely processed by adopting a CNC milling process, and the solid-state characteristic is realized; therefore, under the condition that the frequency doubling / frequency conversion efficiency is not reduced, the frequency doubler capable of covering the full frequency band of 170-260GHz (WR-4 frequency band) can be realized, namely, the double advantages of wide frequency band and high efficiency of the frequency doubler are considered, and the technical problem that the wide frequency band and the high efficiency of a submillimeter wave / terahertz schottky frequency doubler at the present stage cannot be achieved at the same time is solved.

This invention belongs to the field of time-frequency unification and relates to a fast discipline method and system based on a high-stability OCXO. The method includes selecting a primary reference source, inputting the reference signal into a phase-locked loop frequency multiplier for frequency multiplication, and inputting the processed high-frequency reference signal into a high-precision phase measurement module. A monitoring and processing platform controls two frequency standard signals output from the OCXO frequency standard source through a control word. The first frequency standard signal of the first channel is input into a phase-locked loop frequency divider, and the second frequency standard signal is output to the high-precision phase measurement module. The third frequency standard signal of the second channel is directly input into the high-precision phase measurement module to measure the phase difference between the high-frequency reference signal and the second frequency standard signal. The monitoring and processing platform outputs an updated control word through a fast discipline algorithm to correct the OCXO frequency standard source parameters. The fast discipline process continues until the OCXO frequency standard source stabilizes and the phase difference with the reference source converges, ending the fast discipline state.

This high-frequency signal generation device is provided with: (A) a clock signal generation unit that generates a clock signal using a harmonic component generated by an amplifier having nonlinearity; (B) a direct digital synthesizer (DDS) that generates a frequency signal having a frequency set by the frequency setting data, using the clock signal as a system clock for operating the internal processing; and (C) a frequency-increasing unit that is configured from a non-active frequency multiplier that does not use an active element, and that increases the frequency of the frequency signal generated by the DDS. A clock signal is generated using a harmonic component generated by an amplifier having nonlinearity, and in a frequency variable function, a delay time is shortened to cope with a high speed, and spurious and phase noise are suppressed to cope with a high C / N ratio.

The invention relates to the field of signal processing, in particular to a frequency doubler device for suppressing quartic stray. The device comprises: a power divider-90 DEG for receiving an input signal; the input ends of the two frequency doublers are respectively connected with the two output ends of the power divider (-90 degrees); and the input end of the power combiner (180 DEG) is connected with the output ends of the two frequency doublers. According to the frequency multiplier device for suppressing the quartic stray, the high suppression degree of quartic harmonics is achieved, and the frequency multiplier device has a large application prospect in broadband radar signal generation.

This invention discloses a reconfigurable injection-locked local oscillator system, comprising a voltage-controlled oscillator (VCO), an injection-locked frequency multiplier (ILL), and an injection-locked amplifier (ILA). The first output terminal of the VCO is connected to the first input terminal of the ILL, the second output terminal of the VCO is connected to the second input terminal of the ILL, the first output terminal of the ILL is connected to the first input terminal of the ILL, and the second output terminal of the ILL is connected to the second input terminal of the ILL. The VCO generates a low-frequency fundamental wave, the ILL multiplier performs frequency multiplication on the low-frequency fundamental wave to generate a second or third harmonic wave, and the ILL amplifies the power of the second or third harmonic wave, thereby improving the accuracy of the output millimeter-wave frequency.

This invention belongs to the field of communication and signal processing technology, specifically relating to a GMSK quadrature modulator. It comprises a bidirectional counter, a four-curve data table, an in-phase component processor, and a quadrature component processor, forming a quadrature modulation baseband generator. A binary symbol sequence and a system clock are input to this generator. The system clock is divided to generate a symbol frequency multiplier clock, driving the bidirectional counter to oscillate and count repeatedly. The in-phase and quadrature component processors process and generate curve selection types and curve symbols. The output of the bidirectional counter is used as the curve lookup table address. A quadrature modulation baseband signal is generated by looking up the pre-stored four-curve data table, and then input to a digital up-converter (DUC) circuit to produce a GMSK modulated signal. Compared to existing technologies, this invention is more resource-efficient, has higher accuracy, and lower spurious emissions, making it highly suitable for embedded system or programmable device design and implementation.

The invention discloses a radio frequency microwave frequency multiplier which comprises an input resonance filter network, an oscillation amplification network and an output resonance filter network, the oscillation amplification network is adopted as a core architecture, and high power and high gain in a microwave frequency band can be achieved. And meanwhile, the self-adaptive linearization feedback network is used for adjusting the linearity component of the stacked field effect transistors at the bottom layer of the self-bias negative feedback amplification network, so that the whole radio frequency microwave frequency multiplier obtains good high gain, high linearity and high power output capability.

Embodiments of the present application provide a phase detection circuit, a method and an electronic device. The circuit comprises: a quadrature generator, a frequency multiplier, a comparator and a bidirectional shift register. The frequency multiplier is connected to the quadrature generator at an input end and connected to the comparator at an output end, configured to multiply the differential signal generated by the quadrature generator, and output the multiplied signal to the comparator; the comparator is configured to compare the reference signal and the signal output by the frequency multiplier, generate high and low levels, and output the high and low levels to the bidirectional shift register; and the bidirectional shift register is connected to the quadrature generator at an output end, configured to change the phase difference of the differential signal generated by the quadrature generator according to the high and low levels output by the comparator. Through the embodiments of the present application, the performance deterioration problem caused by poor quadrature of the frequency multiplier in the related art is solved.

This invention discloses a millimeter-wave broadband high harmonic suppression tripler, comprising an input matching network, a time-domain shaping tripler unit, and a differential common-source output stage. The proposed time-domain shaping tripler unit employs transistor pairs with different gate widths and bias voltages to superimpose two sets of voltage signals of different amplitudes in the time domain, thereby enhancing the inherent harmonic suppression of the tripler unit. Furthermore, by connecting a common-mode impedance control in series at the center tap of the primary inductor coil of the output transformer of the tripler unit, the output power of the third harmonic is further improved. The input matching network achieves single-ended to differential conversion, with its primary and secondary coil center taps grounded and open-circuited respectively in a counterintuitive manner, improving differential-mode balance and common-mode stability. Simultaneously, by using a series-coupled inductor, the quality factor of the transistor input impedance is reduced, improving the bandwidth performance of the tripler.

The application discloses a duty cycle tunable frequency multiplier, a phase-locked loop circuit and electronic equipment, wherein the frequency multiplier comprises an input port, a first adjusting unit, a second adjusting unit, a third adjusting unit, a first control unit, a second control unit, a third control unit and a frequency multiplication unit. The frequency multiplier performs delay processing on a reference frequency through the adjusting units, selects a target delay signal through the control units, and then multiplies the reference frequency signal to generate a frequency multiplication signal, so that the duty cycle of the output clock signal is flexibly adjusted while the frequency multiplication is realized.

The application discloses a kind of very small step local oscillator devices, comprising: reference signal source;DDS synthesizer is used to receive the output signal of reference signal source, and output the first output signal of lower frequency;First filter is used to filter the first output signal, and obtain the first to-be-mixed signal;Frequency multiplier is used to receive the output signal of reference signal source, and output the second output signal of higher frequency;Second filter is used to filter the second output signal, and obtain the second to-be-mixed signal;Mixing frequency ware is used to mix the first to-be-mixed signal and the second to-be-mixed signal, and obtain mixed signal;Third filter is used to filter mixed signal, and obtain phase-locked loop reference signal;Phase-locked loop module is used to receive phase-locked loop reference signal, and output local oscillator signal.It also discloses a kind of very small step local oscillator method.The application is while realizing very small step local oscillator scheme, also has very low decimal step spur.

The application relates to a thin film electric frequency doubling device based on a band edge enhancement effect. When a fundamental wave is obliquely incident, a voltage is applied to a first electrode layer and a second electrode layer. The fundamental wave passes through the transparent first electrode layer and a thin film layer, is reflected by the second electrode layer, and then passes through the thin film layer and exits from the first electrode layer. In the process, the third-order nonlinear susceptibility is enhanced by using the band edge enhancement effect of the thin film layer, so that the generation efficiency of the second harmonic wave appears a sharp peak at a certain wavelength position. The fundamental wave wavelength corresponding to the sharp peak is just covered by the energy band of the thin film layer, so that the generation efficiency of the second harmonic wave is greatly improved under the condition of applying the voltage. Further, an extremely high modulation ratio is obtained, and the modulation depth is much higher than that of a conventional electric frequency doubling device. The thin film electric frequency doubling device based on the band edge enhancement effect disclosed in the application can realize the purpose of realizing strong modulation by using electric frequency doubling in a nonlinear material.

The invention provides a design method of an ultra-low phase noise frequency synthesizer based on regenerative frequency division. The design method comprises the following steps: step 1, enabling a source frequency to generate a multiple frequency through a frequency multiplier; step 2, inputting the multiple frequency into a two-way power divider, and generating an excessive frequency 1 through a phase-locked loop 1 by one path of output of the two-way power divider; the other path of output of the two-way power divider generates an excessive frequency 2 through a phase-locked loop 2; 3, the transition frequency 1 passes through a digital frequency divider and a regeneration frequency divider in sequence to generate transition frequency 3; and step 4, inputting the transition frequency 2 and the transition frequency 3 into a frequency mixer for frequency mixing, and then processing through a filter and an amplifier again to generate a target frequency. When the circuit topology and the transition frequency are designed, how to reduce the phase noise index is considered. According to the design method, the low-phase noise characteristic of the regenerative frequency divider is fully utilized.

The application discloses a FPGA global reset synchronization circuit, a chip, a verification simulation system and a method. The FPGA global reset synchronization circuit comprises a clock signal channel and a reset signal channel. The clock signal channel comprises a filter and a frequency multiplier. The filter is used for filtering an input first clock signal, the frequency multiplier is used for frequency multiplication after the filtering, a second clock signal is generated, the frequency of the second clock signal is an integer multiple of the first clock signal, and the second clock signal is output to provide a clock signal for user logic in the FPGA chip. The reset signal channel comprises a cross-clock-domain transmission circuit. The cross-clock-domain transmission circuit is used for outputting an input reset signal after the cross-clock-domain transmission to provide a global reset signal for the user logic in the FPGA chip. The application does not depend on the distance of the FPGA and the length of the signal line, and is especially suitable for clock reset synchronization of a large number of FPGAs when the FPGAs are used for chip verification and simulation.

The invention discloses a frequency quadrupler circuit, and belongs to the technical field of integrated circuits. The circuit comprises a first frequency multiplication stage and a second frequency multiplication stage which are cascaded. The core improvement is that the control ends of the third transistor and the fourth transistor in the second frequency multiplication stage are directly and electrically connected to the output nodes of the first transistor and the second transistor in the first frequency multiplication stage respectively. According to the connection mode, secondary harmonic signals which are naturally generated at two output nodes of the first-stage push-pull structure and are matched in amplitude and opposite in phase are directly used as differential input of the second stage, and therefore a necessary inter-stage transformer in the prior art is thoroughly omitted. The interstage transformer effectively solves the problems that in a traditional scheme, an interstage transformer is difficult to achieve at low frequency, the size is large, and the phase performance of differential signals is prone to being deteriorated, and has the advantages of being simplified in structure, reduced in size and better in output power and harmonic suppression performance.

Full bridge converter-circuit having a H-bridge, comprising a control circuit for operating the H-bridge in a first operation mode or a second operation mode, wherein the control circuit is configured that between switching from the first operation mode to the second operation mode a morphing operation mode is applied in which a positive inverter voltage pulse length on a first half-bridge of the H-bridge is determined on the basis of a negative inverter voltage pulse length on a second half-bridge of the H-bridge.

The application relates to a frequency doubling device and a multiple frequency doubling apparatus. The frequency doubling device comprises a substrate, a first high-voltage switch module, a second high-voltage switch module and a MOM capacitor. The application replaces the operational amplifier in the traditional frequency doubling circuit with the first high-voltage switch module, the second high-voltage switch module and the MOM capacitor, can generate a frequency doubling signal based on a reference pulse signal and an input voltage, and is suitable for a high-voltage environment. Meanwhile, due to the large chip area of the LDMOS tube, there is sufficient space above the first high-voltage switch module and the second high-voltage switch module to configure a suitable MOM capacitor.

The present disclosure relates to a frequency doubler circuit (100) comprising: first and second input terminals (101, 102) for receiving an input voltage signal (IN+, IN-) of a first frequency; a first pair of transistors (103a, 103b) connected between a supply line (104) and a first node (105); a second pair of transistors (106a, 106b) connected between a common line (107) and a second node (108), the first and second pairs of transistors (103a, 103b, 106a, 106b) having gates coupled to the respective first and second input terminals (101, 102); an output matching circuit (109) having first and second output terminals (110, 111) for providing an output voltage signal (OUT+, OUT-) of a second frequency; a first common gate transistor (112) connected between the first node (105) and a first input (113) of the output matching circuit (109); and a second common gate transistor (114) connected between the second node (108) and a second input (115) of the output matching circuit (109).

The application discloses a terahertz frequency doubler structure and method based on a nonlinear transmission line. The terahertz frequency doubler structure comprises an input waveguide-microstrip transition structure, a low-pass filter, a nonlinear transmission line, a band-pass filter and an output microstrip-waveguide transition structure which are cascaded in sequence. The nonlinear transmission line comprises a coplanar waveguide transmission line and a plurality of nonlinear capacitor devices arranged along the transmission direction of the coplanar waveguide transmission line. The nonlinear capacitor devices are connected in parallel to corresponding loading nodes of the coplanar waveguide transmission line. The equivalent capacitance of the nonlinear capacitor devices under working bias and the spacing between adjacent loading nodes are configured to regulate the dispersion relation of the nonlinear transmission line, so that the fundamental wave and the second harmonic satisfy the phase matching condition. The application regulates the capacitance of the nonlinear capacitor devices and the spacing between adjacent loading nodes, so that the fundamental wave and the second harmonic satisfy the phase matching condition, and the output efficiency of the target second harmonic is improved.

The invention discloses a frequency multiplier circuit based on a carbon nano tube Schottky diode. The frequency multiplier circuit comprises a carbon nano tube Schottky diode device, a fundamental 1 / 4 wavelength-based grounding transmission line at an input end, a second harmonic 1 / 4 wavelength-based open circuit transmission line at an output end, an input impedance matching network and an output impedance matching network. The carbon nanotube Schottky diode is located between the 1 / 4 wavelength grounding transmission line at the input end and the 1 / 4 wavelength open-circuit line at the output end; the input impedance matching network is positioned in front of the 1 / 4 wavelength grounding transmission line at the input end; and the output impedance matching network is positioned behind the 1 / 4 wavelength open-circuit line of the output end. According to the invention, through the process verification of the frequency multiplication circuit of the carbon nanotube device, the return loss under better fundamental wave and multiple frequency and lower frequency multiplication conversion loss are realized, and the frequency multiplication efficiency of the Schottky diode device is greatly improved.

A measurement system is described for the comprehensive characterization of millimeter-wave / sub-THz devices under both continuous-wave (CW) and modulated signal excitation. CW measurement setups, which include a vector network analyzer (VNA) and VNA frequency extenders (VNA-EXT) are enhanced by the integration of an IF vector signal generator (VSG) and IF vector signal analyzer (VSA). The measurement system incorporates a processing unit configured and operable to process a modulated test signal to mitigate nonlinear behavior. A linearization algorithm is used to linearize the frequency multipliers within the VNA-EXT, ensuring error-free RF modulated signal generation at a device under test (DUT) input reference plane.

The invention belongs to the technical field of temperature control equipment, and particularly relates to a one-source two-channel intelligent modulation frequency doubling light system based on an ILTA-EDFA-IQ-PPLN integrated architecture, which comprises a light path execution subsystem, a light path control subsystem, a light path control subsystem and a light path control subsystem, the device comprises a narrow linewidth laser, at least one erbium-doped optical fiber amplifier, at least one IQ orthogonal optical signal modulator, at least one periodically poled lithium niobate nonlinear frequency doubling device and a plurality of optical splitters, and is used for generating and regulating the conversion from 1560nm-waveband laser to 780nm-waveband laser; according to the invention, through a'one-source dual-channel 'topological design, high-stability narrow-linewidth laser and high-power adjustable laser are provided at the same time, and the function flexibility of the system is improved. According to the design, the system can adapt to multi-scene requirements in atom detection, such as cold atom interference, atom cooling capture and atom excitation detection, and multiple sets of laser systems do not need to be additionally configured, so that the use cost and complexity are reduced.

The utility model relates to a frequency multiplier module with phase noise deterioration value calibration, which comprises a first attenuator, a first filter, a second attenuator, a second filter and an intermediate driving module, and is characterized in that the signal input end of the frequency multiplier module is electrically connected with the first attenuator and the first filter; the output end of the first attenuator is electrically connected with the input end of the first filter; the output end of the frequency multiplier module is electrically connected with a second attenuator and a second filter, and the output end of the second attenuator is electrically connected with the input end of the second filter; and at least two groups of intermediate driving modules are electrically connected between the first filter and the second attenuator. According to the utility model, after calibration parameters are obtained by measuring each calibration channel and a finally output phase noise deterioration value, the frequency multiplier module can be applied to a scene without a high-precision measuring instrument, the frequency can reach the ground noise which can be measured by a common frequency spectrograph, and the accuracy of the frequency multiplier module after compensation and calibration also reaches a relatively high level.

The application discloses a low-power consumption full-differential multiple harmonic IQ zero intermediate frequency mixing circuit, which comprises a quadrature all-pass filter QAF, a phase-shifting driver based on current vector synthesis, an mth harmonic frequency mixer I_MIXER based on a frequency multiplication structure and an mth harmonic frequency mixer Q_MIXER based on a frequency multiplication structure. The input local oscillator differential signal is changed into a quadrature IQ differential signal through the quadrature all-pass filter, then the driver module is used to realize the amplification signal and phase-shifting functions, generate and amplify the differential signal with the required phase, and then the differential signal is injected into the IQ mixer, and the mixer is used to realize the frequency multiplication function through the circuit structure based on the frequency multiplier and the state class B bias state of the adjusting transistor, so that the local oscillator signal is multiplied and mixed with the input RF signal. The application saves the power consumption of the frequency multiplier, effectively reduces the power consumption of the local oscillator signal link, and optimizes the linearity and noise of the mixer.