179 results about "Synchronizer" patented technology

Embodiments of the present disclosure relate to synchronizing and managing data. A first event is received from a data source. The first event comprises an envelope comprising schema information associated with the first event. Schema drift is detected based at least in part on the schema information. A signal indicative of the schema drift is emitted to a mapping module. An activation ticket is received from the mapping module. The activation ticket corresponds to an updated mapping profile. The updated mapping profile is based at least in part on the signal. A second event is received from the data source. The second event is bound with the updated mapping profile.

The invention provides a method and equipment for testing the punctuality precision of a time synchronization device, belongs to the technical field of time frequency, and aims to solve the problems of low test automation, difficulty in quantification of environmental influence, inaccurate evaluation and high result subjectivity in the prior art. The method comprises the following steps: simulating an external signal interruption punctuality scene through a dual-channel radio frequency switch, and synchronously acquiring an output signal (time deviation data compared with a high-precision reference clock) of a time synchronization device and temperature, humidity and air pressure environment data; and analyzing the stability of the crystal oscillator through a TIE algorithm and Arron variance, and correlating modeling to quantify the environmental influence to generate a multi-dimensional evaluation report. The objective performance portrait containing parameters such as frequency drift and stability is provided, the defects of a traditional method are overcome, and a scientific basis is provided for equipment research and development optimization and model selection design.

A computerized method of information access handover between a first device and a second device of a user is presented. The method comprises displaying, on the first device, a QR code generated by a synchronizer. The method further comprises capturing the QR code with the second device for displaying the data record and providing a registration option for associating the data record with the user at a relying party. The method further comprises performing a web authentication registration and, in response to that the web authentication registration flow has been performed successfully, performing an information access handover and securing process. The information access handover and securing process comprises sharing, by the second device, the unique user identifier and the device identifier with the first device, storing them at the first device, and securing access to the data record. A corresponding system and computer program are provided, too.

The invention relates to the technical field of gearbox detection, in particular to a gearbox synchronizer dynamic performance detection system based on multi-modal signal fusion, comprising: a working condition simulation module comprising a first simulation unit for simulating a light-load driving working condition and a second simulation unit for simulating a heavy-load driving working condition; comprising a synchronization time length acquisition unit and a peak value acquisition unit; the state determining module is used for judging the performance grade of the synchronizer according to the operation stability characterization value of the synchronizer; the processing module is used for secondarily determining the performance grade of the synchronizer according to the abnormal vibration peak value proportion under the condition that the performance grade of the synchronizer is the second grade; and the strategy determination module is used for determining the reason of the synchronizer at the third grade according to the working condition failure ratio of the synchronizer under the condition that the performance grade of the synchronizer is the third grade. According to the invention, the synchronizer detection accuracy is improved.

The invention discloses a renewable energy coupling hydrogen production control method and system based on a virtual synchronous machine. The control method comprises the steps that a virtual synchronous machine controller obtains renewable energy power generation system parameters; setting a given value of a virtual synchronous machine controller; establishing a power distribution strategy of the ALK hydrogen production system, the PEM hydrogen production system and the electric energy storage device BMS system according to the output active power condition of the renewable energy power generation system; constructing a virtual synchronous machine model of the renewable energy coupling hydrogen production system according to the obtained parameters, and associating the current condition of the coupling hydrogen production system according to the model; output parameters of the virtual synchronous machine model are sent to a grid-side converter, and a switching signal required by a switching tube is generated; and distributing the given output of the power distribution strategy to the corresponding system through the grid-side converter. The problems that an existing system is not high in integration degree, electric power splicing of a renewable energy system and a hydrogen production system is singly considered, and the renewable energy fluctuation stabilizing capacity is limited are solved.

The present application relates to the technical field of audio and video synchronization processing, more particularly to an audio and video synchronization method and system based on TS stream and a storage medium. The method comprises reading TS stream data frames and unpacking the TS stream data frames; a synchronization device acquires and calculates the difference between the PTS of the current frame and the previous frame, determines whether the difference is a TS abnormal data type; when the difference is a TS abnormal data type, the synchronization device further determines the type of the current frame; if the type of the current frame is a video frame, the synchronization device discards the current frame; if the type of the current frame is an audio frame, the synchronization device adjusts the offset value and determines whether the current frame is subjected to decoding processing; if the current frame is subjected to decoding processing, a transcoder performs decoding processing. The present application realizes normal transcoding and audio and video synchronization by offset detection and correction error avoidance stream.

The application relates to the technical field of inductive synchro technology, and discloses an inductive synchro temperature self-adaptive compensation method, device and equipment, wherein the method comprises the following steps: determining initial linear coefficients of an initial linear model; acquiring a current environment temperature and a current measurement angle of the inductive synchro, and determining initial iteration parameters of the initial linear model according to the current environment temperature and the current measurement angle; iteratively updating the initial linear coefficients according to the initial iteration parameters to obtain target linear coefficients, wherein data format conversion is performed in each iteration updating process, and the next iteration is performed according to the conversion result; updating the initial linear model based on the target linear coefficients to obtain an updated target linear model, and determining a measurement angle compensation value of the inductive synchro according to the target linear model. The application can realize high-precision and self-adaptive real-time temperature compensation of the inductive synchro in a hot vacuum environment, and simultaneously adapt to the hardware design and reliability requirements of an aircraft.

Embodiments of the present disclosure relate to the field of processor hardware architecture, and provide an artificial intelligence chip and a computing system. The artificial intelligence chip comprises a first computing core, a shared memory device corresponding to the first computing core, and a data synchronization device. The first computing core is configured to issue a first data request instruction. The data synchronization device is configured to perform a read operation on first data, a flag detection operation, and a synchronization operation according to the first data request instruction. The first data is stored in a global memory device coupled to the artificial intelligence chip. The synchronization operation comprises sending the first data to the shared memory device. The shared memory device is configured to store the first data sent by the data synchronization device for reading by the first computing core. Embodiments of the present disclosure hardwareize data synchronization and retry, significantly reduce communication delay, and release core computing resources of the artificial intelligence chip.

The application relates to the technical field of wireless Mesh networks, and discloses a synchronization method for a wireless Mesh network, wherein the Mesh network comprises a plurality of Mesh network nodes connected to each other, the synchronization method comprises the following steps: obtaining external relative execution time in a Mesh control message received by a Mesh network node; obtaining internal relative execution time saved by the Mesh network node; and correcting the internal relative execution time in the case that the external relative execution time is less than the internal relative execution time. The synchronization operation of the Mesh network node is realized by using the relative time mode, the Mesh network node is clocked by using an internal crystal oscillator, the device of the Mesh network node does not need to quickly re-synchronize the network clock after being powered off and then powered on, and the accuracy of the synchronization operation of the device of the Mesh network node in the Mesh network can be improved. The application further discloses a synchronization device for a wireless Mesh network and an electronic equipment.

The invention relates to a clock gating circuit and a corresponding system. A reset domain crossover circuit deasserts a clock enable signal in response to receiving an asserted software reset write request signal, and asserts the clock enable circuit in response to detecting a falling edge on the software reset signal. The reset domain crossover circuit comprises a synchronizer, a falling edge detection circuit and a clock enable circuit, wherein the synchronizer receives a software reset signal and generates a synchronous software reset signal; the falling edge detection circuit receives a synchronization software reset signal from a synchronizer and generates a falling edge signal when a falling edge on the synchronization software reset signal is detected. The clock enable circuit is coupled to a falling edge detection circuit that receives a falling edge signal.

The utility model belongs to the technical field of industrial automation, and provides an industrial network synchronization device which comprises an installation shell, a network synchronization module is arranged in the installation shell, vertical installation plates are symmetrically arranged on the inner top wall of the installation shell, the network synchronization module is located between the two installation plates, and the network synchronization module is located between the two installation plates. A heat dissipation chamber is formed between one side, far away from the network synchronization module, of the mounting plate and the mounting shell; the network synchronization module further comprises heat dissipation holes, the heat dissipation holes are formed in the side wall, right facing the installation shell, of the installation plate and are distributed in a multi-layer height mode, and a heat dissipation fan is arranged above the network synchronization module. Through the designed heat dissipation structure, the heat dissipation efficiency of the industrial network synchronizer can be improved, and the service life of internal parts can be prolonged.

The application discloses a chip testing method and system, the system comprises: interference synchronization device and interference device; the first end of the interference synchronization device is connected with the measured chip; the second end of the interference synchronization device and one end of the interference device are connected, the third end of the interference synchronization device and the other end of the interference device are connected; wherein, when the interference synchronization device receives the synchronization instruction sent by the measured chip, the interference device generates a synchronization interference signal and tests the measured chip; the measured chip sends a confirmation signal to the interference synchronization device at a fixed time during the test; if the interference synchronization device does not receive the confirmation signal within a preset time, an abnormal signal is sent to the measured chip to output abnormal processing information. Through the accurate control of the timing of the interference signal by the interference synchronization device, the accurate control can make the interference signal coupled with the sensitive instruction, and thus the abnormal performance of the chip under specific interference conditions can be effectively exposed, so that effective fault detection and positioning of the chip can be realized.

Clock monitors for circuits having a plurality of oscillators. The clock monitors produce an error indication when one oscillator is determined to be outside of a desired operating range or beyond a defined threshold with respect to a second oscillator. The clock monitors include a synchronizer configured to receive a clock signal from a first oscillator of the plurality of oscillators and synchronize the received clock signal with a second oscillator and to produce a synchronized clock signal. The clock monitors can include a counter configured to produce a count value based on synchronized clock signal. The clock monitors include comparison circuitry configured to receive the count value and produce an error indication when the count value is outside a predetermined range. The clock monitors may be used to ensure correct clock operation for different transition scenarios, e.g., turning on or off a certain clock or power domain.

This invention discloses a hardware and software matching method for a synchronization system, comprising the following steps: 1) learning the position of the shift fork synchronization point, the synchronizer slider force, and the synchronization capacity of the synchronization system during self-learning; 2) calculating the required speed difference to be synchronized based on the collected input and output shaft speeds when shifting gears is required; 3) calculating the required shifting force based on the speed difference, the required synchronization time, and the synchronization capacity of the self-learned synchronization system; 4) when the calculated required shifting force is less than the slider force of the target gear synchronizer, only the target gear synchronizer is activated; when the calculated required shifting force is greater than or equal to the slider force of the target gear synchronizer, multiple synchronizers are activated together to eliminate the speed difference. This invention has the advantages of simple structure, more compact layout, and the ability to eliminate speed differences.

The utility model relates to the technical field of synchronizers, in particular to a synchronizer gear hub disc core which comprises a disc core body, a base is installed on the lower surface of the disc core body, four supporting plates are fixedly connected to the side face of the base, and the four supporting plates are all tightly attached to the disc core body. The sides, close to the disc core body, of the four supporting plates are fixedly connected with second clamping plates, the second clamping plates are tightly attached to the disc core body, the sides, close to the disc core body, of the four supporting plates are fixedly connected with first clamping plates, and the sides, away from the base, of the supporting plates are fixedly connected with bent rods. According to the synchronizer gear hub plate core, the problem that in the process of assembling a synchronizer by using the synchronizer gear hub plate core, the synchronizer gear hub plate core often needs to be lifted up, then other synchronizer parts are installed on the synchronizer gear hub plate core, and then a tool needs to be used for controlling the elastic piece for positioning to contract, so that the work of assembling the synchronizer is relatively complex is solved.

The invention relates to a development machine packaging method and system in a K8S cluster, which is characterized in that development machine resources are defined based on CRD and a controller, configuration information is described, and automatic life cycle management is realized in combination with operators; cRD is deployed in a host cluster, and is synchronized to K8S space of each tenant through an exclusive synchronizer; an SSH access path is opened by means of node port type service resources and an exclusive layer 4 forwarding entry; a public network IP path is automatically allocated by using the load balancer type service resources in combination with a metal load balancer component; remote access and safety control of the Zhu service are realized through a gateway, a signature verification mechanism and a domain name system analysis function of list monitoring; and deploying an exclusive daemon process set at each host node.

The invention provides a multi-mode man-machine environment data synchronous acquisition method and system and a medium, and relates to the technical field of human factor engineering and ergonomics. The method is suitable for a multi-mode man-machine environment data synchronous acquisition system, the system comprises master machine environment data acquisition equipment, a clock synchronization device and at least one slave man-machine environment data acquisition equipment, and for the slave man-machine environment data acquisition equipment, the method comprises the following steps: responding to a received clock pulse signal from the clock synchronization device, and transmitting the received clock pulse signal to the master machine environment data acquisition equipment; the received clock pulse signal is used as a clock signal for local data synchronization processing, a first physiological signal is obtained, the clock pulse signal is generated by host machine environment data acquisition equipment based on a clock crystal oscillator of the host machine environment data acquisition equipment and sent to the clock synchronization device, and the frequency of data synchronization processing is smaller than that of the clock pulse signal. Through the method disclosed by the invention, the clock synchronization effect is improved, and the data synchronization processing effect is further improved.

The application discloses a time synchronization device and communication equipment, a PTP sending module receives an Ethernet frame to output a first sending data packet start identification signal and a first sending signal; a time stamp processing module assigns a first current time stamp to a first sending time latch signal, and assigns the first sending time latch signal to a time stamp t1 register; a processor acquires the time stamp t1 to stamp a synchronization message / follow-up message, a PCS receiving module receives to output a first receiving data packet start identification signal; a PTP receiving module analyzes a delay request message to output the first receiving data packet start identification signal; the time stamp processing module assigns a second current time stamp to a first receiving time latch signal, and assigns the first receiving time latch signal to a time stamp t4 register; the processor acquires the time stamp t4 to stamp a delay response message. The application can realize high-precision time synchronization.

The invention provides a rotating speed synchronization judgment method during gear shifting of a synchronizer-free gearbox and related equipment, and belongs to the technical field of vehicle control. The control method comprises the steps that according to the rotating speed of a shaft where a joint sleeve is located, the rotating speed of a shaft where joint teeth are located is adjusted through closed-loop control; judging whether the joint teeth and the joint sleeve are synchronous in rotating speed or not; when the rotating speeds are synchronous or asynchronous and the duration is less than or equal to the time threshold, determining that the rotating speed is in a rotating speed synchronous state; and when the rotating speeds are not synchronous and the duration is greater than the time threshold, determining to quit the rotating speed synchronization state. The method can adapt to the working characteristics of the synchronizer-free gearbox, the real synchronous state is effectively recognized, misjudgment caused by instantaneous disturbance is restrained, and the reliability and smoothness of gear shifting control are improved.

The present disclosure provides a game attribute synchronization method, a game attribute synchronization device, a computer readable storage medium and an electronic device, and relates to the technical field of games. The game attribute synchronization method comprises: synchronizing attribute content of a first attribute in an engine layer based on attribute content of a to-be-synchronized game attribute; finding a second attribute corresponding to the first attribute in a script layer according to the first attribute; and synchronizing attribute content of the second attribute based on the attribute content of the to-be-synchronized game attribute. The present disclosure can improve the efficiency of game attribute synchronization in a terminal device.

The invention discloses an interaction synchronization device and method of a robot, and belongs to the field of interaction synchronization devices.The device comprises a user control end, the robot and a synchronization detection module; the user control end is used for sending a control instruction to the robot, copying the control instruction and sending the control instruction to the synchronous detection module, and receiving a synchronous detection result of the synchronous detection module; the robot is used for receiving a control instruction of the user control end and executing a corresponding action according to the control instruction; and the synchronous detection module is used for collecting action track information and internal operation parameter information of an end effector of the robot, performing comprehensive analysis in combination with a control instruction sent by the user control end, outputting a synchronous detection result and sending the synchronous detection result to the user control end. According to the method, in the interaction process of the robot and the user control equipment, the action track of the end effector of the robot and the internal operation parameters are effectively combined for comprehensive analysis, and then the interaction synchronization state of the current robot is accurately evaluated.

A shield tunneling and segment assembling synchronization device (100), a control method therefor and a thrust allocation method therefor, and a shield machine (200). The shield tunneling and segment assembling synchronization device (100) comprises a thrust cylinder assembly (110), a segment assembling assembly (120), and a controller (140); the controller (140) is configured to activate a semi-shield tunneling and segment assembling synchronization mode when the advance speed of the shield machine (200) is greater than or equal to a preset speed or when it is detected that the tunnel strata belong to a first type of strata; the controller (140) is configured to activate a full-shield tunneling and segment assembling synchronization mode when the advance speed of the shield machine (200) is less than the preset speed or when it is detected that the tunnel strata belong to a second type of strata; and the hardness of the first type of strata is less than that of the second type of strata.

1. The name of the design product: satellite clock synchronizer. 2. The use of the design product: the design is used for signal demodulation, scanning and detection, and protocol processing of IP network data. 3. The design points of the design product: in shape. 4. The picture or photo that best indicates the design points: perspective view.

The invention discloses a directory-type distributed data structure implementation method and system, belongs to the technical field of data storage and concurrent processing, and aims to solve the technical problems of poor expandability and low performance of a traditional data structure under a non-cache consistency / partial cache consistency multi-core architecture. Comprising the following steps: dividing a multi-core architecture into a plurality of consistent islands, connecting the islands through a high-speed packet-loss-free network, and performing cross-island communication between cores through two communication primitives; a distributed hash table DHT is constructed, each server node maintains a plurality of hash buckets, the hash buckets adopt a linked list to solve conflicts, and a target server node and the hash buckets are positioned through a hash function; a server node is selected as a synchronizer, the synchronizer is used for distributing or recycling operation key values for a client side, the client side achieves data structure operation of stacks, queues and double-end queues through combination of two short messages and one DHT primitive, and linearization points of all the operations only depend on the moment when the synchronizer returns the key values.

A synchronizer with flip-flops has a reduced number of flip-flops coupled in series, receiving as an input data of a first clock domain and supplying as an output data in the second clock domain. The second clock signal is at a variable frequency adjusted to a target frequency, by a division factor. The flip-flops are timed by a clock signal subsampling the second clock signal by a factor k1. The subsampled clock signal is generated by a frequency divider propagating a pulse of the signal every k1 clock pulses, while keeping the edges aligned.

The present disclosure relates to apparatuses and methods for delay measurement initialization. An example apparatus includes a clock enable circuit that provides a first clock signal having one-half the frequency of an input clock signal and a second clock signal having one-quarter the frequency of the input clock signal, a coarse delay that provides the first clock signal with a coarse delay, a fine delay that provides the first clock signal with the coarse delay and a fine delay as an output clock signal, a model delay that has a feedback delay equal to the sum of the delays of an input stage and an output stage and that provides a feedback signal that is the output clock signal with the feedback delay, and a measurement initialization circuit that performs measurement initialization. The measurement initialization circuit includes a synchronizer that receives the feedback signal and the second clock signal and provides a stop signal to the coarse delay.

This invention provides a synchronizer gear ring structure, belonging to the field of automotive parts. It solves the problem of poor lifespan of existing gear rings. This synchronizer gear ring structure includes an outer ring and an inner ring. An annular shoulder is formed on the inner wall of the lower end of the outer ring, and the bottom surface of the inner ring is pressed tightly against the annular shoulder. An annular cavity is formed between the inner ring, outer ring, and annular shoulder. A plastic ring is placed inside the annular cavity, formed by injection molding and becoming an integral part of the inner and outer rings. A first strip groove runs axially through the outer wall of the inner ring, and a second strip groove runs axially on the inner wall of the outer ring. A key block 1, matching the first strip groove, extends integrally from the inner wall of the plastic ring towards the first strip groove, and a second key block 2, matching the second strip groove, extends integrally from the outer wall of the plastic ring towards the second strip groove. This synchronizer gear ring structure has a long lifespan.

This disclosure provides a method for full synchronization of cached data, relating to the field of cloud computing technology and applicable to the financial technology field. The method is applied to a cached database master node, which uses a dual-hash architecture to store data. The dual-hash architecture includes a master hash table and a cache hash table, with the cache hash table used to store temporary incremental data. The method includes: responding to a full synchronization command from the master and slave nodes, starting a full synchronization thread and setting a full synchronization flag to perform data synchronization, wherein the full synchronization flag is used to characterize the current full synchronization state of the master node; responding to an operation command from the client, determining the target slot and the client operation type; and performing data read and write operations based on the flag of the target slot, the full synchronization flag, and the client operation type, wherein the flag of the slot is used to characterize the current operation type of the slot. This disclosure also provides a cached data full synchronization device, apparatus, storage medium, and program product.

Hardware synchronization method for computers. One aspect of the invention relates to a method, implemented by a synchronization device, for synchronizing a second computer with a first computer, the synchronization device being included in the second computer, the synchronization device being a configurable integrated circuit.

The application discloses a time synchronization device and method in a device, the device comprising a plurality of control domains, the device comprising: a time scale selection source, configured to send a first time scale of a first control domain in the plurality of control domains to a second control domain in the plurality of control domains, the first time scale being a time after a first device in the first control domain performs intra-domain time synchronization; N domain time synchronization processors, comprising an intra-domain time synchronizer, configured to synchronize the time of the first device in the second control domain to the first time scale; a time scale timer comprising a service time scale Timer, configured to correct the value of the service time scale Timer of the second control domain according to a cross-domain time scale correction word to obtain the first time scale; and a cross-domain time scale error calculator, configured to determine the cross-domain time scale correction word according to a second time scale and the first time scale for the second control domain, the second time scale being the value of the service time scale Timer of the second control domain, and N being an integer greater than or equal to 2. The application realizes time synchronization across control domains.