Clock synchronizer and clock and data recovery apparatus and method

A synchronizer and clock technology, applied in synchronization devices, data conversion, electrical digital data processing and other directions, can solve problems such as loss of lock
CN1684405AActive Publication Date: 2005-10-19CIRRUS LOGIC INT SEMICON

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
CIRRUS LOGIC INT SEMICON
Publication Date
2005-10-19

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Abstract

A clock synchroniser, and clock and data recovery apparatus incorporating the clock synchroniser, are described, together with corresponding clock synchronisation methods. The clock synchroniser incorporates an elastic buffer. A received clock signal RCK is used to clock data into the buffer, and a locally generated clock LCK is used to clock data out of the buffer. The local clock is synthesised using a PLL, and a fill-level signal from the elastic buffer is used to control to local clock frequency to maintain a desired average quantity of data in the buffer, thereby achieving synchronisation of the received and local clocks. In preferred embodiments the fill-level signal is used to control a variable divider in the feedback path of the PLL, which is supplied with a highly stable reference signal. A synchronised, and low-jitter local clock is thus produced. Preferably, the elastic buffer employs counters of relatively wide word width, and a storage array of much reduced depth, read and write pointers being provided by just a few of the least significant bits of the words.
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Description

technical field

[0001] The present invention relates to a clock synchronizer and to a clock and data recovery device and method. Certain embodiments relate to methods and circuits for recovering a low-jitter clock and data (eg, a jittered data stream) from jittered data. Background technique

[0002] figure 1 A data link is shown comprising two systems, each clocked by a respective PLL. The transmitter transmits data at a given rate and the receiver clocks the data using its local clock. However the two clock frequencies may not be exactly the same, either short term or long term.

[0003] Short-term variations in frequency will be induced in each clock due to thermal noise or external interference and can be considered as jitter in the corresponding clock. Additional jitter in the data stream can be introduced through intersymbol interference due to the limited bandwidth of the transmit channel or through crosstalk between adjacent cables.

[0004] For general purpose ...

Claims

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