Debug method suitable for multi-processor core system chip

A technology of multi-processor cores and system chips, which is applied in the debugging field of multi-processor core system chips, can solve the problems of low intrusion, high hardware cost, and slow debugging speed, and achieve low hardware cost and strong portability Effect

Inactive Publication Date: 2008-08-27
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The advantage of the software method is that the cost of hardware added to support debugging is low, and only the processor core is required to support breakpoints, breakpoint instructions, and exception handling mechanisms; the disadvantage is that the debugging speed is not as fast as the hardware method
The advantage of the hardware method is that the debugging speed is fast, does not affect the result,...

Method used

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  • Debug method suitable for multi-processor core system chip
  • Debug method suitable for multi-processor core system chip
  • Debug method suitable for multi-processor core system chip

Examples

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Embodiment Construction

[0027]The format of the present invention's definition debugging command packet and return information packet is: processor core number, thread number (optional), basic command (or return packet basic format), as follows:

[0028] Step through:

[0029] MP_step = {C1_s, C2_s, ..., {C i _thread1_s, C i _thread2_s,...},...}

[0030] Return_MP_step = {C1_S_address, C2_S_address, ...,

[0031] {C i _thread1_S_address, C i _thread2_S_address,...},...}

[0032] Add breakpoint:

[0033] MP_add_break = {C1_z_address, C2_z_address, ...,

[0034] {C i _thread1_z_address, C i _thread2_z_address...},...}

[0035] Return_MP_add_break = {C1_zOK, C2_zOK, ...,

[0036] {C i _thread1_zOK,C i _thread2_zOK...},...}

[0037] Remove breakpoint:

[0038] MP_delete_break = {C1_Z_address, C2_Z_address, ...,

[0039] {C i _thread1_Z_address, C i _thread2_Z_address,...},...}

[0040] Return_MP_delete_break = {C1_ZOK, C2_ZOK, ...,

[0041] {C i _thread1_ZOK,C i _thread2_ZOK...},......

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Abstract

The invention discloses a debug method suitable for a multiprocessor core system chip: a virtual main control processor core module (111) operating on a host machine is used to simulate a main control processor and a debugging control station program, take charge of sending and receiving commands, control the debugging of the multiprocessor core system chip, send a debugging command to a physical operation debugging service station module (131) of each processor core and receive responsive information to a software debugger (110) which runs on the host computer and is provided with a patterned interface. The debug method suitable for the multiprocessor nuclear system chip occupies small hardware resource, utilizes software to debug, has strong portability and is suitable for the network platform debugging of/on the multiprocessor nuclear system chip.

Description

technical field [0001] The invention relates to a debugging method suitable for multi-processor core system chips. Background technique [0002] Driven by the development of transistor technology and application requirements in recent years, the design of embedded chips has moved from a single-processor core system to a multi-processor core System-on-Chip (MPSoC). How to debug the program running on the multi-processor core SoC has become an urgent problem to be solved. [0003] There are two types of debugging methods for traditional single-core processor programs: software and hardware. Software debugging methods such as GNU Debugger (GDB) run on the host machine, GDB Stub runs on the processor, GDB provides the user with information about the program being debugged, and sends debugging requests to GDB Stub, such as checking the value of the register, GDB Stub according to the debugging request Perform corresponding processing and feedback information to GDB. The hardwa...

Claims

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Application Information

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IPC IPC(8): G06F11/36G06F15/16
Inventor 刘鹏王小航成杏梅史册王维东姚庆栋
Owner ZHEJIANG UNIV
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