Memory rewind and reconstruction for hardware emulator

Abstract

A method and apparatus are disclosed for debugging circuit designs having random access memory (RAM) therein. The circuit design is emulated on a hardware logic emulator or software simulator. The RAM can be rewound or reconstructed to a previous state, and then replayed. The RAM can also be reconstructed to a state in which the RAM was maintained at some point during a trace window.

Description

technical field [0001] The field of the invention relates generally to hardware logic emulation systems for verifying integrated circuit and electronic system designs, and more particularly, to methods and apparatus for restoring data stored in memory circuits from any known checkpoint fed back in time , the memory circuit forms part of the digital circuit design. Background technique [0002] This application claims the benefit of US Provisional Application Serial No. 60 / 442,176, filed January 23,2003. The contents of this US Provisional Application Serial No. 60 / 442,176 are hereby incorporated by reference in their entirety. [0003] Hardware logic emulation systems are well known devices for implementing user designs in multiple programmable integrated circuit designs. Such logic simulation systems are available from a number of vendors, including Cadence Design Systems, Inc. of San Jose, CA, USA, among others. Typical emulation systems use programmable logic chips or ...

AI Technical Summary

Problems solved by technology

One question is which signal to observe (i.e., which node in the DUV to observe)

The second question is when to observe the signal (i.e. on what clock transition and / or at which confluence of events, sometimes called triggers)

In fact, even state-of-the-art emulators that take this into account can only treat this memory as a "black box", which means that the state-of-the-art emulator simply ignores the memory in the DUV and only allows capture of the black box's output signal

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