14results about How to "Improve simulation speed" patented technology

The application provides a multi-platform cooperative control system and method based on adaptive cruise, comprising a state monitoring platform, an intelligent ticketing platform, a digital twin platform, a dispatching platform and a response review platform; the state monitoring platform obtains real-time operation data of a target power grid through a distributed sensor network and outputs a state diagnosis result; the intelligent ticketing platform automatically generates an operation ticket based on a power grid knowledge graph; the digital twin platform constructs an adaptive dynamic simulation model using the real-time operation data and the state diagnosis result, and simulates and verifies the operation ticket; the dispatching platform dispatches network orders to power grid equipment according to the operation ticket and the simulation verification result; and the response review platform reviews and verifies the state after the dispatching. Through the construction of a multi-platform cooperative control mechanism and the establishment of an adaptive dynamic simulation model, the simulation accuracy and speed are improved, and the safety of the power grid and the efficiency of power grid dispatching are further improved.

The invention discloses an electromagnetic transient simulation method, system, equipment and medium based on an error compensation variational algorithm, and belongs to the technical field of electromagnetic transient simulation, and the method comprises the steps: obtaining discrete node electrical parameters of a power system, building an electromagnetic transient equivalent model based on the parameters, and building a loss function; preparing a quantum state representing node voltage through the parameter-containing quantum circuit, calculating a function value of a loss function by using a measurement result of the prepared quantum state, and iteratively updating a variational parameter of the parameter-containing quantum circuit by using the function value; obtaining a measurement result of the quantum state enabling the loss function to converge, and obtaining a solved voltage; and calculating a residual error for error compensation by using the target equivalent admittance matrix, the injection current of the node and the solved voltage, correcting the solved voltage by using the residual error, and obtaining the corrected voltage as an electromagnetic transient simulation result at the current moment. According to the method, calculation errors caused by a current noise-containing quantum computer are relieved, and high-precision solving of the linear equation set is achieved.

This invention provides a non-uniform discrete equivalent circuit modeling method and system for electromigration reliability. It employs an equivalent circuit-based approach to analyze the electromigration stress evolution of general complex interconnect structures, fully considering thermal field effects in the model. This achieves equivalent circuit modeling for stress analysis under multi-physics coupling. Furthermore, by using an adaptive mesh method with non-uniform spatial discretization and a steady-state / quasi-steady-state filtering mechanism, it solves the problem of wasted computational resources in traditional uniform discretization methods when dealing with large-span interconnect structures, and avoids unnecessary transient simulations of immortal interconnect trees, reducing the computational load of full-chip-level analysis. This enables efficient and high-precision transient analysis of the electromigration reliability of large-scale interconnect networks under multi-physics coupling effects.

The application discloses a near-field equivalent method, a mask 3D near-field correction method and a storage medium. The optical near-field equivalent method comprises the following steps: setting a three-axis coordinate system, so that the initial propagation direction of a light source with a preset angle is propagated along a first axis, and an initial wave vector and a polarization direction are obtained; performing a rotation operation on the initial wave vector and the polarization direction according to the preset angle of the light source; analyzing the polarization direction and the polarization vector of the light source after the rotation operation; rotating the polygon and the light source according to the preset angle of the polygon, so that a new wave vector and a corresponding rotation angle are obtained; analyzing the polarization direction, the polarization vector and the component of the light source after the second rotation operation; generating an edge near-field under equivalent conditions by using a 2D strict electromagnetism algorithm; and performing linear superposition according to the respective components based on the polarization direction of the light source after the second rotation operation, so that an equivalent near-field result is obtained. The application reduces the calculation burden of near-field generation.

The application provides a hardware perception-based model quantization method, system, medium, product and terminal, a hybrid execution mechanism is constructed between a high-level software framework and a bottom layer hardware behavior model, only core calculation operators in a quantization calculation graph of an initial quantization model which need to be executed on target hardware are handed over to a hardware behavior model for bit precision simulation, real calculation characteristics of the target hardware are simulated in a quantization process, and other auxiliary, non-computation-intensive operators are reserved in the high-level software framework for execution, so that the simulation verification efficiency is improved, the simulation precision and the execution efficiency are considered, and the goal that the quantized model runs more efficiently and has lower precision loss on the target hardware is achieved.

The invention provides a sequential circuit hybrid fault simulation method, which is used for simulating a sequential circuit fault coverage rate by injecting a fault point into a sequential circuit, and comprises the following steps: S1, obtaining a to-be-simulated circuit netlist, identifying a strong connection component in the to-be-simulated circuit netlist, and marking the strong connection component meeting a preset small-scale strong connection loop constraint condition; s2, performing simulation of multiple periods on the marked circuit netlist to be simulated, and executing in each simulation period: S21, performing code compilation on the marked strong communication components so as to fuse each marked strong communication component into a compilation node, performing compilation type simulation on each compilation node until the state converges, and performing simulation on the compilation node until the state converges; the topology is updated, and the output of each compiling node is used as an event to be transmitted to other areas in the circuit netlist; and S22, taking other areas except the compiling node as event driving nodes, simulating residual circuits in an event scheduling mode, and updating the state of the circuits.

This invention discloses a five-level active midpoint clamping circuit structure and design method based on an average model. Ignoring redundancy, the five-level active midpoint clamping circuit structure based on the average model includes two controlled voltage sources, two controlled current sources, two DC bus capacitors, and a floating capacitor. The series and parallel connection of the controlled voltage and current sources is shown in the attached figure of the abstract. The current of the controlled current source is determined by the output current of the five-level circuit, and the voltage of the controlled voltage source is determined by the positive and negative voltages of the two DC bus capacitors. This invention can simulate the voltage fluctuation of a five-level active midpoint clamping circuit switching model. It considers the impact of voltage fluctuations on the AC side and can control the voltage fluctuation of the five-level active midpoint clamping circuit within a reasonable range. It has strong versatility and greatly improves simulation speed.

The invention discloses a dominant broadband oscillation order reduction method suitable for a network tracking / constructing type hybrid wind power plant. The method comprises the following steps: firstly, establishing a full-order small-signal model of the hybrid wind power plant, and identifying a dominant broadband oscillation mode in combination with an energy contribution degree and a controllable observability criterion; secondly, state variable division and order reduction modeling are carried out based on the singular perturbation principle, and the calculation complexity is reduced while the dominant modal precision is kept; and finally, model simplification and dynamic characteristic consistency are realized through module interface matching and stability verification. According to the method, the reduced-order model of the hybrid wind power plant can be quickly obtained under the condition that main dynamic characteristics are not influenced, and reliable technical support is provided for broadband oscillation analysis and control optimization of a power system.

The application discloses a kind of data-driven wind farm collection line fault section positioning method, comprising: S1 based on unit speed-up model constructs full topology wind farm model, for wind turbine configuration high / low voltage ride-through control strategy obtains real fault response;S2 establish large-scale batch simulation process of automation interface control, randomization set wind speed and fault parameter, extract transient waveform and generate balanced dataset;S3 wind farm is mapped as graph structure, extract each node voltage and line edge current low-dimensional steady-state feature and high-dimensional time sequence instantaneous fragment;S4 utilize sequence encoder to compress the representation of time sequence feature, combined with message passing graph neural network dynamically generates convolution kernel by edge feature;S5 splice updated node and edge feature, input prediction network to line section is normalized score.This application can generate high-fidelity dataset with high efficiency, and realize high-precision fault section positioning under complex wind farm topology by graph network fusion edge time sequence feature.

The invention provides a GPU architecture simulation method and device, computer equipment and a medium, and relates to the technical field of hardware simulation, the simulation method comprises the following steps: monitoring operation indexes of a plurality of function modules in a preset time window; calculating a hotspot score of the function module according to the operation index; for each functional module, comparing the hotspot score of the functional module with a preset threshold value, and determining a simulation mode adopted for the functional module based on a comparison result; in response to determining that the fine simulation mode is adopted to simulate the functional module, updating an internal state machine of the functional module cycle by cycle; and in response to determining that the fast forward simulation mode is adopted to simulate the functional module, deriving an equivalent delay of the functional module, and crossing the corresponding simulation time step length based on the equivalent delay to skip updating of the internal state machine of the functional module period by period within the simulation time step length. The simulation overhead is reduced, and the overall simulation speed is increased.

The present application relates to chip design technical field, especially to a waveform data acquisition method, electronic equipment and storage medium, it is through the target node of user specified capture each processing unit target data and compress storage to cache, in each device cycle target data in the cache is removed to memory;Wherein, the step of capturing the target data of the fth processing unit and compressing storage to cache includes: according to the target node, the data stream of the fth processing unit continuous output is filtered to obtain the data block including target node data;While the data block of cache changes, the change flag position of the data block of data change is valid, and the change flag position of the data block of no change is invalid.It not only allows the user to specify a large number of target nodes or change target nodes, without recompilation, improves the debugging efficiency;And reduce the occupied cache and memory space, improve the hardware simulation speed.

The application relates to a load balancing-based sparse matrix LU decomposition method and device, which comprises the following steps: loading a sparse matrix A in circuit simulation and forming a basic update level; performing ALAP-based scheduling on the generated basic update level to generate an ALAP post-scheduling update level; performing numerical decomposition on the ALAP post-scheduling update level based on a Left-Looking algorithm from the lowest priority level, wherein all columns in the same level are calculated in parallel, and the columns in different levels are calculated according to the level priority; and switching to a Right-Looking algorithm for numerical decomposition when the size of the remaining level is one column after the Left-Looking algorithm-based decomposition. The application can improve the average utilization rate of hardware computing resources, reduce the LU decomposition time, shorten the sparse matrix solving time, and further accelerate the overall simulation speed.

The invention discloses an electromagnetic transient simulation matrix solving method based on an NUMA (Non Uniform Memory Access) architecture and Shuercomplement, which relates to the technical field of electromagnetic transient simulation, and comprises the following steps: S1, carrying out row and column rearrangement on a sparse dispersion nano matrix of electromagnetic transient simulation through permutation transformation, so that the sparse dispersion nano matrix is in a block diagonal edge adding form, a global solving problem is decoupled into a plurality of independent subdomain elimination problems and a low-latitude Schel complement matrix interface problem; and S2, establishing a mapping model of the computing sub-domain and the CPU physical architecture. According to the electromagnetic transient simulation matrix solving method based on the NUMA architecture and the Shuer complement, through an innovative matrix decomposition and hardware resource optimization strategy, the calculation efficiency of electromagnetic transient simulation is remarkably improved, the weak coupling characteristic of a power network is ingeniously utilized, and the calculation efficiency of the electromagnetic transient simulation is improved. A large-scale sparse matrix is decomposed into a plurality of independent low-dimensional sub-domain matrixes and a low-dimensional Schel complement interface matrix, and parallel processing of calculation tasks is achieved.

The invention discloses a lumped model-based rapid modeling method for a quantum well semiconductor optical amplifier. The method comprises the following steps of: S1, extracting parameter data; s2, constructing a lumped model; s3, performing numerical simulation calculation; s4, extracting design parameters; and S5, system-level simulation optimization is carried out. Compared with an existing space-time two-dimensional device model, the lumped model-based rapid modeling method for the quantum well semiconductor optical amplifier has the advantages that original two-dimensional space-time solution is simplified into one-dimensional time solution by integrating a space propagation equation and combining reasonable approximation, so that the calculation efficiency is improved in an order of magnitude manner, and the modeling precision is improved. The time domain simulation speed of the quantum well semiconductor optical amplifier can be obviously improved, and the calculation time consumption of device and system joint debugging in the parameter extraction and optimization design process is effectively shortened.