14 results about "LU decomposition" patented technology

The application belongs to the technical field of power systems, and discloses an EIGD time-delay power system stability analysis method and device, wherein the method comprises the following steps: a linear model of the time-delay power system is established, and the differential equation in the model is converted into an abstract Cauchy problem by using an infinitesimal generator; a group of discrete points is selected for each time-delay interval of the time-delay power system, a discrete function space is established according to the discrete points, and the time-delay variable is discretized to generate a low-order partial infinitesimal generator discretization matrix; displacement and inverse transformation are performed on the discretization matrix to obtain an inverse matrix, and the characteristic value of the system is obtained according to the inverse matrix; the characteristic value is checked by using the Newton method to obtain the accurate characteristic value and the characteristic vector, and the stability of the time-delay power system is analyzed and judged. The method solves the problem of large matrix LU decomposition calculation amount in the existing EIGD time-delay power system characteristic value sparse calculation method based on the DDAE model.

The invention discloses a multi-industrial equipment-oriented ELM fault identification method fusing feature attention and manual LU decomposition, and belongs to the technical field of industrial equipment fault diagnosis. The core of the method is that a feature attention mechanism and a manual LU decomposition module are fused: firstly, the feature contribution degree is quantified through a channel attention mechanism, key fault features are automatically focused, weak correlation feature interference is inhibited, and the quality of a hidden layer output matrix is improved; secondly, the manual LU decomposition module realizes autonomous controllability and numerical stability of matrix inverse operation through row principal component selection and regularization optimization, and is separated from the dependence of a third-party math library. According to the method, the accuracy of equipment fault identification is remarkably improved, the omission ratio and the false alarm rate are effectively reduced, memory limitation of edge equipment is overcome, and an efficient and reliable real-time identification scheme is provided for bearing abrasion and gearbox abnormity of a wind power variable pitch system and faults of other industrial equipment such as a machine tool and an industrial motor.

This invention discloses a method and system for extracting S-parameters of microwave passive devices, comprising: geometrically modeling the microwave passive device and then meshing it to obtain a processed device model; discretizing the processed device model according to basis functions, and performing mode function expansion on the ports of the processed device model to establish a transfinite element matrix equation; performing partial LU decomposition of the system matrix in the transfinite element matrix equation using the multi-wavefront method to obtain the Schur complement matrix of the system matrix and the decomposed system matrix; obtaining the dense S-parameter matrix equation for the microwave passive device based on the Schur complement matrix of the system matrix and the decomposed system matrix; and solving the dense S-parameter matrix equation to obtain the S-parameters of the microwave passive device. This invention effectively reduces the memory usage of matrix calculations and reduces computation time.

The invention discloses a data processing method and device and related equipment, which can perform LU decomposition of R columns of sub-matrixes on a to-be-decomposed matrix needing to be decomposed in each iteration process in a process of performing LU decomposition calculation on applied to-be-processed data, namely a dense matrix, and calculate a matrix multiplication taking a product of R and sub-matrix dimensions as a dimension. The dimension of matrix multiplication calculation is large, and efficient calculation of matrix multiplication can be achieved. In this way, the dense matrix can be divided into the sub-matrixes with the small granularity, it is guaranteed that the calculation efficiency of matrix multiplication is high on the premise that process loads are balanced, and then the overall efficiency of matrix decomposition calculation is improved.

The application particularly relates to a linear equation set solving method for semiconductor device simulation, which comprises the following steps: determining a target linear equation set, and performing nested partitioning and reordering on a coefficient matrix of the target linear equation set to obtain a transformed coefficient matrix and a corresponding right end vector; based on a preset decomposition precision, the transformed coefficient matrix is decomposed through a selected main element LU decomposition, a forward substitution algorithm and a back substitution algorithm to obtain a current solution vector, and based on a preset working precision, when an initial residual vector does not satisfy a preset solving condition, a modified vector is obtained through a preconditioned GMRES algorithm; based on the preset working precision, the current solution vector and the modified vector, an updated solution vector is obtained as a current solution vector, and a step of calculating a residual vector is re-executed until a latest residual vector after iteration satisfies the preset solving condition, and a final solution is obtained based on the latest current solution vector. Thus, the problems of low solving precision and slow speed in semiconductor device simulation are solved.

The application discloses a ground penetrating radar time domain finite element fast simulation method, system and equipment. The method comprises the following steps: setting geometric parameters and electrical parameters of a two-dimensional complex geoelectric model; constructing a weak form of a two-dimensional electromagnetic wave equation; forming a time domain finite element equation; establishing a linear equation group after central difference time discretization; giving a time step, judging whether the time step meets a CFL stability condition, if yes, directly solving the linear equation group, if not, performing LU decomposition on a coefficient matrix of the linear equation group, and disturbing unstable eigenvalues in the coefficient matrix until absolute values of all eigenvalues of the decomposed coefficient matrix are less than or equal to 1, and generating a reconstruction coefficient matrix; and solving the reconstructed linear equation group, so that the time step breaks through the CFL stability condition. The application can improve the simulation precision of the ground penetrating radar.

The application discloses a kind of AC / DC hybrid distribution network power flow calculation method and device considering incomplete LU decomposition preconditioning, and relates to the field of smart grid.The method comprises the following steps: establishing active / reactive control equation based on VSC steady-state equation;Based on Kirchhoff's current law, establish AC / DC node power imbalance equation;Taylor expansion is carried out on the above equation, and high-order terms are ignored, to obtain linearized unified power flow equation set and matrix form Jacobian matrix;Incomplete LU decomposition preconditioning is carried out on Jacobian matrix, and stable double-conjugate gradient method is used to solve, to obtain power flow solution.The application establishes unified linearized power flow model, combines incomplete LU decomposition preconditioning and stable double-conjugate gradient method, effectively reduces the sensitivity to initial value, improves the robustness and convergence speed of complex AC / DC hybrid system power flow calculation.

The present application belongs to the technical field of sparse matrix decomposition, and relates to a block method of performance-aware block sparse LU decomposition for a GPU platform, comprising the following steps: S1, constructing a performance function of a GPU computing kernel based on statistical data; S2, based on the performance function, designing a decision method for deciding whether to block a sparse matrix at a specified position; and S3, decomposing the overall block problem of a large-scale sparse matrix into multiple sub-problems decided in sequence, solving each sub-problem one by one based on a greedy heuristic strategy and using the decision method, and obtaining a final specific block scheme. Compared with existing methods, the method of the present application is more excellent in performance in the numerical decomposition stage, and is not only suitable for a heterogeneous platform of multi-core CPU and GPU, but also suitable for a pure CPU architecture.

The application provides a method for solving dynamic voltage drop of a chip-package based on LU decomposition combined with an SMW formula. The chip-package power supply network is regarded as a composite system connected by an interconnection node Pad between a package part and a plurality of chip sub-networks. A chip-package partition solving strategy is introduced. According to the chip and package characteristics, a large-scale sparse matrix of the composite system is disassembled into a structural model with a plurality of diagonal sub-blocks, so as to convert the chip-package power supply network equation into a block structure, and avoid the inefficient redundancy of full matrix repeated decomposition by focusing on necessary coupling calculation. Meanwhile, the SMW formula is used for low-rank incremental updating of the package network influence, so as to quickly update the influence introduced by the package and quickly correct the solution vector. The calculation task is split into a plurality of sub-problems for synchronous execution, so that the plurality of sub-blocks are solved synchronously. The application can provide a high-precision and high-efficiency solution for dynamic voltage drop analysis of a large-scale chip package power supply network.

The application provides a kind of casting billet online thermal state tracking method, comprising the following steps: according to the rule of block division, the asymmetric profiled blank is divided into area block, and the casting billet center area block and the casting billet surface area block are obtained respectively;The structured coarse grid division is carried out to the casting billet center area block, and the structured fine grid division is carried out to the casting billet surface area block, to obtain a plurality of structured grids, and the grid nodes of the structured grid are indexed and described, and the grid data of each structured block and the index are stored correspondingly;The heat transfer equation coefficient matrix and the solidification latent heat release source term of the grid unit of each structured block are calculated;The temperature field of the grid unit in the structured block is calculated by coupling the incomplete matrix LU decomposition and SIP algorithm in turn. By using the application, the problems of the prior art, such as unsuitable for asymmetric profiled blank and slab dual-purpose casting machine, reduced system reliability and time step limitation, can be solved.

The invention discloses a GPU acceleration LU algorithm of a CSC format sparse matrix in a power system. The GPU acceleration LU algorithm comprises the following steps: compressing and storing an input sparse matrix into a CSC format according to a column priority; based on the stored CSC format, realizing an LU decomposition numerical algorithm suitable for a sparse matrix; parallel parts in the LU decomposition numerical algorithm are realized on a GPU, and parallel design is carried out; and timing the solution. According to the method, by changing the matrix format, in the actual high-dimensional power grid matrix, the parallel LU decomposition efficiency of the power sparse matrix is improved, and the problem that time consumption is large in time domain simulation of power grid nodes in a power system is solved.

The application discloses an aircraft simulation method and device based on parallel block sparse matrix incomplete LU decomposition, equipment and medium, relates to simulation technical field, including: based on each grid point in aircraft grid topology relation and simulation physical parameter constructs and contains several zero sub-block and non-zero sub-block block sparse matrix, and determines several non-zero sub-block corresponding dependent pair and stores by using preset data structure from it;Wherein the dependent pair includes a pair of matched non-zero sub-block;Several non-zero sub-block is respectively distributed to several GPU thread bundles and is handled in parallel, to utilize GPU thread bundle in corresponding non-zero sub-block dependent pair after completing update, based on the dependent pair of completing update, the corresponding non-zero sub-block is updated;After several non-zero sub-block all complete update, based on the several non-zero sub-block of completing update, the block sparse matrix is updated, and the incomplete LU decomposition result is determined according to the updated block sparse matrix to carry out aircraft simulation.

The invention provides a banded matrix LU decomposition fusion optimization method, which comprises the following steps of: firstly, generating a block division strategy based on a Right-looking structure, strictly limiting the calculation range of each round of iteration in a banded area, and processing data outside bandwidth through an auxiliary buffer area; then SCAL and GER operations in Panel decomposition are fused to a single kernel function, after SCAL is completed by a first thread block, a plurality of thread blocks execute GER in parallel, and an intermediate result is multiplexed through a register to reduce global memory access; and finally, based on the strategy and the kernel assembly execution process, dynamically determining the size of the blocks, sequentially calling the fused kernel and the optimized matrix to update the kernel in each round of iteration, and advancing along a main diagonal until decomposition is completed. The invention also provides a banded matrix LU decomposition fusion optimization system. In this way, the calculation parallelism, the data locality and the memory access efficiency are effectively improved, and strip matrix LU decomposition is remarkably accelerated.

The application discloses a high-bandwidth memory FPGA sparse LU decomposition acceleration method based on asynchronous task triggering and belongs to the technical field of LU decomposition hardware acceleration, aiming at solving the performance bottleneck and efficiency challenge faced by sparse LU decomposition acceleration on an FPGA. The method comprises the following steps: data and dependency relationship preprocessing, generating a dependency degree list and a dependency trigger mapping list for FPGA runtime scheduling; customizing an FPGA hardware acceleration architecture; updating fine-grained dependency according to a runtime column completion signal; adopting a double-queue task distribution strategy, preferentially distributing high data affinity tasks to corresponding processing unit groups according to a predetermined data affinity mapping relationship; when a local task queue is unavailable, distributing tasks through global task queue rotation; each PEG receives triggered sparse segment tasks, asynchronously loads original matrix data and dependent L / U factors, and completes sparse LU numerical decomposition through parallel multiplication and accumulation and division calculation.