37 results about "Triangular matrix" patented technology

The invention relates to the technical field of array signal processing, in particular to a space-frequency power inversion anti-interference method fusing SMI-LDL decomposition. The problems that an existing space-time anti-interference technology is high in calculation complexity, and real-time processing is difficult to achieve in limited resources of a navigation receiver are mainly solved. The method comprises the following steps: firstly, converting a radio frequency signal received by an array into a digital intermediate frequency signal and carrying out sliding window partitioning processing; windowing the data block and performing FFT (Fast Fourier Transform) to obtain a frequency domain array; then calculating an auto-covariance matrix R of other array elements except the reference array element and a cross-covariance matrix r of the reference array element and other array elements; lDL decomposition is carried out on the auto-covariance matrix to obtain a lower triangular matrix L and a diagonal matrix D, and inversion is carried out on the lower triangular matrix L and the diagonal matrix D respectively, so that huge operand caused by direct inversion of the covariance matrix is avoided; and finally, calculating an optimal weighting vector according to a power inversion criterion, and performing spatial filtering on the frequency domain data.

The application discloses a multiple wave prediction method and device, a computing device and a storage medium. The method comprises the following steps: acquiring frequency domain data of any shot point at any seismic trace; generating a seismic data matrix according to the frequency domain data, the seismic data matrix being an upper triangular matrix with a main diagonal line of 0, and any non-first column of the seismic data matrix containing frequency domain data of at least one seismic trace of the same shot point; constructing a multiple wave matrix, the multiple wave matrix being an upper triangular matrix with a main diagonal line of 0, and any non-first column of the multiple wave matrix containing a multiple wave model of at least one seismic trace of the same shot point; establishing a functional relationship between the multiple wave matrix and the seismic data matrix; and obtaining model frequency domain data corresponding to any multiple wave model in the multiple wave matrix according to the functional relationship. According to the scheme, the prediction efficiency of the multiple wave can be improved under the premise of ensuring the prediction accuracy of the multiple wave.

This application relates to the field of plasma physics technology and provides an asymmetric inversion method and apparatus based on a matching mechanism for plasma diagnostics. The method acquires plasma magnetic flux data, observation lines, and measurement integral values. The magnetic flux data is preprocessed to obtain preprocessed magnetic flux data. Based on the preprocessed magnetic flux data, a closed magnetic surface uniquely matched to each observation line is determined. A lower triangular matrix is ​​constructed based on each observation line and the closed magnetic surface. An inversion equation is constructed based on this lower triangular matrix and the measurement integral values. Finally, the inversion equation is solved to determine the parameter distribution values ​​of the plasma. This method achieves three-dimensional spatial projection of the observation lines and magnetic flux, rapidly determining the position of the closed magnetic surface using geometric relationships, thus improving computational efficiency. Simultaneously, it accurately establishes a one-to-one correspondence between the closed magnetic surface and the observation lines, making the ill-posed problem in solving the matrix equations a unique solution, improving the success rate of solving using the stacking method, and significantly reducing computational errors.

The invention discloses a joint sorting QR decomposition method and related device for multi-antenna detection, and belongs to the technical field of multi-input multi-output signal detection, and the method comprises the steps: initializing an orthogonal matrix and an upper triangular matrix; acquiring a channel matrix H; extracting candidate columns from residual columns in the channel matrix H based on the sum of residual energy and self energy joint weighting, updating an orthogonal matrix and an upper triangular matrix according to the candidate columns until all columns in the channel matrix H are traversed, and obtaining a final orthogonal matrix and a final upper triangular matrix; and taking the final orthogonal matrix and the upper triangular matrix as a joint sorting QR decomposition result for multi-antenna detection, the method and the related device can shear out the nodes with the super radius as early as possible, reduce access nodes, and improve the speed of multi-antenna detection while ensuring the detection performance.

The application provides a pathological section recognition neural network model weight encryption method, including: acquiring a bit string as a pathological section recognition neural network model weight key; writing the bit string into a lower triangular matrix according to 8 bits as a number to obtain a first data matrix; performing digital conversion on the first 8 bits in the bit string to obtain first element data; reading a weight matrix of the pathological section recognition neural network model into a blank matrix to obtain a weight vector matrix; combining the first element data matrix and the weight vector matrix together to obtain a first data vector; obtaining an intermediate ciphertext vector by using a chaotic mapping algorithm according to the first data matrix and the first data vector; performing element data processing on the intermediate ciphertext vector to obtain a weight vector intermediate encryption matrix; and performing position disordering on the weight vector intermediate encryption matrix to obtain an encrypted weight vector matrix. The application can improve the safety coefficient of the neural network weight.

The application provides a distributed security outsourcing computing processing method based on sparse matrix transformation, and relates to the technical field of computers, and the method comprises the following steps: acquiring a first matrix and a second matrix; randomly generating a key set comprising a binary permutation matrix, a sparse triangular matrix and a random vector; performing primary encryption on the first matrix and the second matrix based on the binary permutation matrix; performing secondary encryption on the primary encrypted matrix based on the sparse triangular matrix; distributing the secondary encrypted first secondary encrypted matrix to each edge end in an integrated manner, distributing the second secondary encrypted matrix to each edge end in an even manner after dividing the second secondary encrypted matrix into column vectors according to columns, and enabling the edge end to perform a subtask calculation operation by using the received matrix and return the result to the user end; receiving the calculation results of the edge ends, and aggregating the results; verifying the reliability of the aggregated results by using the random vector, and decrypting the final calculation result. The scheme can improve the security and timeliness of outsourcing computing.

The application discloses a method for calculating equivalent resistance based on a many-to-many mode, which comprises: filling a conductance matrix of a corresponding resistance network to obtain an extended matrix based on a node to be solved of an equivalent resistance, preordering the extended matrix to determine a permutation matrix P; performing LDL T decomposition on the extended matrix to calculate a lower triangular matrix L and a diagonal matrix D required for calculating the equivalent resistance and determining a non-zero element position in a sparse matrix F; calculating a matrix element of a target matrix Z according to the non-zero element position in the sparse matrix F and the lower triangular matrix L and the diagonal matrix D; and calculating the equivalent resistance according to the target matrix Z. For this purpose, the application does not need to solve all matrix elements, but only needs to calculate matrix elements consistent with the non-zero element position distribution of F, i.e. Z, so as to effectively reduce the calculation amount. Since Z is a sparse matrix and a general dense matrix, the total calculation amount is greatly reduced due to the fewer non-zero elements of Z.

The embodiment of the invention discloses a matrix operation method and device, computer equipment and a storage medium, and belongs to the technical field of computers.The method comprises the steps that block processing is conducted on a transformation matrix to obtain a plurality of transformation blocks, and block processing is conducted on a triangular matrix to obtain a plurality of initial full-element blocks and a plurality of initial triangular blocks; obtaining a transposed full-element block corresponding to each initial full-element block, and obtaining a restored full-element block corresponding to each initial triangular block; according to a preset matrix block position index, determining restored full-element blocks and initial full-element blocks with block positions having an index row-column symmetric relationship, and transposing the full-element blocks into the same target processing group; and performing matrix operation on each transformation block and the processing block at the corresponding block position in the corresponding target processing group, and determining a target matrix operation result according to a matrix block operation result. According to the invention, the matrix operation efficiency, especially the matrix operation efficiency for the symmetric matrix, can be improved.

The application relates to the field of high-performance computing and computing power optimization, and relates to a method for accelerating triangular matrix multiplication based on an atlas 800 platform, which comprises the following steps: cutting a result matrix into multiple task blocks, and presetting an equal division strategy based on the multiple task blocks; generating a mask matrix on a vector calculation unit, and storing the mask matrix back to a global memory; reading the matrix and the mask matrix from the global memory, implementing triangular masking of the matrix by using the vector calculation unit, and obtaining a triangular matrix A after triangular masking; based on the triangular matrix A after triangular masking, calling a cube calculation unit to complete matrix multiplication operation of all the task blocks according to the preset equal division strategy, and obtaining a result matrix. The mix method combining the vector calculation unit and the cube calculation unit is used to complete the triangular matrix multiplication, the calculation efficiency of the triangular matrix multiplication on the NPU is improved, the computing power of the Huawei atlas 800 NPU can be fully utilized, the triangular matrix multiplication calculation is accelerated, and computing power support is provided for the fields of deep learning and scientific calculation.

A computer-implemented method for memory management in a computer system configured for generating a signature of a binary data message m using a key B of a predetermined lattice-based structure is proposed, which comprises: determining coefficients of a 2×2 signature generation matrix SG, wherein the non-diagonal coefficients of the signature generation matrix SG are complex polynomials with a non-zero imaginary part, and the diagonal coefficients of the signature generation matrix SG are real polynomials; and determining a LDL representation of the signature generation matrix SG according to which SG is represented by a matrix product L.D.L*, wherein L is a 2×2 lower triangular matrix with ones on the diagonal, D is a 2×2 diagonal matrix, and L* is the adjoint of L; wherein the storing in a memory buffer of the computer system of the coefficients of the signature generation matrix SG and the coefficients of the matrices of the LDL representation is managed based on that the signature generation matrix SG has real diagonal coefficients, and the memory buffer is used alternatively to store the coefficients of the signature generation matrix SG or the coefficients of the matrix D of the LDL representation.

This invention relates to the field of digital signal processing technology, and discloses a DSP multi-core parallel QR decomposition method and apparatus based on tile algorithm. The method includes: dividing the matrix to be decomposed into blocks in the horizontal direction according to the number of cores of the DSP processor and setting tile blocks; performing QR decomposition on the main diagonal tile blocks; and updating all tile blocks to the right of the main diagonal tile blocks in the horizontal direction; pairwise coupling of the main diagonal tile blocks with each tile block in the vertical direction of the same column; performing QR decomposition on the coupling matrix formed by each pair of couplings; and updating all coupling matrices to the right of the pair of coupling matrices in the horizontal direction; and cyclically executing the decomposition and horizontal update of the main diagonal tile blocks, the coupling decomposition of the tile blocks in the same column, and the update of the right coupling matrix until all main diagonal tile blocks in the matrix to be decomposed have been processed, resulting in an upper triangular matrix. This invention can fully utilize the parallel processing advantages of multi-core processors to achieve inter-core parallel data processing.

The application discloses a running-in state identification method based on a friction signal threshold-free recursive analysis result, extracts nonlinear components of a friction signal time sequence output in a friction and wear process by collecting the friction signal time sequence; constructs a threshold-free recursive matrix by combining a sliding window and an avoidance embedding phase space reconstruction method and realizes visualization of the threshold-free recursive matrix in a two-dimensional plane; divides a lower triangular matrix of the threshold-free recursive matrix into several regions by a group of equidistant line segments parallel to a main diagonal line of the recursive matrix, extracts mean values of recursive elements in the regions, analyzes a change rate of element values of the threshold-free recursive matrix when the threshold-free recursive matrix transitions along the main diagonal line to edges and corners as a recursive measure, analyzes variation rules of the recursive measure along with a running-in and wear process, and further realizes running-in state online identification driven by the friction signal threshold-free recursive analysis result. The application optimizes a recursive characteristic representation and a measure extraction method of the friction signal time sequence, and realizes running-in state online identification from a perspective of dynamics-friction coupling.

The present application relates to a kind of optimal column ordering method and device of tide Jacobian matrix, wherein, method includes: the maximum non-zero element number of optimal pivot column in lower triangular matrix in Jacobian matrix decomposition process is calculated, and the non-zero element upper bound of optimal pivot column is obtained;With the same non-zero element structure of optimal pivot column, pivot row mode skip list and original row mode skip list are updated to empty set;The numerical value of each column number value corresponding to row mode counter in the non-zero element upper bound mode skip list of pivot row of the column number value pointed to by the column number value of optimal pivot column is updated, and the numerical value of pivot row mode counter and original row mode counter is obtained;The column metric value of each column number value in the non-zero element upper bound mode skip list of pivot row of the column number value pointed to by the column number value of optimal pivot column is updated and calculated.The present application can improve the response speed and effectiveness of power flow calculation.

The invention provides an implementation method of a reconfigurable low-power-consumption triangular interleaver, and relates to the technical field of wireless communication, and the method comprises the steps: obtaining the number of rows and columns of an upper right-angle triangular matrix; constructing a column index counter, an address offset and a read address; writing the data stream according to a row sequence to obtain a write address of the data; the read addresses are progressively increased row by row, the initial values of the read addresses and the incremental quantity are equal to the row and column number of the matrix, and the value of the incremental quantity is progressively decreased along with the row number; and judging whether the data corresponding to the current address is valid during each reading, and skipping the address if the data corresponding to the current address is invalid. Through dynamic parameter calculation, the triangular interleaver with configurable parameters is realized, and the flexibility is high. Meanwhile, storage resource occupation is reduced, and power consumption is reduced.

The present application belongs to the technical field of reservoir computing, and particularly relates to a method for implementing a large-scale optoelectronic reservoir computing system. The method comprises: performing matrix sparsification connection to form a sparse connection matrix in the form of a lower triangular matrix composed of basic matrix calculation units A and B; then performing rank reduction operation on the sparse connection matrix, so that the product of the original sparse matrix and the input signal is converted into the product form of each basic matrix unit after splitting and the input signal after splitting, and the dimension of each subunit is reduced to 1 / 2 of the original dimension; the above splitting operation is repeated until the splitting reaches the scale supported by the optical chip unit; then the reservoir is trained and tested to obtain a weight matrix calculation prediction value. The multiplication operation shares the same chip, and the multiplication and accumulation operation of a matrix of any scale can be completed by multiplexing the basic scale optical computing chip. The present application achieves ideal effects in the application of communication signal post-equalization, signal recognition, etc.

The invention discloses an edge device simulation calculation method and device and electronic equipment, and relates to the field of electric digital data processing. The method comprises the following steps: dividing a first simulation data matrix into a plurality of first simulation data matrix blocks; determining a first simulation data matrix block corresponding to each task block in the task block set; second simulation data matrix blocks corresponding to the diagonal blocks in the second simulation data matrix are determined, the diagonal blocks and the second simulation data matrix blocks corresponding to the diagonal blocks execute preset calculation operation in parallel, and first solving results corresponding to the diagonal blocks are obtained; and calling the task block to execute a preset calculation operation in parallel according to the first solving result, the off-diagonal blocks and the second simulation data matrix to obtain a second solving result corresponding to each off-diagonal block. The technical problem that large-scale logistics simulation cannot be efficiently achieved due to the fact that the solving efficiency of a triangular matrix linear equation set in the related technology is low is solved.

This invention discloses a multi-core computing method and apparatus for QR decomposition that integrates column-block TSQR and tile update. The method includes: for a large-scale matrix to be decomposed, horizontally dividing it into blocks based on the number of cores in the multi-core processor, and further dividing the large-scale matrix into multiple layers according to the tile update method; constructing a multi-stage pipeline with a binary tree structure, performing parallel triangular decomposition on the initial layers of the large-scale matrix through the multi-core processor to obtain the corresponding upper triangular matrix and orthogonal matrix; replacing the original layer block matrix with the upper triangular matrix, performing conjugate transpose on the orthogonal matrix to obtain the update matrix, and implementing parallel updates for the remaining layers through the multi-core processor; based on the reflection vector implicitly stored by the multi-core processor during the parallel triangular decomposition process, solving for the overall orthogonal matrix corresponding to the large-scale matrix, and simultaneously outputting the overall upper triangular matrix obtained after layer update. This invention can realize QR decomposition of large-scale matrices.

The invention relates to the technical field of large-scale multiple-input-multiple-output, and provides a signal processing method and device, electronic equipment, a medium and a product, and the method comprises the steps: determining a Gramer matrix of a channel matrix according to the channel matrix of a multiple-input-multiple-output (MIMO) system and the conjugate transpose of the channel matrix; decomposing an augmented matrix determined according to the conjugate transpose of the channel matrix and the Gramer matrix to obtain a decomposed augmented matrix, and eliminating the Gramer matrix in the decomposed augmented matrix into an upper triangular matrix, a lower triangular matrix corresponding to the upper triangular matrix is determined according to elimination factors recorded in the elimination process; and back substitution calculation is carried out on the decomposed augmented matrix to obtain a weighting matrix, and the weighting matrix is used for carrying out zero-forcing detection on the received signal. The adaptability of the real-time signal detection method is improved, and the problem that an existing method is difficult to deal with changeable service scenes is effectively solved.

The invention relates to the field of computer hardware acceleration, and discloses a triangular matrix calculation method based on folding compression, computer equipment and a storage medium, and the method comprises the steps: building a streaming load quantification model, and obtaining the load distribution characteristics of all calculation nodes of a triangular matrix algorithm in a streaming calculation architecture; a collaborative compression operation is executed, and a calculation task mapping scheme is generated; performing alignment processing on the combined multiple paths of input data streams; the computer equipment comprises a processor, a memory and a computer program which is stored on the memory and can run on the processor; a computer program is stored in the storage medium. Through a folding compression method, the utilization rate of the processing unit is improved, and hardware resource occupation is reduced; through systematic load quantification and optimization space search, the design efficiency is improved; and reliable implementation of the scheme on hardware is ensured through a special micro-architecture and a data alignment mechanism.

The application relates to the technical field of large-scale multiple-input multiple-output, and provides a signal processing method and device, electronic equipment, a medium and a product.The method comprises the following steps: determining a Gram matrix of a channel matrix of a multiple-input multiple-output (MIMO) system according to the channel matrix and a conjugate transpose of the channel matrix; decomposing an augmented matrix determined according to the conjugate transpose of the channel matrix and the Gram matrix to obtain a decomposed augmented matrix, wherein the Gram matrix is eliminated as an upper triangular matrix in the decomposed augmented matrix, and a lower triangular matrix corresponding to the upper triangular matrix is determined according to an elimination factor recorded in an elimination process; and performing back substitution calculation on the decomposed augmented matrix to obtain a weighting matrix, wherein the weighting matrix is used for zero-forcing detection of a received signal.The adaptability of a real-time signal detection method is improved, and the problem that an existing method is difficult to cope with various service scenarios is effectively solved.

The invention discloses an MVDR beam forming FPGA structure based on a multi-mode systolic array and an implementation method. The FPGA structure comprises a data acquisition module used for obtaining a sampling matrix of a floating point type; the FSM scheduling module is used for performing scheduling control on the multi-port storage RAM, the multi-mode calculation module and the data stream; the multi-mode calculation module comprises a division unit, a negation unit, a delay unit, a cache unit and a systolic array unit formed by N * N PE units, and is used for performing covariance matrix solving, LDL decomposition, triangular matrix and diagonal matrix inversion and calculating an optimal weight according to the solved inverse matrix; each PE unit is used for carrying out floating point complex number multiplication and floating point complex number accumulation operation on input data; and the multi-port memory RAM is provided with an X-dimensional read port and a Y-dimensional read / write port. The resource overhead is small, and the real-time performance and the hardware cost can be both considered.

The present disclosure provides a terminal initialization method, device, electronic equipment and storage medium. The terminal initialization method comprises: obtaining initialization parameters, inertia constraints and visual constraints of a terminal; constructing an information matrix according to the initialization parameters, inertia constraints and visual constraints; performing Schur complement elimination on the information matrix to eliminate the feature points from the information matrix to obtain an eliminated information matrix; performing Cholesky decomposition on the eliminated information matrix to obtain an upper triangular matrix and a lower triangular matrix; inverting the image frame state quantity corresponding to the nearest preset time in the upper triangular matrix to obtain the square root of the covariance, and then determining the covariance; and determining the initialization state of the terminal according to the covariance and the initialization parameters. The method of the present disclosure can quickly solve the covariance and reduce the state quantity fluctuation amplitude.

The application discloses an audio data enhancement method and device and a storage medium, and relates to the technical field of data processing. The method comprises the following steps: performing Fourier transform on an audio signal based on different window lengths to obtain frequency domain features, and encoding the frequency domain features to obtain an encoded feature sequence; determining an attention score matrix of the encoded feature sequence through an attention mechanism, multiplying a preset lower triangular matrix with the attention score matrix to obtain attention weights, weighting the encoded feature sequence with the attention weights, and obtaining a fusion feature sequence; determining a first adaptive weight according to a sampling rate of the audio signal, determining a second adaptive weight according to the encoded feature sequence corresponding to each window length, weighting the fusion feature sequence based on the first adaptive weight and the second adaptive weight, and obtaining an adaptive feature sequence; inputting the adaptive feature sequence into a one-way LSTM layer, mapping the hidden state output by the LSTM layer to a target dimension through linear transformation, obtaining an enhanced audio feature sequence, and realizing adaptive sampling rate.

The application discloses a system for constructing globally coupled low-density parity-check code based on nested structure and belongs to the technical field of communication and channel coding. In order to solve the problem that the code rate of the globally coupled LDPC code is single and cannot adapt to the changing requirements of a channel, the application first generates a null matrix B mgc (N) in the form of a base matrix of an N-level MGC-LDPC code, wherein the diagonal line is a base matrix of N globally coupled low-density parity-check codes, and the elements under the diagonal line are connection matrices for connecting the base matrices of different GC-LDPC codes; then a N*N lower triangular matrix is constructed according to a Galois field GF(q), and a base matrix B gc，1 , B gc，2 ,..., B gc，N and a connection matrix B cm，n′，n″ of N globally coupled low-density parity-check codes are constructed; finally, the globally coupled low-density parity-check code based on the nested structure is obtained by combining the B mgc (N) in the form.

The invention discloses a network link attribute determination method and device, electronic equipment and a program product, and relates to the field of network link analysis, and the method comprises the following steps: decomposing an adjacent matrix containing an adversarial edge in a communication network topological graph structure to obtain an adjacent matrix containing an adversarial edge; performing rank reduction processing and re-multiplication processing on the unitary matrix and the upper triangular matrix obtained by decomposition to obtain a purification matrix; meanwhile, different weights are configured for the confrontation edge and the credible edge of the adjacent matrix, and a reconstruction matrix is generated in combination with the self-circulation weight; and fusing robust information in the purification matrix and the reconstruction matrix through a graph fusion model, learning a multi-head self-attention weight, and outputting a network link attribute prediction result. According to the method, the technical problem that the accuracy is reduced due to the fact that network link attribute relation prediction is easily attacked by adversarial when a graph neural network is adopted in related technologies is solved.

The invention discloses a matrix inversion method, a matrix inversion circuit, a signal processing method, a signal processing device, an integrated circuit, an electromagnetic wave sensor and terminal equipment, which can realize El Mitt matrix inversion. The El Matrix inversion circuit is used for performing inversion on an El Matrix A. The El Matrix inversion circuit comprises a Cholesky decomposition circuit used for calculating a lower triangular matrix L to enable LLH to be equal to A, and LH is conjugate transpose of L; and the triangular matrix inversion circuit is used for calculating the inverse L-1 of the lower triangular matrix L, and the product of the conjugate transpose of the L-1 and the L-1 is the inverse of the El matrix A.

A method performed by an apparatus of a robot may comprise generating an elimination tree of a sparse matrix associated with an autonomous movement operation of the robot, obtaining information related to a pattern of each column of an upper triangular matrix corresponding to the sparse matrix by exploring a reach of the elimination tree, performing, based on the information related to the pattern of each column, numerical decomposition on the sparse matrix using an upper triangular transpose solution, outputting, based on the numerical decomposition on the sparse matrix, a signal, and controlling, based on the signal, the autonomous movement operation of the robot.

This invention discloses a spatial text query method and apparatus, comprising: acquiring a query request; the query request including a query range and a query keyword set; the query range being a closed region formed by a query curve; encoding the query keyword set to obtain a query keyword vector; performing polynomial fitting on the query curve to determine a query range vector; obtaining a first lower triangular matrix based on the query range vector and the query keyword vector; encrypting the first lower triangular matrix using a first encryption matrix to obtain query trapdoors; determining objects that meet preset conditions as query results based on each query trapdoor and the index of each object in the spatial text dataset; the index of any object is obtained by encrypting a second lower triangular matrix obtained based on the spatial location of the object and the keyword set using a second encryption matrix. This satisfies the user's actual query range needs and improves query accuracy.

The invention provides a reconfigurable matrix inversion system and method supporting multiple matrix decomposition modes, and the system selects a decomposition process according to the attributes of a matrix through a top-layer control module, enables the system to process various non-singular matrixes, and enlarges the application range of hardware inversion. After the process is determined, by multiplexing a triangular matrix inversion module and a matrix multiplication module which are necessary in Cholesky and LU processes, the logic and area resource overhead caused by simply integrating two sets of independent hardware to support the two algorithms is avoided. Meanwhile, the data processing module is responsible for transposition, transformation and rearrangement operation, the calculation module is liberated from a complicated data formatting task, the calculation module can concentrate on core arithmetic operation, and the utilization efficiency of calculation resources and the overall performance of the system are improved. Therefore, according to the system, through multiplexing of hardware modules and reasonable division of tasks, effective balance between calculation performance and hardware cost is achieved; in the aspect of functions, two matrix inversion accelerators which are reconstructed into Cholesky inversion and LU inversion are supported, and high performance, universality and expandability of matrix inversion are guaranteed.

The invention discloses a GF (2) domain QC-LDPC (Quasi-Cyclic Low-Density Parity-Check) lower triangular matrix solving circuit and method based on forward replacement, and belongs to the field of digital communication and integrated circuit design. The circuit comprises an input interface module, a shift value storage SRAM (Static Random Access Memory), a column block recursion control module, a cyclic shift array, a parallel XOR accumulation array, a register register array and an output register module. According to column block structure characteristics of a triangular matrix under QC, the system adopts a forward replacement algorithm to realize rapid solution and demand-free inverse operation of a matrix equation T.X = B under a GF (2) domain through cyclic shift and bitwise XOR operation. The structure can be executed in a streamlined mode, one column of blocks are solved in each period, and the structure has the advantages of being high in parallelism degree, low in delay, low in power consumption and the like and is suitable for matrix operation acceleration of an LDPC encoder and high-speed communication hardware.