371 results about "Triangular matrix" patented technology

Provided are a multi-dimensional detector for a receiver of an MIMO system and a method thereof. The multi-dimensional detector includes a first symbol detecting unit for calculating symbol distance values using an upper triangular matrix (R) obtained from QR decomposition to detect an m^th symbol; a symbol deciding unit for deciding a symbol having a minimum distance value among the calculated symbol distance values from the first symbol detecting unit; and a second symbol detecting unit for calculating symbol distance values using an updated received signal y and the upper triangular matrix R to detect a (m−1)^th symbol.

Optimal Decision Feedback Equalizer (DFE) coefficients are determined from a channel estimate by casting the DFE coefficient problem as a standard recursive least squares (RLS) problem and solving the RLS problem. In one embodiment, a fast recursive method, e.g., fast transversal filter (FTF) technique, is used to compute the Kalman gain of the RLS problem, which is then directly used to compute MIMO Feed Forward Equalizer (FFE) coefficients. The FBE coefficients are computed by convolving the FFE coefficients with the channel impulse response. Complexity of a conventional FTF algorithm may be reduced to one third of its original complexity by selecting a DFE delay to force the FTF algorithm to use a lower triangular matrix. The length of the DFE may be selected to minimize the tap energy in the FBE coefficients or to ensure that the tap energy in the FBE coefficients meets a threshold.

The invention discloses a quickening method utilizing cooperative work of a CPU and a GPU to solve a triangular linear equation set, aiming at providing the quickening method so as to lead a solving method based on a CPU platform for the triangular linear equation set to be quickened on a heterogeneous platform of the CPU plus the GPU. The technical scheme of the quickening method is as follows: first, the CPU is utilized to carry out matrix inversion so as to obtain an inverse matrix A-1 of a triangular matrix A; second, a matrix B is divided into two matrixes B1 and B2; third, two calculations of A-1*B1 and A-1*B2 are executed on the CPU and the GPU in a collateral manner so as to achieve load balance of the CPU and the GPU, and the results of A-1*B1 and A-1*B2 are respectively X1 and X2; finally, the X2 is returned to the CPU, and the X1 and the X2 are merged into one matrix X for output. The quickening method realizes overlapping calculation of the CPU and the GPU, achieves good effect of load balance, and quickens the solving of the triangular linear equation set.

Signals in a multi-channel, impaired communication system are post-processed at the receiver. A triangular matrix Decision Feedback Demodulator (DFD) at the receiver extracts channels without requiring delivery of receiver parameters to the transmitter. Multi-Input Multi-Output (MIMO) processing matrices and DFD parameters are computed by first applying matrix transformations to diagonalize the noise covariance matrix of the multiple channels received at the receiver. QR decompositions (i.e., decompositions into orthogonal and triangular matrices) are then applied to the main channels to obtain triangular channel matrices. The noise-diagonalizing transformations and QR decompositions are then combined to form the MIMO postprocessing matrices and DFD parameters. MIMO postprocessing matrices and DFD parameters are computed from training data and then adapted during live data transmission.

Maximum likelihood detection of signals in a MIMO receiver. A system transformation is obtained by selecting a weighting matrix that when linearly transforming a channel utilized for wireless communication, results in a particular transformed triangular matrix. The weighting matrix is then used to provide a transformed vector for a received signal that allows a search in one constellation. In searching the constellation recursion values are used to calculate the Euclidean distances between set points of the constellation and the location on the constellation corresponding to the received signal for both bit values 0 and 1. Minimum Euclidean distances are determined for bit values 0 and 1 and the difference of the minimum Euclidean distances is used to compute the maximum likelihood value for bits contained in the received signal.

A transmitting device Fourier-transforms symbols in a transmission symbol sequence, maps the Fourier-transformed symbols to subcarriers, inverse-Fourier-transforms the mapped symbols, and transmits the inverse-Fourier-transformed symbols from multiple transmitting antennas. A receiving device Fourier-transforms received signals, extracts signal components mapped to the subcarriers, and estimates the symbols transmitted via the subcarriers by applying a QR decomposition algorithm to the extracted signal components. The receiving device obtains a unitary matrix Q^H such that the product of the unitary matrix Q^H, a weight matrix W determining a correspondence between the transmission symbol sequence and the subcarriers, and a channel matrix H becomes a triangular matrix R, and estimates candidates of the symbols transmitted from the transmitting antennas based on the unitary matrix Q^H and the triangular matrix R.

The invention discloses a triangular matrix multiplication vectorization method of a vector processor. The triangular matrix multiplication vectorization method of the vector processor comprises the steps that (1) triangular matrix elements in a multiplicand triangular matrix T are stored continuously by row; (2) a multiplier matrix B is divided into a plurality of sub-matrixes Bi by row according to the number of vector processing units of the vector processor and the number of MAC parts of the vector processing units; (3) the sub-matrixes Bi are multiplied by the multiplicand triangular matrix T in sequence and then the results are stored on storage positions of the original sub-matrixes Bi; (4) the sub-matrixes Bi of the multiplier matrix are traversed and then the fact that whether sub-matrixes Bi which are not multiplied by the multiplicand triangular matrix exist is judged, the I is updated according to the formula i=i+1 and the steps are repeated from the step (3) if sub-matrixes Bi which are not multiplied by the multiplicand triangular matrix exist, and step (5) is executed if sub-matrixes Bi which are not multiplied by the multiplicand triangular matrix do not exist; (5) triangular matrix multiplication is accomplished. The triangular matrix multiplication vectorization method of the vector processor has the advantages that the principle is simple, operation is easy and convenient, and the calculation efficiency of the vector processor can be fully performed.

The invention discloses a low-complexity quick parallel matrix inversion method. The method comprises the following steps that first, a matrix A is given, a matrix E is made to be a unit matrix with the same order as the matrix A, the matrix A and the matrix E form an expanding matrix B, modified Givens rotation (MSGR, Modified Square Givens Rotations) is carried out on the matrix B, an upper triangular matrix U and , wherein according to the define of the matrix U and , an SGR (Squared Givens Rotations) method is used for deforming the QR division of the matrix A according to the equation, and the relation between the QR division and original QR division meets the equations , , , and ; according to the MSRG method, the square root operation in the process of Givens rotation can be omitted while division operation is reduced, and algorithm complexity is obviously reduced; second, a back substitution method is used for working out the inverse matrix U-1 of the upper triangular matrix U; third, matrix inversion is carried out according to the equation . According to the low-complexity quick parallel matrix inversion method, a large amount of division operation and a large amount of square root operation are omitted, algorithm complexity is reduced, and the method can be used for matrix inversion of the fields of wireless communication, signal processing and numerical calculation.

The invention discloses a BD (block diagonalization) pre-coding method and device, wherein the method comprises the following steps: determining a total user channel matrix Hs according to a downlink channel matrix of each user in a system; carrying out QR factorization on a conjugate transpose matrix of the total user channel matrix Hs to obtain a product of an orthogonal matrix Q and an upper triangular matrix R, and expressing the total user channel matrix Hs as the product of a lower triangular matrix L and a conjugate transpose matrix QH of the orthogonal matrix Q; carrying out inverse calculation on the lower triangular matrix L to obtain L-1; according to the inversed L-1 of the lower triangular matrix L and the orthogonal matrix Q, obtaining a null space orthogonal basis of an interference channel matrix of each user; according to the null space orthogonal basis of the interference channel matrix of each user, constructing a linear pre-coding matrix of each user; and carrying out linear pre-coding on a transmitting signal of each user by utilizing the constructed linear pre-coding matrix. The technical scheme disclosed by the invention can reduce the system complexity and improve the coding efficiency.

The invention discloses a successive interference cancellation method in a multiple input and multiple output system, comprising QR ordering and decomposition are carried out on a channel transmission matrix based on householder transformation to obtain an upper triangular matrix R, and according to the matrix R, precoding successive interference cancellation is executed on all the transmit signals, or the successive interference cancellation is executed on the received signal. As the matrix R is the upper triangular matrix, the successive interference cancellation can be sequentially executed on all the transmit signals by utilizing the characteristics of the upper triangular matrix, thus avoiding determining the successive detection sequence in a way using VBLAST for matrix inverse or pseudo-inverse, and further simplifying the computational complexity of the successive interference cancellation and improving the performance of signal detection.

A pseudo-spatial-average-covariance-matrix generating unit selects, from matrixes R_f1, R_f2, R_b1 and R_b2, one appropriate matrix or two or more appropriate matrixes for combination to generate a pseudo-spatial-average-covariance matrix R. A pseudo-spatial-average-covariance-matrix Hermitian-conjugate product generating unit generates a target-count-estimation matrix RR^H. A target-count-estimation-matrix decomposing unit performs LU decomposition on RR^H into a lower triangular matrix L and an upper triangular matrix U. An index generating unit generates an index using elements of the upper triangular matrix U. An index-parameter scanning unit estimates a target count by using the index generated by the index generating unit.

Disclosed is a transmitting/receiving method in a multi-user multiple-input multiple-output (MU-MIMO) channel. The transmitting method includes: performing QR decomposition on a Hermitian transpose matrix of a channel matrix to obtain a first matrix and a second matrix as a triangular matrix; obtaining a preprocessing matrix by using the first matrix; and forming an effective channel based on the preprocessing matrix by a block triangulation technique.

A method of generating parity data based on a low-density panty check matrix and an apparatus therefor, the method including: reordering columns of the parity check matrix based on elements in each column having values of one to generate a reordered parity check matrix; determining a cross-point between a diagonal line of a parity matrix part in the parity check matrix and a reordered diagonal line defined by a first entry of an element having a value of one in each column of the reordered parity check matrix; and performing column permutations on the reordered parity check matrix on the basis of positions of elements having a value of one in rows above a horizontal line that passes through the cross-point to generate a triangular matrix, thus reducing the computations required to generate parity data, thereby efficiently obtaining the parity data.

The invention discloses a data processing device. The data processing device is used for solving a lower triangular matrix L corresponding to an n*n symmetric positive definite matrix R, wherein the R is equal to LDLH, the D is a diagonal matrix, the LH is a conjugate transpose matrix of the L, and the n is an integer larger than or equal to 2. The data processing device comprises a multiplying unit, an accumulator and a summator. The input end of the data processing device is connected with the input end of the multiplying unit, the output end of the multiplying unit is connected with the input end of the accumulator, the output end of the accumulator is connected with the output end of the summator, the input end of the data processing device is also connected with the input end of the summator, the output end of the summator is used for outputting matrix data to a storage device, and the output end of the multiplying unit is also used for outputting matrix data to the storage device. By means of the data processing device, the symmetric positive definite matrix can be decomposed without a large amount of root extraction operation, operation complexity is lowered, and logical operation resources are saved.