180 results about "Permutation matrix" patented technology

A method for transmitting data via multiple antennas by modulating data to be transmitted into a plurality of modulated symbols, encoding each pair of modulated symbols from among said plurality of symbols in accordance with a transmission diversity scheme to result in a plurality of N by N matrices, with each N by N matrix corresponding to each pair of modulated symbols, generating a M by M code matrix comprised of the plurality of N by N matrices, orthogonally spreading the M by M code matrix to generate an output matrix, generating a plurality of row-permuted matrices by exchanging at least one pair of rows in the output matrix, and transmitting the symbols in the plurality of row-permuted matrices via a plurality of antennas by using either a space time transmission diversity scheme, a space frequency transmission diversity scheme, or a combination of a space time transmission diversity scheme and a space frequency transmission diversity scheme.

A method for determining a test strip calibration code for use in a meter includes inserting a test strip into the meter. The inserted test strip having a substrate with a working surface for receiving the body fluid sample and a reverse surface that is in opposition to the working surface. The test strip also includes a permutative grey scale calibration pattern disposed on either of the working and reverse surfaces, with the permutative grey scale calibration pattern including more than one grey scale region. Moreover, the scale regions of the test strip define a grey scale permutation that uniquely corresponds to a calibration code of the test strip. The method also includes detecting the permutative grey scale calibration pattern with a grey scale photodetector module of the meter and determining a calibration code that uniquely corresponds to a grey scale permutation defined by the permutative grey scale calibration pattern based on permutation matrix stored in the meter.

A method for determining a test strip calibration code for use in a meter includes inserting a calibration strip into the meter, with the calibration strip having a substrate and a permutative grey scale calibration pattern disposed on the substrate. In addition, the permutative grey scale calibration pattern includes more than one grey scale region that define a grey scale permutation uniquely corresponding to a calibration code of test strips in a package associated with the calibration strip. The method also includes: (i) detecting the permutative grey scale calibration pattern with a grey scale photodetector module of the meter, and (ii) determining a calibration code that uniquely corresponds to a grey scale permutation defined by the permutative grey scale calibration pattern based on a permutation matrix stored in the meter.

A method for generating a parity check matrix of a block LDPC code is disclosed. The parity check matrix includes an information part corresponding to an information word and a first parity part and a second parity part each corresponding to a parity. The method includes determining a size of the parity check matrix based on a coding rate applied when coding the information word with the block LDPC code, and a codeword length; dividing a parity check matrix with the determined size into a predetermined number of blocks; classifying the blocks into blocks corresponding to the information part, blocks corresponding to the first parity part, and blocks corresponding to the second parity part; arranging permutation matrixes in predetermined blocks from among the blocks classified as the first parity part, and arranging identity matrixes in a full lower triangular form in predetermined blocks from among the blocks classified as the second parity part; and arranging the permutation matrixes in the blocks classified as the information part such that a minimum cycle length is maximized and weight values are irregular on a factor graph of the block LDPC code.

A low density parity check (LDPC) code that is particularly well adapted for hardware implementation of a belief propagation decoder circuit is disclosed. The LDPC code is arranged as a macro matrix (H) whose rows and columns represent block columns and block rows of a corresponding parity check matrix (H_pc). Each non-zero entry corresponds to a permutation matrix, such as a cyclically shifted identity matrix, with the shift corresponding to the position of the permutation matrix entry in the macro matrix. The block columns of the macro matrix are grouped, so that only one column in the macro matrix group contributes to the parity check sum in any given row. The decoder circuitry includes a parity check value estimate memory which may be arranged in banks that can be logically connected in various data widths and depths. A parallel adder generates extrinsic estimates that are applied to parity check update circuitry for generating new parity check value estimates. These parity check value estimates are stored back into the memory, and are forwarded to bit update circuits for updating of probability values for the input nodes. Variations including parallelism, time-sequencing of ultrawide parity check rows, and pairing of circuitry to handle ultrawide code rows, are also disclosed.

An apparatus and method for coding an irregular Repeat Accumulate (RA) code. A repeater repeats a received information word such that the information word corresponds to weights of a first information part and a second information part of a parity check matrix in which permutation matrixes are arranged in the first information part and the second information part corresponding to the information word such that a minimum length of a cycle on a factor graph of the irregular RA code becomes a predetermined length and weights are irregular, and a dual diagonal matrix is arranged in a parity part corresponding to a parity. An interleaver interleaves a signal output from the repeater using an interleaving scheme predefined for the parity check matrix. An accumulator generates the irregular RA code by accumulating a signal output from the interleaver according to a weight of the parity part.

A regular quasi-cyclic matrix is prepared, a conditional expression for assuring a predetermined minimum loop in a parity check matrix is derived, and a mask matrix for converting a specific cyclic permutation matrix into a zero-matrix based on the conditional expression and a predetermined weight distribution is generated. The specific cyclic permutation matrix is converted into the zero-matrix to generate an irregular masking quasi-cyclic matrix. An irregular parity check matrix in which the masking quasi-cyclic matrix and a matrix in which the cyclic permutation matrices are arranged in a staircase manner are arranged in a predetermined location.

The invention discloses an Android application program protective method and system based on order confusion in the technical field of information safety. A permutation matrix needed when an application program is confused is generated, and binary codes of the Android application program are confused, so that the confused codes can not be reversed. A system mirror image document used for executing the confused application program is generated, a safe executing platform is set up, and the confused application program is executed. The Android application program protective system based on order confusion comprises a matrix generation module, an application program confusion module, an interpreter generating module, a system document generation module and an executing module. The Android application program protective method and system based on order confusion can effectively protect the Android application program from the attack of an attacker suck as reversing and tampering.

A method for producing a set of inbound pulse patterns and detection vectors for lengths longer than 4 cycles in an AC waveform. These are used for generating inbound messages in a two-way automatic communication system (TWACS). The method uses Hadamard matrices adapted to generate a set of detection vectors by permuting rows of a matrix and removing certain columns of the matrix to meet system design requirements. The method can be extended to any length and modified to accommodate multiple pulses per half-cycle to support higher data rates.

The invention discloses a method for mapping control channel sources. The method comprises the following steps: confirming the number of source element groups occupied by a physical control format indicator channel (PCFICH) and a physical hybrid automatic repeat request indicator channel (PHICH) and the total number of the source element groups supported by a system; confirming a number NREG of the source element groups occupied by a physical downlink control channel (PDCCH) according to the confirmed total number and the number of the source element groups occupied by the PCFICH and the PHICH; expanding a complex value 4-tuple sequence of the PDCCH according to the NREG to obtain an expanded 4-tuple sequence; mapping the expanded 4-tuple sequence into a matrix according to a first preset mode; permuting the columns of the matrix to obtain a permutation matrix; reading the permutation matrix in a second preset mode to obtain a new 4-tuple sequence; and mapping the new 4-tuple sequence to the source element groups by a time priority principle. The invention also discloses a device for mapping the control channel sources. The invention can reduce the mutual interference among the control channels and improve the diversity effect of an OFDM technology.

This invention relates to a method for constructing new non-standard replacement matrix LDPC codes characterizing that under the principle of optimizing the smallest ring circuit, it takes each sub-block as the smallest unit and utilizes a binary chart with weight to determine the position of the sub-block and the deviation of circulation shift: simplifying the binary chart with bit as the unit of the LDPC code to that with a sub-block as the unit based on the property of the matrix of a replacement unit, then applying the traditional PEG algorithm with the bit as the unit to the new chart with the sub-block as the unit to determine the position of every replacement unit matrix of the H matrix and finally utilizing the ring circuit property of the LDPC code to decide the deviation of circular shift of each replacement unit matrix.

The invention discloses a sub-carrier mapping method which comprises: with the set resource block elements as units, physical resource blocks in the frequency band range are rearranged according to a rearrangement sequence so as to be mapped into logical resource blocks; the mapped logical resource blocks in the frequency band range are grouped by a base station, each grouped logical resource block respectively corresponds to one sector, and the superframe control information sent by each sector carries a logical resource block group number which corresponds to the sector; and in each sector of the base station, the resources in the logical resource block group are divided into a centralized mapping resource group and a distributed mapping resource group according to the set proportion, wherein continuous sub-carriers in each resource block unit in the centralized mapping resource group are directly mapped to each resource allocation unit, and after being rearranged through a permutation matrix, all sub-carriers in the distributed mapping resource group are sequentially mapped to each resource allocation unit. The technical scheme of the invention can ensure that users who move quickly and slowly can obtain high throughput.

Methods, apparatuses, and systems are presented for performing data encoding involving receiving a sequence of data bits, encoding the sequence of data bits in accordance with a parity check matrix (H-matrix) to generate a sequence of encoded bits, wherein the H-matrix is capable of being partitioned into a first matrix and a second matrix, the first matrix being a dual-diagonal matrix, the second matrix comprising one or more vertically stacked sub-matrices, each sub-matrix consisting of a plurality of columns, each column having a column weight of no more than 1, wherein the second matrix is capable of being expressed as a product of a parity check matrix, an interleaver permutation matrix, and a repeat block matrix, and the interleaver permutation matrix satisfies a clash-free interleaver constraint, and outputting the sequence of encoded bits.

Methods and apparatus for generating a private-public key pair, for encrypting a message for transmission through an unsecure communication medium (30), and for decrypting the message are disclosed. The methods are based on the well-known McEliece cryptosystem or on its Niederreiter variant. More general transformation matrices Q are used in place of permutation matrices, possibly together with an appropriate selection of the intentional error vectors. The transformation matrices Q are non-singular n×n matrices having the form Q=R+T, where the matrix R is a rank-z matrix and the matrix T is some other matrix rendering Q non-singular. The new Q matrices, though at least potentially being dense, have a limited propagation effect on the intentional error vectors for the authorized receiver. The use of this kind of matrices allows to better disguise the private key into the public one, without yielding any further error propagation effect. Based on this family of Q matrices, the presently proposed cryptosystem enables the use of different families of codes than Goppa codes, such as RS codes, by ensuring increased public key security.

An information sequence having a code length of N (N=K+M), where K is information length and M is parity length, is encoded into a code sequence by using an LDPC code. The LDPC code is generated based on a matrix H, with M rows and N columns. The matrix H includes a check matrix H₂ and a check matrix H₁. The check matrix H₂ has M rows and M columns, it is a cyclic permutation matrix, and an inverse matrix exists for the check matrix H₂, and its column weight is 3. The check matrix H₁ has M rows and K columns.

This invention discloses a method and system for generating a private key and a corresponding public key. These keys can be used for encrypting a message into a cipher-text for transmission through an insecure communication channel, and for decrypting said ciphertext into a clear plaintext. The goal of the present invention is to provide encryption and decryption methods of the McEliece type which are capable of improving the security level of a post-quantum cryptosystem. In one embodiment, this object is achieved by three methods: a method for creating a public key from a private linear code generator matrix, a method for encrypting a message into a ciphertext and a method for decrypting the cipher-text into a plaintext. The key generation and encryption methods of the present invention comprises the following steps:

• • selecting an [n, k] linear code generator matrix G_s=[g₀ , . . . , g_n] over GF(q) as the private key, where k, w, n and q are positive integers and where g₀ , . . . , g_n−1 are length k column vectors; selecting k×1 random matrices C₀ , . . . , C _w−1; selecting a k×k non-singular matrix S; selecting an (n+w)×(n+w) matrix A; selecting an (n+w)×(n+w) permutation matrix P; and setting the public key as G=S[g₀ , . . . , g_n−w, C₀ , . . . , g_n−1, C_n−1]AP.
  • receiving the public key G, which is a k×(n+w) matrix over a finite field GF(q); generating an error vector e having elements in GF(q) and having a predetermined weight t; and encrypting a message vector m, to a ciphertext vector y=mG+e.

The main difference between the proposed cryptosystem and known variants of the McEliece cryptosystem consists in the way the private generator matrix is disguised into the public one by inserting and mixing random columns within the private generator matrix.