50 results about "Matrix entry" patented technology

A system and a method are disclosed for synchronizing folders between one or more layers of folders. It includes selecting layers to link together, comparing folders in the selected layers using an immutable identifier, parsing the folders of each of the selected layers into fields, comparing the fields of parsed folders of the selected layers, and determining whether to synchronize the folders of the selected layers based on conflict rules triggered in response to the comparison of the fields of the parsed folders. Also disclosed is a system and method of merging two or more folders in a network into a single folder. It includes comparing entries between folders to identify duplicate entries, grouping the identified duplicate entries in each folder, generating a matrix from the duplicates grouping and assigning each matrix entry a value, and matching the matrix entries based on the assigned values to determine an extent to merge an identified duplicate entry.

Encoder circuitry for applying a low-density parity check (LDPC) code to information words is disclosed. The encoder circuitry takes advantage of a macro matrix arrangement of the LDPC parity check matrix in which a left-hand portion of the parity check matrix is arranged as an identity macro matrix, each entry of the macro matrix corresponding to a permutation matrix having zero or more circularly shifted diagonals. The encoder circuitry includes a cyclic multiply unit, which includes a circular shift unit for shifting a portion of the information word according to shift values stored in a shift value memory for the matrix entry, and a bitwise exclusive-OR function for combining the shifted entry with accumulated previous values for that matrix entry. Circuitry for solving parity bits for row rank deficient portions of the parity check matrix is also included in the encoder circuitry.

An apparatus and method causes a response action in an electrical power distribution system having, inter alia, a plurality of intelligent electronic devices (IEDs) configured to provide protective monitoring and control of the electrical power system. The method includes detecting receipt of one of a number of matrix input signals that can be received from the plurality of IEDs, and comparing the matrix input signal to a configuration of a m×n cross-point switch matrix having a corresponding number of A[m,n] entries. Each of the n rows is associated with a matrix input signal and each of the m columns is associated with one of a number of matrix output signals that can be transmitted to the plurality of IEDs. The method also includes asserting a matrix output signal based on the comparison to cause the response action.

An apparatus and method causes a response action in an electrical power distribution system having, inter alia, a plurality of intelligent electronic devices (IEDs) configured to provide protective monitoring and control of the electrical power system. The method includes detecting receipt of one of a number of matrix input signals that can be received from the plurality of IEDs, and comparing the matrix input signal to a configuration of a m×n cross-point switch matrix having a corresponding number of A[m,n] entries. Each of the n rows is associated with a matrix input signal and each of the m columns is associated with one of a number of matrix output signals that can be transmitted to the plurality of IEDs. The method also includes asserting a matrix output signal based on the comparison to cause the response action.

Light distortion due to light noise or light scattering object in the path of a light beam from a projector to a camera's image sensor in projector-camera systems are mitigated, or eliminated, by a simple modification to a light transport matrix T. For each row in light transport matrix T, matrix entries along a common row are compared, and all but the highest valued entry in the row are zeroed out, i.e. nullified. It is preferred that an array and record notation be used in order to reduce the size of the light transport matrix T, and its modified version to two arrays.

The invention discloses a method for predicting the power quality of a power distribution network including distributed generation based on a support vector machine. The method comprises the steps ofinputting a PQ data matrix, and dividing the data matrix into a test set matrix and a verification training set; further dividing the verification training set into a training set and a verification set; performing data normalization processing; obtaining optimal c and g parameters in each set division mode based on a grid searching method, obtaining an optimal set division mode based on a K-foldcross verification method, and finishing parameter optimization of a support vector machine model; carrying out power quality prediction on the basis of a built optimal PQ prediction model; and calculating a relative error value of a prediction result.

A semiconductor device analyzer has a substrate model reading module, a Y-matrix entry module, a discriminating module, a matrix reduction module, and an output format discriminating module. The substrate model reading module reads a substrate network model of three-dimensional meshes representing the substrate of a semiconductor device. The substrate network model is a network of resistive and capacitive elements and is used for the simulation and analysis of the semiconductor substrate. The Y-matrix entry module prepares a Y-matrix from the substrate network model, each element of the Y-matrix being expressed with a polynomial of differential operator “s”. The discriminating module discriminates internal nodes to be eliminated from external nodes to be left among the nodes of the substrate network model. The matrix reduction module eliminates the internal nodes, thereby reducing the Y-matrix. The output format determining module determines an output format for an operation result.

A variable code rate adaptive encoding / decoding method using LDDC code is disclosed, in which an input source data is encoded using the LDPC (low density parity check) code defined by a first parity check matrix configured with a plurality of submatrices. The present invention includes the steps of generating a second parity check matrix corresponding to a code rate by reducing a portion of a plurality of submatrices configuring a first parity check matrix according to the code rate to be applied to encoding an input source data and encoding the input source data using the second parity check matrix.

The present invention provides a method and apparatus for implementing a matrix algorithm for scheduling instructions. One embodiment of the method includes selecting a first subset of instructions so that each instruction in the first subset is the earliest in program order of instructions associated with a corresponding one of a plurality of sub-matrices of a matrix that has a plurality of matrix entries. Each matrix entry indicates the program order of one pair of instructions that are eligible for execution. This embodiment also includes selecting, from the first subset of instructions, the instruction that is earliest in program order based on matrix entries associated with the first subset of instructions.

The present invention provides a method and apparatus for implementing a matrix algorithm for scheduling instructions. One embodiment of the method includes selecting a first subset of instructions so that each instruction in the first subset is the earliest in program order of instructions associated with a corresponding one of a plurality of sub-matrices of a matrix that has a plurality of matrix entries. Each matrix entry indicates the program order of one pair of instructions that are eligible for execution. This embodiment also includes selecting, from the first subset of instructions, the instruction that is earliest in program order based on matrix entries associated with the first subset of instructions.

The invention discloses a large-scale MIMO linear detection hardware framework under a non-ideal communication channel. A channel response matrix is enabled to sequentially pass through a triangular pulsation multiplication module and a noise addition module, and enters into a three-diagonal inversion module and a three-diagonal multiplication module. The three-diagonal inversion module selects three-diagonal elements in a matrix outputted by the noise addition module to form a three-diagonal matrix, and carries out the inversion calculation of the three-diagonal matrix. The triangular pulsation multiplication module enables the matrix, which is outputted by the noise addition module, after three diagonals are removed to multiply with a three-diagonal inversion matrix obtained from the three-diagonal inversion module. The results of the three-diagonal inversion module are inputted to a three-diagonal addition module, and the results of the three-diagonal multiplication module are inputted to a lower triangular pulsation multiplication module. The three-diagonal addition module and the lower triangular pulsation multiplication module enable a generated matrix to be inputted to a detection module after loop iteration. The framework reduces the hardware complexity, greatly reduces the calculation complexity, and greatly reduces the throughput rate.

The invention discloses a two-dimensional contour layout and sequencing method based on deep learning, which comprises: acquiring the layout history big data and pre-processing, and calibrating all the arranged parts in the historical data to obtain a layout order matrix Y. Extract the geometric features of each sampled part to obtain the geometric feature matrix X; sorting out the sampled sequence data set PRD-T; building the deep learning model Packing-Sort-Model; inputting the PRD-T data set, and traiiung to obtain, wherein The model Packing-Sort-Model that outputs the order of the parts tobe sampled; extracting the geometric features of the parts to be sampled, obtaining the geometric feature matrix A of the parts to be sampled; inputting the geometric feature matrix of the parts to be placed into the trained In the deep learning model; calculate the layout order matrix B of the parts to be placed; perform the nesting one by one according to the layout order, and complete the layout. The invention can realize the ordering of the parts to be discharged during the layout process, and has good layout effect and high efficiency.

Light distortion due to light noise or light scattering object in the path of a light beam from a projector to a camera's image sensor in projector-camera systems are mitigated, or eliminated, by a simple modification to a light transport matrix T. For each row in light transport matrix T, matrix entries along a common row are compared, and all but the highest valued entry in the row are zeroed out, i.e. nullified. It is preferred that an array and record notation be used in order to reduce the size of the light transport matrix T, and its modified version to two arrays.

The invention discloses a fingerprint epipole accurate positioning method based on an image spatial domain characteristic. The method comprises the following concrete steps: solving a pixel-grade direction field O of a fingerprint image by use of a gradient method; extracting each coarse epipole position in the direction field O by use of a Poincare index method; calculating a binary image I of the fingerprint image by use of a short time Fourier transform method; inputting the direction field O, the coarse epipole positions and the binary image I into a bifurcation aggregation extraction module, and extracting all bifurcation points fc and aggregation points gh within an a*b rectangular scope nearby the coarse epipole positions for storing in a matrix FJi; inputting the matrix FJi into a denoising module to remove all pseudo bifurcation points and pseudo aggregation points of the matrix FJi so as to obtain a matrix FJi<->; inputting the matrix FJi<-> obtained after denoising into an arc extraction module to obtain all arcs, and storing the obtained arcs in a matrix Hu; and inputting the matrix Hu into a precision positioning module to obtain a final result of epipole positioning. According to the invention, spatial domain information of the fingerprint image is utilized, and the detection precision is improved while the epipole detection consistency is maintained.

The invention discloses a face recognition method based on dictionary learning models. The method comprises the following steps of: mapping trained and tested face images to a low-dimension space to acquire a training signal set matrix; establishing the dictionary learning models which comprise an irrelevant dictionary learning (IDL) model and an unconstrained irrelevant dictionary learning (U-IDL) model; inputting the training signal set matrix into the IDL and U-IDL models, and solving the models to acquire an irrelevant dictionary and a linear classifier; acquiring a corresponding sparse vector of each picture belonging to a test sample based on the dictionary acquired in the last step by using a sparse expression algorithm; and inputting the sparse vectors into the linear classifier to acquire category labels of test sample pictures, wherein the result expressed by the category labels is used as the face recognition result. The invention provides the new models and the new method for dictionary learning problems in sparse expression, and the models and the method can be applied to mode identification and image classification problem under common conditions; and particularly, aiming at face recognition application, the dictionary learning method can achieve relatively high face recognition accuracy.