41 results about "Block matrix" patented technology

The invention provides a BLAS3 structured operator accelerated computing system based on a Hopper architecture GPU, and relates to the technical field of computers. The system comprises: a calculation unit discrimination module for determining a calculation unit used by a current operator during operation, and estimating the maximum row dimension upper bound of the current operator in a tensor core execution path; an instruction sensing block parameter determination module dynamically determines the optimal block size and number of the input matrix in real time; the block matrix loading and aligning module divides an input matrix and a matrix to be updated into sub-matrixes by taking the block size as a basic block and completes loading of the corresponding sub-matrixes; the operator kernel function execution module completes shared memory structured parallel loading and storage of a double-precision floating-point number array of a sub-matrix corresponding to the input matrix, and calls a tensor core to carry out multiply-add accumulation calculation; and the assembly line and concurrent scheduling module adds the block calculation tasks into corresponding task sets and performs multi-stream concurrent scheduling on the task sets.

The invention relates to the technical field of telephone communication, and discloses a robust recursive least square adaptive filter based on inverse QR decomposition and a storage medium, and the method comprises the steps: calculating an inner product of an adaptive weight vector at a moment and an input signal vector, and obtaining an output signal at the moment of the adaptive filter; calculating a difference value between the expected signal and the output signal at the moment, obtaining an estimation error signal, and constructing a nonlinear weighting function; recursively updating and acquiring an inverse correlation matrix of the moment input signal vector based on the moment input signal vector and transpose thereof, a nonlinear weighting function, the inverse correlation matrix of the input signal vector and the covariance of the estimated error signal, and constructing a block matrix containing the inverse correlation matrix of the moment input signal vector; inverse QR matrix decomposition and unitary rotation operation are sequentially carried out on the block matrix, an array before inverse QR decomposition and an array after inverse QR decomposition at the moment are obtained, a gain vector at the moment is constructed, and a self-adaptive weight vector at the moment is updated and obtained.

The embodiment of the invention discloses a processor, a chip product, computer equipment and a data processing method. The processor comprises a block matrix calculation unit, a storage unit and a target register, wherein the storage unit is used for storing an input matrix to be processed and inverse quantization data corresponding to the input matrix; the block matrix calculation unit is used for reading the block matrix from the storage unit and reading the last target operation result from the target register; performing accumulation operation on the last target operation result and the block matrix to obtain a candidate operation result; and according to the inverse quantization parameter corresponding to the block matrix read from the storage unit, performing data precision adjustment on each element in the candidate operation result to obtain a current target operation result, and updating and storing the current target operation result in a target register.

The invention discloses a loess mechanical parameter spatio-temporal interpolation prediction model construction method based on big data, and relates to the technical field of geotechnical engineering data analys.The loess mechanical parameter spatio-temporal interpolation prediction model construction method comprises the following steps that loess mechanical parameter data, environmental factor data and geologic structure data are collected through a multi-source sensor, and spatio-temporal unified multi-modal data are constructed; designing a collaborative kernel function fusing spatial heterogeneity and time dynamics on the basis of multi-modal data, and quantifying relevance between mechanical parameters and space-time positions and environmental factors; according to the collaborative kernel function, dynamically optimizing a space weight, a time attenuation coefficient and a multi-source data fusion weight, and generating a parameter-adaptive interpolation model; carrying out distributed training and calculation acceleration on the interpolation model by adopting a block matrix approximation and parallel calculation architecture; through the trained model, a mechanical parameter prediction value of a target space-time position is calculated in real time, and the calculation efficiency is improved through a tensor expansion algorithm.

Provided in the embodiments of the present application are an optimization method for implementing high-performance single-precision matrix multiplication by using Ascend-based half-precision computing units, and a related device. The method comprises: first, acquiring a first half-precision matrix of a first single-precision matrix, a second half-precision matrix of a second single-precision matrix, a second error matrix between the second single-precision matrix and the second half-precision matrix, and a plurality of second block error matrices in the second error matrix, and storing the second block error matrices in an L1 buffer of parallel computing hardware; and acquiring first block matrices in the first half-precision matrix one by one, storing the first block matrices in the L1 buffer, further performing a matrix operation to obtain a first result matrix, acquiring a second result matrix and a third result matrix, summing the first result matrix, the second result matrix and the third result matrix to obtain a single-precision target matrix, and using the single-precision target matrix as the result of performing a matrix multiplication operation on the first single-precision matrix and the second single-precision matrix. Thus, the accuracy and computational speed of single-precision matrix multiplication are effectively improved.

This invention relates to a method for measuring the depolarization of a medium in intravascular polarization-sensitive optical coherence tomography (ICP-CT), comprising: setting the polarization state of the input light of a catheter polarization-sensitive optical coherence tomography system; setting the reference light in the H and V channels of the input light and the reference light in the system to have equal intensity; acquiring the electrical signals measured at the polarization diversity point in the form of a Jones matrix to obtain the average measurement Mueller matrix; calculating the standard deviation matrix of the reference region; obtaining the depolarization Mueller matrix of the reference region; extracting the block matrix of the average measurement Mueller matrix of the reference region; calculating the average double attenuation block matrix of the reference region; constructing the average double attenuation matrix of the reference region; obtaining the pseudo-average birefringence phase delay matrix of the reference region; extracting the average depolarization matrix of the reference region from the pseudo-average birefringence phase delay matrix of the reference region using matrix decomposition; obtaining the depolarization Mueller matrix of the target region; and calculating the medium depolarization coefficient.

This invention relates to a method and system for reducing single-node memory usage based on distributed reading of ultra-large-scale sparse matrices. The ultra-large-scale sparse matrix is ​​stored in Rutherford-Boeing format, including: (1) converting the Rutherford-Boeing format to row compression for convenient matrix operations and parallel processing, and storing the data in row compression format; (2) each node calculates the row pointer, column index, and non-zero element value of its respective block matrix row compression; (3) each node writes the calculated row pointer, column index, and non-zero element value to its respective file in row compression format; (4) when the application needs the ultra-large-scale sparse matrix, the node reads the data from its respective file, and the process ends. This invention achieves fast reading speeds when multiple nodes read in parallel, eliminates the need for data distribution between nodes, avoids communication congestion, and improves overall performance.

The invention discloses an image data rotation optimization method and device, and the method is applied to a data rotation optimization network, and the method comprises the steps: obtaining packaged image data through an application layer, processing the image data into initial color space data containing brightness data and chrominance data, converting the initial color space data into a pointer type through a bridging layer; the code layer performs block matrix transposition operation on the brightness data and performs block matrix transposition and chrominance calibration processing on the chrominance data at the same time, and rotated brightness data and rotated chrominance data are obtained respectively; and combining the rotated brightness data and the rotated chrominance data into processed color space data in a code layer, returning the processed color space data to an application layer through a bridging layer, and outputting rotated image data. According to the invention, the overall processing duration of image rotation is reduced by adopting the block matrix while the matching between the bright and dark contours of the image and the color is ensured.

The invention discloses a method and system for transmitting a monitoring video of a chemical device, and the method comprises the steps: obtaining a YUV value of each frame of image in a to-be-transmitted video, generating a plurality of first matrixes which respectively correspond to a component Y, a component U and a component V and represent a YUV color space for each frame of image, converting each first matrix into a projection matrix, and transmitting the projection matrix to the video to be transmitted; obtaining a dimension reduction matrix for extracting key features of the image; each dimension reduction matrix is decomposed into a plurality of block matrixes with the same dimension, each block matrix is quantized, then for each dimension reduction matrix, first-time serialization sequencing is carried out on the block matrixes after single quantization, second-time serialization sequencing is carried out on all the quantized block matrixes after the first-time serialization sequencing is carried out, and each dimension reduction matrix is obtained; obtaining a YUV color space array of each frame of image; and performing coding compression on each frame of image by using the YUV color space array, thereby finishing video transmission by transmitting the coded and compressed image. According to the invention, efficient and accurate transmission of the monitoring video is realized.

The application provides a kind of tank sealing quick detection method, system and storage medium, including obtaining and preprocessing the original signal data of tank detection, obtain input sample data;Initialize width learning model, build initial feature node set and calculate initial output weight matrix;Node increment iteration is carried out until model AIC value does not decline for two times in succession or increment node number reaches upper limit;Each iteration includes: calculate the residual matrix between prediction and label, determine the number of candidate feature nodes to be generated according to F norm, and generate weight to build candidate pool using Sobol sequence;Calculate the Pearson correlation coefficient of each candidate node and residual, select the node with the largest absolute value as the incremental node and incorporate into the model, and update the output weight matrix using block matrix inversion method;When the number of new nodes reaches the pruning period, set the pruning threshold, and remove the feature nodes with weight norm less than the threshold;The model obtained after iteration termination is used to discriminate the tank to be tested.

This application discloses an acceleration system and method for performing causal attention computation on an edge computing device. The system includes: a hardwired scheduling controller for generating a control signal sequence based on the lower triangular structure of causal attention; a matrix multiplication unit for reading corresponding query blocks and key blocks according to the control signal sequence, performing block matrix multiplication operations, and calculating score blocks; a vector computation unit configured to receive the score blocks and value blocks in a streaming manner and perform Softmax normalization and weighted accumulation operations; and a triangular mask generation circuit connected to the hardwired scheduling controller and integrated between the matrix multiplication unit and the vector computation unit, for masking elements in the score block whose row index is less than the column index when the data block indicated by the control signal sequence is a diagonal block. The system of this application reduces the computational load and power consumption on the edge computing device and improves resource utilization.

A method for generating a low-density parity-check code, including: arranging t block matrices along a diagonal to form a local matrix, wherein the t block matrices are identical and do not overlap; the block matrix has m rows and n columns; interposing an all-zero matrix between each two adjacent columns of the block matrix to separate the n columns and form an expanded global matrix, wherein each all-zero matrix has a size of m×(t−1); permutating the expanded global matrix rightward circularly in sequence to generate t expanded global matrices, and arranging the t expanded global matrices under the local matrix in sequence to form a basic parity-check matrix. The present invention can flexibly adjust the code length and the CPM size of the basic parity-check matrix, reducing the complexity of the parity-check matrix to further simplify the implementation of the decoder hardware.

The invention provides a parallel solving method of a chip dynamic power consumption model based on Cholesky decomposition, and the method specifically comprises the following steps: S1, receiving sparse symmetric positive definite matrixes, carrying out the matrix sorting, and constructing a chip power consumption model matrix; s2, rearranging sub-matrixes of the chip power consumption model matrix and constructing an elimination tree; s3, performing hierarchical cutting and sub-tree recursive splitting on the eliminated tree; s4, traversing the sub-tree set after recursive splitting, merging the sub-trees with the node number lower than a preset minimum threshold value, and generating a multi-diagonal-block matrix; s5, performing Cholesky decomposition on the multiple diagonal block matrixes in parallel to obtain a lower triangular matrix; s6, the diagonal blocks and the non-diagonal coupling blocks of the lower triangular matrix are recombined into an extended sub-matrix, an inverse matrix is solved step by step through a recursion method, and parallel solving of the diagonal block inverse matrix in the multi-diagonal-block matrix is achieved; s7, solving an inverse matrix of the multi-diagonal block matrix; and S8, carrying out parallel calculation on the Schur complement based on the inverse matrix of the multi-diagonal block matrix so as to realize the parallel solution of the chip power consumption model.

This invention provides an underdetermined mode identification method based on block term decomposition and adaptive kurtosis harmonic separation, belonging to the field of structural health monitoring and operating mode identification technology. The method acquires multi-channel vibration responses, calculates the covariance matrices under different time delays, and stacks them into a third-order tensor. Block term tensor decomposition is used to extract the time-domain autocovariance function sequence of each potential component. The natural frequencies and damping ratios of each component are initially estimated using local peak finding and logarithmic decay methods. The minimum truncation length is adaptively calculated based on the coupling relationship between period and damping ratio. Kurtosis values ​​are calculated for the truncated autocovariance sequence, and harmonic interference is eliminated based on a kurtosis threshold while retaining the true structural modes. Finally, mode shapes are extracted from the spatial block matrix of the retained components, outputting high-precision natural frequencies, damping ratios, and mode shapes. This invention can achieve accurate identification of dense modes and high-damped modes under complex operating conditions with severe underdeterminacy and harmonic interference, improving the robustness of operating mode parameter identification.

The application discloses a data processing method and device, equipment and a storage medium, and relates to the technical field of data processing. The method comprises the following steps: acquiring matrix multiplication input data; acquiring a plurality of block matrix data based on the matrix multiplication input data; storing each block matrix data in the buffer; acquiring a loading instruction; transmitting each block matrix data from the buffer to the memory based on the loading instruction; and calculating a block multiplication result matrix corresponding to each block matrix data through the tensor processor based on each block matrix data in the memory. The application splits the matrix multiplication input data to obtain block matrix data that is adapted to the hardware processing characteristics of the tensor processor, thereby avoiding the problem of increased operation time caused by the mismatch between the data dimension and the characteristics of the tensor processor due to the excessive size of the matrix multiplication input data.

The application relates to the technical field of telephone communication, and discloses a robust recursive least square adaptive filter based on inverse QR decomposition and a storage medium, which comprises the following steps: calculating the inner product of an adaptive weight vector at a moment and an input signal vector, and obtaining an output signal of the adaptive filter at the moment; calculating the difference between an expected signal at the moment and the output signal, obtaining an estimated error signal, and constructing a nonlinear weighting function; based on the input signal vector at the moment, a transpose of the input signal vector, the nonlinear weighting function, an inverse correlation matrix of the input signal vector, and a covariance of the estimated error signal, recursively updating the inverse correlation matrix of the input signal vector at the moment, and constructing a block matrix containing the inverse correlation matrix of the input signal vector at the moment; performing inverse QR matrix decomposition and unit rotation operation on the block matrix in sequence, obtaining an inverse QR decomposition front array and a rear array at the moment, constructing a gain vector at the moment, and updating the adaptive weight vector at the moment.

The invention relates to a chip power consumption model solving method based on multi-diagonal-block matrix decomposition, and the method comprises the steps: carrying out the multi-diagonal-block arrow-shaped permutation sorting of an input original super-large-scale complex symmetric block matrix, and generating a global permutation vector; based on a target node index and a global permutation vector specified at a simulation moment, dynamically recombining the matrix to accurately extract a to-be-eliminated sub-matrix; a three-level parallel collaborative architecture is adopted, and diagonal sub-block inverse matrix calculation, in-block coupling item solving and cross-block result aggregation are sequentially executed in parallel; and a diagonal sub-block inverse matrix caching mechanism is introduced to avoid repeated calculation. Through the core design of one-time sorting permanent multiplexing, dynamic accurate extraction and multi-level parallel caching, the calculation complexity and storage overhead of super-large-scale matrix Schur complement are remarkably reduced, the technical bottlenecks that an existing method is low in efficiency and poor in parallelism, and historical results cannot be multiplexed are effectively solved, and the method is suitable for large-scale matrix Schur complement. And the real-time performance and the expandability of chip power consumption simulation are improved.

The invention discloses a UWB NLOS identification method based on fusion feature reasoning, a hardware acceleration method and a hardware acceleration device, and relates to the technical field of UWB positioning, and the method comprises the steps: employing the pulse reconstruction of Poisson modeling and an adaptive leading edge detection algorithm to cut and extract a CIR effective signal segment; then inputting the features into a CTA-Fuse RF model, and extracting high-dimensional abstract features through a convolutional network, a time domain network and a multi-head self-attention network in sequence; and carrying out cascade fusion on the abstract features and UWB physical features, and outputting an identification result through a random forest classifier. In addition, the invention further provides a hardware acceleration device for executing the method, and the hardware acceleration device reconstructs a calculation array based on a self-defined instruction set, and performs convolution pulsation calculation, block matrix multiplication and full binary tree reasoning on a pipeline. According to the method, the problem of insufficient utilization of a single feature is effectively solved, the recognition precision is improved, and low-delay real-time deployment of a complex model on resource-constrained equipment is realized.

The application is a kind of aviation transient electromagnetic profile data noise suppression method. It includes reading aviation transient electromagnetic profile data, estimating profile block size; using block matching algorithm to block profile data and construct similar block matrix; based on noise whitening weighted kernel norm minimization method to solve the low rank structure of similar block matrix, reduce the influence of noise on kernel norm solution, realize local noise reduction by noise optimization of similar block matrix; traverse all similar blocks matched in profile, integrate the results to the estimated profile data; multiple iterations of the above processing to realize the noise suppression of aviation transient electromagnetic profile data. The application uses noise whitening to improve the anti-interference ability of weighted kernel norm minimization to noise, and avoids the false anomaly caused by the decomposition algorithm based on inter-channel correlation by iterative solution of low rank matrix approximation, ensuring the reliability of the denoising result of aviation transient electromagnetic profile data.

The invention discloses an Internet of Things data reconstruction method, application and storage method based on structure enhancement and learnable transformation tensor low-rank modeling, and belongs to the field of Internet of Things data processing. The method comprises the following steps: dispersing a monitoring area into grid points, deploying a sensor, and constructing data of continuous T time slots into a third-order original tensor; constructing a Hankel block matrix by sliding a window of the original tensor in a space-time direction, and stacking the Hankel block matrix to form a structure enhanced tensor; executing tensor singular value decomposition by using unitary transformation, and minimizing a transformation tensor nuclear norm to establish a low-rank constraint; constructing a low-rank tensor completion model, and expanding the low-rank tensor completion model into an end-to-end trainable network SLRTC-T2Net through an alternating direction multiplier method; and finally, reestablishing missing data by using the trained network. According to the method, the space-time coupling characteristic is fully mined through a double Hankel structure enhancement mechanism, effective coupling of structured modeling and low-rank completion is realized in combination with learnable unitary transformation, the missing data reconstruction precision is effectively improved, and the problem of base mismatching of a traditional sparse method is relieved.

The invention discloses a data processing method and device, equipment and a storage medium, and relates to the technical field of data processing. The method comprises the following steps: acquiring matrix multiplication input data; based on the matrix multiplication input data, obtaining multiple pieces of block matrix data; the data of each block matrix are stored in the buffer; obtaining a loading instruction; based on the loading instruction, transmitting data of each block matrix from the buffer to the memory; and based on the block matrix data in the memory, performing calculation through the tensor processor to obtain block multiplication result matrixes in one-to-one correspondence with the block matrix data. By splitting the matrix multiplication input data, the block matrix data adaptive to the hardware processing characteristics of the tensor processor is obtained, and the problem that due to the fact that the matrix multiplication input data is too large, the data dimension is not matched with the characteristics of the tensor processor, and operation time consumption is increased is solved.

The invention discloses a hardware accelerator and acceleration method of a mixed precision multiplier array, and belongs to the technical field of integrated circuit and artificial intelligence hardware acceleration. The hardware accelerator comprises a register configuration module, a receiving signal control module, a processing unit control module, a processing unit calculation module and a sending signal control module which are connected in sequence; the processing unit calculation module adopts a reconfigurable processing unit array formed by a plurality of low-bit-width basic multipliers, and a single hardware architecture can efficiently support matrix multiplication and addition operation of various data precisions through a hardware multiplexing and dynamic configuration mechanism. According to the method, the data stream is optimized through the block matrix distribution network, and the multi-stage assembly line and ping-pong cache technology are combined, so that the problems of low resource utilization rate and poor energy efficiency of the existing accelerator in a mixed precision calculation scene are effectively solved, and the calculation efficiency and energy efficiency ratio of a large-scale artificial intelligence model are remarkably improved.

The invention provides a large-scale sequence sparse attention calculation method based on bidirectional LSH hash, aiming at solving the technical problems of high calculation complexity and large memory occupation when an existing Transform architecture processes long sequence data. According to the method, a technical scheme of combining a bidirectional LSH hash function family and an adaptive bucket partitioning strategy is adopted, a random orthogonal basis vector is generated through a Gram-Schmidt orthogonalization method, and efficient sparse attention calculation is realized in combination with dynamic bucket size adjustment and an overlapping bucket partitioning mechanism; and meanwhile, block matrix operation and a multi-GPU pipeline parallel architecture are introduced, so that the calculation efficiency and the resource utilization rate are optimized. Experimental results show that compared with a traditional Transform architecture, the method has the advantages that the calculation efficiency is improved by 7.5 times, the memory occupation is reduced by 85%, the supported sequence length is expanded to 1 million, the calculation accuracy is kept, meanwhile, the 8-card near-linear speed-up ratio 7.8 is achieved, and an efficient solution is provided for large-scale sequence data processing.

The invention discloses a systolic array based on a hierarchical expansion processing unit and a tensor processor thereof, in an OS mode in the systolic array, a block matrix weight is activated, and the block matrix is input into a 8 * 8 PE module of a first row and a first column along horizontal and vertical directions for operation; then enabling three modules located in one row and one column, one row and two columns and one row and three columns to receive the previous operation result and the block matrix and execute multiplication and addition operation in parallel; the block matrixes slide along the array until all the block matrixes are calculated; in a WS mode, activating a block matrix to enter a module of a first row and a first column, and enabling the module to perform multiplication and addition operation based on a fixed weight; then enabling three modules of one row and one column, one row and two columns and one row and three columns to receive the previous operation result and activate the block matrix, and executing multiplication and addition operation based on own fixed weight; the block matrixes are activated to slide along the array until all the block matrixes are calculated, and therefore the systolic array with the high energy efficiency ratio is provided.

This invention discloses a multi-core computing method and apparatus for QR decomposition that integrates column-block TSQR and tile update. The method includes: for a large-scale matrix to be decomposed, horizontally dividing it into blocks based on the number of cores in the multi-core processor, and further dividing the large-scale matrix into multiple layers according to the tile update method; constructing a multi-stage pipeline with a binary tree structure, performing parallel triangular decomposition on the initial layers of the large-scale matrix through the multi-core processor to obtain the corresponding upper triangular matrix and orthogonal matrix; replacing the original layer block matrix with the upper triangular matrix, performing conjugate transpose on the orthogonal matrix to obtain the update matrix, and implementing parallel updates for the remaining layers through the multi-core processor; based on the reflection vector implicitly stored by the multi-core processor during the parallel triangular decomposition process, solving for the overall orthogonal matrix corresponding to the large-scale matrix, and simultaneously outputting the overall upper triangular matrix obtained after layer update. This invention can realize QR decomposition of large-scale matrices.

This application provides a method and apparatus for multiplying large-scale matrices by powers of integers modulo 2. The method includes: performing multiple vector inner product operations on each divided block matrix pair, and calculating the modulo multiplication result. The vector inner product operation includes: expanding the partial product based on multiple vector element pairs participating in the vector inner product operation, and retaining the effective partial products with bit weights lower than the target bit width after expansion, according to the target bit width; obtaining the modulo result of a single vector inner product based on the effective partial products; aggregating the modulo results of all vector inner products of the same block matrix pair to obtain the modulo multiplication result of the block matrix pair; and accumulating the modulo multiplication results of all block matrix pairs to obtain the final modulo multiplication result. The method pads high-order bits for partial products whose width is insufficient to reach the target bit width, and truncates partial products whose width exceeds the target bit width, so that subsequent operations only process effective low-order data, thereby reducing hardware resource consumption and the number of addition stages.

The invention discloses a digital signal processing method, a direction of arrival estimation method, a direction of arrival estimation device, an integrated circuit, a device and equipment, an M * M Toeplitz-Hermite matrix RM is constructed based on a digital signal obtained by processing a system receiving signal, the RM is inversed, and then the digital signal processing function is realized based on continuous processing, a B * B sub-matrix in a block matrix of an RM is taken as a basic calculation unit according to a Gauberg-Schelitscher decomposition expression, and a matrix multiplication and addition operation of B parallelism is executed through hardware to obtain that B is greater than or equal to 2, and M is an integral multiple of B. According to the embodiment of the invention, the operation parallelism degree is higher, and the operation speed is higher.

The invention discloses a property project operation cost measuring and calculating method, which comprises the following steps of dividing a property project to be received to obtain a plurality of functional areas; obtaining historical operation data of the functional areas, and evaluating a cost value and an income value of each functional area based on the historical operation data; constructing a sub-block matrix of each functional area based on the cost value and the profit value, and constructing an initial cost matrix according to the sub-block matrixes; the influence degree between every two sub-block matrixes is evaluated, an incidence matrix is constructed, the incidence matrix is supplemented into the initial cost matrix, and a final cost matrix is obtained; accounting the operation cost of the property project to be received according to the final cost matrix, and judging whether to receive the property project based on the operation cost; after the incidence matrix is determined by introducing mutual influence among different functional areas, the incidence matrix is combined with the sub-block matrix to form the final cost matrix, and the operation cost of the property project to be received can be accurately calculated through the final cost matrix so as to guide a property company to judge whether the project is received or not.

The application discloses a dimension-reduction robust adaptive beamforming method based on grouping cycle optimization, which comprises the following steps: 1, calculating a sampling covariance matrix based on array sampling snapshot data; 2, designing a linear constraint condition of a weight vector according to actual application requirements; 3, initializing the weight vector and related parameters; 4, grouping elements in the weight vector and correspondingly blocking the related parameters; 5, calculating a blocking matrix and a transformation matrix corresponding to each group; 6, optimizing elements in each group and updating the related parameters in sequence; 7, calculating an output variance and a relative change measure of two successive iterations; 8, making a threshold decision on whether iteration is terminated, if the relative change measure is less than a threshold value, iteration is terminated and an optimal weight vector is output, otherwise, steps 6-8 are repeated.

The present application relates to the technical field of signal processing, in particular to a random noise suppression method and device for ground penetrating radar data, wherein the method comprises: performing self-similar block matching processing on original ground penetrating radar data to obtain a self-similar block matrix; performing multiple synchronous squeezing transformation on the self-similar block matrix to obtain a multiple synchronous squeezing transformation result three-dimensional matrix; applying low-rank constraint to the multiple synchronous squeezing transformation result three-dimensional matrix to establish a low-rank matrix and a sparse matrix; superimposing the low-rank matrix to obtain a time domain denoising result, and reconstructing effective signals according to the time domain denoising result to generate ground penetrating radar data after random noise suppression. Thus, the problems of insufficient adaptability, signal structure damage, weak non-stationary processing capability and poor low-energy target extraction effect of the existing random noise suppression method for ground penetrating radar data are solved.