The invention discloses a multi-heterogeneous main
body system optimization method and
system oriented to a real-
time processing scene, and the method comprises the steps: a CPU employs a bare core BMP mode for parallel division of labor, the CPU comprises a plurality of large cores and a plurality of small cores, a control task and a protection task are operated on the large cores, a
master station command is received, and a background task is operated on the small cores; the FPGA writes back and reads data between a DDR (
Double Data Rate) memory of the CPU and an internal cache of the FPGA according to a set time slot or period, and data preprocessing carried out in the data writing back and reading process is migrated from the CPU to an FPGA layer to be executed; three-buffer independent access and
atomic state switching are combined, and data interaction among multiple cores is carried out; the
compiler automatically inserts a prefetch instruction in a loop expansion and
pipeline scheduling stage; and the
compiler performs linear address arrangement on the data members in a
physical address space. The instruction execution efficiency and the
data access efficiency are improved.