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Multi-rate multi-code length LDPC code decoding method based on SIMD instruction set

A technology of LDPC code and decoding method, which is applied in the direction of error detection coding, coding, code conversion, etc. applying multiple parity bits, which can solve the difficulty of LDPC code, high implementation complexity, and is not the most effective LDPC code decoder Implementation methods and other issues to achieve the effect of reducing storage capacity, eliminating dependencies, and reducing implementation complexity

Active Publication Date: 2018-08-03
SOUTHEAST UNIV
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Problems solved by technology

[0006] The LDPC decoder implemented by pure software has attracted the attention of many researchers in recent years. However, the research in recent years has mainly focused on the flooding method of LDPC decoding and GPU implementation, which is not the most effective LDPC decoding. device implementation
The latest research (Reference 1: Gal B L, Jego C. High-Throughput Multi-Core LDPCDecoders Based on x86Processor [J]. IEEE Transactions on Parallel & Distributed Systems, 2016, 27(5): 1373-1386.) proposed a method based on A high-speed decoder for LDPC codes based on the X86 architecture. However, this method requires off-line statistical information about the parity check matrix, and the implementation complexity is high. It is difficult to apply it to a class of 5G-oriented LDPC codes that support multiple code rates and multiple code lengths.
[0007] Among the LDPC decoding algorithms that have been proposed so far, the layered decoding algorithm has the characteristics of fast convergence speed and less memory usage and has attracted extensive attention. Although the parallelism of the layered decoding algorithm is not high, it is suitable for X86 architecture processors. Software implementation; the current existing research shows that the logarithmic likelihood ratio sent to the LDPC code decoder adopts 6-bit quantization, and the decoder adopts 8-bit processing mode. Compared with fixed-point decoding and floating-point decoding, the performance loss can be ignored Excluding

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  • Multi-rate multi-code length LDPC code decoding method based on SIMD instruction set
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[0062] The technical solutions provided by the present invention will be described in detail below in conjunction with specific examples. It should be understood that the following specific embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention.

[0063] The invention aims at the disadvantage that the existing algorithm needs off-line statistical check matrix information, and combines the basic matrix characteristics of the LDPC code with quasi-cyclic structure, and proposes a decoding method suitable for the LDPC code with multiple code rates and multiple code lengths. According to the configuration file, online statistics of LDPC code check matrix information. In order to improve the decoding throughput rate and memory usage efficiency, the fixed-point layered decoding method is adopted. The present invention eliminates the dependence on the offline statistical results, and constructs multiple check node ...

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Abstract

The invention provides a multi-rate multi-code length LDPC code decoding method based on a SIMD instruction set. The method comprises the following steps: realizing check matrix information online statistic through external configuration document by combining the LDPC code-based matrix feature in quasi-cyclic structure; through the adoption of a fixed point layered decoding scheme, respectively constructing a specific check node computing unit for different row weights by a decoder, and selecting the check node computing unit according to different row weights, wherein a cyclic expansion way is adopted in the check node computing unit. The online statistic of the check matrix information is realized, and the storage amount of the multi-rate multi-code length LDPC code decoder is reduced; compared with the existing algorithm, the dependence on the matrix statistical information is eliminated, and the realization complexity of the decoder is realized; compared with the existing algorithm, the speed loss is avoided, and the module for online computing can be modified, and the universality is provided.

Description

technical field [0001] The invention belongs to the technical field of channel coding, and specifically relates to a decoding method, more specifically, relates to a multi-code-rate and multi-code-length LDPC code decoding method based on a SIMD instruction set. Background technique [0002] The LDPC code is the Low-Density Parity-Check (LDPC) code, which was first proposed by Dr. Robert G. Gallager in 1963 as a linear block code with a sparse parity check matrix and was adopted in 1995 by D.J. and R.W. Neal re-presented. LDPC codes have good performance close to the Shannon limit, and have low decoding complexity, flexible structure, low delay, and high-speed parallel decoding. It has been a research hotspot in the field of channel coding for nearly two decades. At present, LDPC codes have been widely used in wireless communication (WiFi, WiMAX), deep space communication, optical fiber communication, satellite digital video and audio broadcasting and other fields. Now LDP...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11
CPCH03M13/1108H03M13/116
Inventor 姜明皮秀伟赵春明
Owner SOUTHEAST UNIV
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