High-throughput SHA-1 (Secure Hash Algorithm) based on FPGA

A high-throughput, algorithmic technology, applied in the field of high-throughput SHA-1 algorithm, can solve the problem of low data processing efficiency, achieve the effect of improving throughput, increasing computing speed, and increasing processing capacity

Inactive Publication Date: 2016-11-09
SHENZHEN FORWARD IND CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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If the traditional iterative operation method...

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  • High-throughput SHA-1 (Secure Hash Algorithm) based on FPGA
  • High-throughput SHA-1 (Secure Hash Algorithm) based on FPGA
  • High-throughput SHA-1 (Secure Hash Algorithm) based on FPGA

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[0017] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0018] In the following description, references to "one embodiment," "an embodiment," "an example," "example," etc. indicate that such described embodiment or example may include a particular feature, structure, characteristic, property, element, or limitations, but not every embodiment or example necessarily includes the specific feature, structure, characteristic, property, element or limitation. Additionally, repeated use of the phrase "according to one embodiment of the present application" does not necessarily refer to the same embodiment, although it may.

[0019] For simplicity, some technical features known to those skilled in the art are omitted from the following description.

[0020] According to one embodiment of the pres...

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Abstract

The invention provides a high-throughput SHA-1 (Secure Hash Algorithm) based on an FPGA. The method comprises the steps of S1, judging whether length of input message data exceeds 512 bits or not; S2, carrying out bit compensation on the message data until the length is integer multiples of the 512 bits if the length of input message data exceeds 512 bits; S3, segmenting the message data after bit compensation into multiple data blocks, wherein each data block is 512 bits, and segmenting each data block into 16 characters, wherein each character is 32 bits; S4, carrying out loop unrolling on an original iteration operation formula, thereby forming a loop unrolling structure; S5, determining pipeline series, and forming a pipeline structure by an intermediate register and the loop unrolling structure; and S6, inputting each character into the pipeline structure, thereby obtaining a SHA-1 calculation result. According to the algorithm, the iteration operation is simplified, an intermediate variable is added, therefore, a key path is shortened, and a calculation speed is improved. Moreover, through adoption of a pipeline processing mode, the data processing quantity is increased, and the throughput is improved.

Description

technical field [0001] The invention belongs to the field of encryption algorithms, in particular to an FPGA-based high-throughput SHA-1 algorithm. Background technique [0002] In the field of information security, encrypting information data is a common security measure. Message authentication is used to prove the integrity and accuracy of message data, that is, to prevent message data from being tampered with. Message authentication actually uses the key to generate a new data block for data and encrypts the data block to generate a redundant message authentication code, which is unique and one-to-one corresponding to the data to be protected. The message digest scheme is a commonly used method for generating message authentication codes. It uses a one-way hash function (also known as: one-way Hash function) to take message data of any length as input and compress it into a fixed-length hash value. Or called "digital fingerprint" as output. [0003] Due to the one-way ...

Claims

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Application Information

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IPC IPC(8): H04L9/06
CPCH04L9/0643
Inventor 莫小妮袁结全唐锐
Owner SHENZHEN FORWARD IND CO LTD
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