11 results about "Data dependency" patented technology

This invention provides a berthing adaptation calculation method and system based on a CAD / CAE composite model, belonging to the field of ship berthing auxiliary decision-making technology. It includes: constructing a loading stability calculation model and a three-dimensional profile model database based on the ship loading manual and an initial model containing geometric information; integrating hull geometry, stability, and hydrodynamic performance data into a unified composite model, and defining data dependencies and update triggering rules; solving heave and surge response characteristics based on a wave model, and calculating limit values ​​in conjunction with wave parameters; calculating the safe range of the air gap height at the platform outlet based on the gangway overlap geometry, combined with limit values, tides, and load changes, and dynamically quantifying the risk; and using real-world data to drive online calibration of the composite model and dynamic simulation of the berthing overlap process. This invention achieves accurate dynamic calculation and risk assessment of the air gap under multi-source data fusion, adapting to the berthing needs of multiple ships, and improving berthing safety and operational continuity.

A microprocessor is disclosed that includes a shared functional unit, a first execution queue, and a second execution queue. The first execution queue includes a plurality of entries, where each entry of the first execution queue includes a first count value that is decremented until the first count value reaches zero. When the first count value reaches zero, the first execution queue dispatches a first type of instruction to the shared functional unit. The second execution queue includes a plurality of entries, where each entry of the second execution queue includes a second count value that is decremented until the second count value reaches zero. When the second count value reaches zero, the second execution queue dispatches a second type of instruction to the shared functional unit. A dispatch unit resolves all data dependencies and resource conflicts such that the first count value and the second count value are preset for the first type of instruction and the second type of instruction to be executed by the shared functional unit at exact times in the future relative to each other.

This invention belongs to the field of processor architecture and microarchitecture optimization technology, and relates to a value prediction method for sequential execution processors. It includes: constructing a step value prediction table; recording the most recent true result after the first execution of the target instruction, and forming step information after subsequent executions; generating a predicted value based on the most recent true result and step information when encountering the same static instruction later; writing the predicted value into the corresponding scoreboard entry and propagating it to dependent instructions during the instruction issue phase; writing the true result back to the scoreboard and comparing it with the predicted value after the target instruction is executed; maintaining the existing speculative execution result when the prediction is correct, and pausing front-end instruction fetching, preserving the scoreboard state, and performing a partial reissue recovery on the affected instructions when the prediction is incorrect, before resuming pipeline progression. This invention, while ensuring execution correctness, eliminates some waiting caused by real data dependencies in advance, improving the processor's ability to utilize potential instruction-level parallelism.

This application discloses a method, apparatus, and storage medium for predicting the development state of pipeline defects, relating to the field of pipeline prediction technology, and aims to solve the problems of strong data dependence, insufficient generalization, and insufficient reliability in current pipeline defect development state prediction schemes. The pipeline defect development state prediction method includes: acquiring multi-source prior knowledge and historical pipeline inspection data related to pipeline defect development; quantifying and characterizing the multi-source prior knowledge to obtain quantified multi-source prior knowledge; constructing a pipeline defect development state prediction model based on the quantified multi-source prior knowledge and historical pipeline inspection data; and determining the pipeline defect development state of the target pipeline through the pipeline defect development state prediction model.

The present application relates to the field of virtual reality simulation and human-computer interaction, and particularly relates to a fire extinguishing teaching system based on motion capture, comprising: a data acquisition module, configured to acquire real-time motion capture data stream and state data stream; a reference reconstruction module, configured to solve an ideal sweep trajectory covering the root of a virtual fire source as reference data; a fault simulation module, configured to generate a labeled theoretical deviation feature library and corresponding multiple sets of parallel simulation trajectories; a difference extraction module, configured to generate a real residual vector and a theoretical residual vector set; a topological coupling module, configured to map the real residual vector to the feature space of the theoretical residual vector set to calculate a topological similarity, and select the deviation type corresponding to the highest similarity as a user intention recognition result; and a feedback generation module, configured to generate a feedback instruction according to the user intention recognition result. The present application significantly reduces the initialization data dependency and dependence on real samples of the system.

The application discloses a software test problem positioning and repairing method and device. The method comprises the following steps: collecting log data in a software test process, taking a log event as a node, taking a causal relationship, a time sequence relationship and a module correlation relationship between events as edges, and constructing a test log correlation graph; adopting a graph neural network to update and classify node features of the test log correlation graph, adding an abnormal propagation weight factor in a node updating formula, positioning an abnormal source node in the test log correlation graph, and taking the abnormal source node as a log event corresponding to a problem root cause; based on the abnormal source node, combining code execution paths and data dependency relationships to verify the root cause, extracting a code segment corresponding to the abnormal source node through a program slicing technology, and tracing input data and an intermediate calculation process corresponding to the abnormal source node through data dependency analysis, and confirming the accuracy of problem root cause positioning.

Addition instructions with independent carry chains are disclosed. A plurality of addition instructions are provided that have no data dependencies between each other. A first addition instruction stores its carry output in a first flag of a flags register and does not modify a second flag in the flags register. A second addition instruction stores its carry output in the second flag of the flags register and does not modify the first flag in the flags register.

This application relates to a hierarchical storage method and system for intermediate data in optical detection image processing, comprising the following steps: in response to an image processing task, acquiring a processing flow; generating a data dependency topology graph based on the processing flow and identifying intermediate data and its data type; during the execution of the image processing task, real-time monitoring of the remaining capacity and access frequency of each layer in the hierarchical architecture; calculating the hierarchical priority score of the intermediate data based on the monitored remaining capacity and access frequency, combined with the data dependency topology graph; and mapping and storing the intermediate data to the corresponding target storage layer according to the hierarchical priority score. In summary, this application, by acquiring the processing flow in response to an image processing task, generating a data dependency topology graph and identifying data types, real-time monitoring of the hierarchical architecture status, calculating the hierarchical priority score, and mapping and storing the data to the target layer, can effectively solve the problems of invalid storage resource occupation and high access latency in the prior art.

The application provides a consistency test method and device, a storage medium, test equipment and program instructions, and relates to the field of chip testing. A plurality of operation units are allocated in the memory, and each operation unit is only allowed to be modified by a single core of a multi-core processor at the same time. On this basis, the numerical values in the operation units are iteratively updated according to the recursive relationship between the operation units, so that the multi-core processor loads the numerical values of different operation units into the corresponding cache lines during execution. After the iteration is completed, the actual numerical values in the operation units are compared with the theoretical numerical values calculated based on the general formula. In this way, since the recursive calculation relies on reading and writing across operation units, a data dependency relationship is formed between some cache lines, so that the test process is no longer limited to the inside of a single cache line, but covers the dependency relationship between a plurality of to-be-tested cache lines, effectively testing the data synchronization capability across cache lines in a multi-core environment.

This invention discloses a method and system for detecting smart contract vulnerabilities based on anti-pattern removal to eliminate false positives, relating to the field of blockchain smart contract code security detection. The method first uses static analysis tools to detect potential vulnerabilities and extracts contextual information such as call relationships, data dependencies, and related functions around the functions corresponding to the potential vulnerabilities. Then, it constructs corresponding anti-pattern descriptions in natural language for various types of vulnerabilities. The potential vulnerabilities, anti-pattern descriptions, and context are input into a large language model for constrained code pattern matching, outputting the code corresponding to the anti-pattern. Finally, the model output is verified through code text matching to eliminate false positives, obtaining the final vulnerability detection result. This invention can reduce false positives while reusing existing static analysis capabilities, improving the accuracy, reliability, and scalability of smart contract vulnerability detection.

This invention provides an instruction issuing method and apparatus based on asymmetric functional units and dynamic detection, relating to the field of processor technology. Specifically, the issuing unit obtains information such as the instruction type and source register number from the decoding unit, detects the data dependency between the issuing unit's instruction and all instructions in the pipeline, and generates a control signal to fetch source operands from a bypass based on the above information. Regardless of whether the source operands are ready, the issuing unit issues the instruction. If the source operands are not ready at the time of issuance, the dependency is dynamically detected at each stage of the subsequent pipeline based on the current instruction state, and the bypass control signal is updated in real time to ensure the correctness of the operands during instruction execution. Based on the asymmetric distribution of functional units in the pipeline, the issuing unit can schedule dependent instructions of the same type to be executed in different functional units within the same issuance cycle without causing pipeline stalls. The issuing method of this application decouples data dependency and instruction issuance to the greatest extent possible, allowing instructions to be issued in advance even if the dependency is not resolved, and decoupling the dependency in the pipeline, significantly improving instruction issuance efficiency and facilitating the optimization of the issuing unit's timing.