15 results about "Tiled rendering" patented technology

The embodiment of the invention discloses a rendering task rendering method and device, equipment and a medium. The rendering task rendering method comprises the steps that a specified rendering task is transferred to a Worker thread from a UI thread; dynamically configuring parameter information of a specified rendering task based on hardware characteristics of an environment where the Worker thread is located; setting a rendering mechanism of the specified rendering task based on the parameter information; and rendering the specified rendering task based on the rendering mechanism to obtain a rendering result of the specified rendering task. According to the method, the rendering task is stripped from the UI thread to the Worker thread, the blocking risk of the main thread is fundamentally eliminated, meanwhile, the rendering parameters are dynamically generated based on the real-time hardware characteristics of the Worker environment, the three major mechanisms of multi-stage buffering, tile rendering and layered rendering are coordinated and linked under unified configuration, a rendering strategy precisely matched with the hardware capability is formed, and the rendering efficiency is improved. Therefore, the cross-platform rendering robustness and the resource utilization efficiency of the high-end and low-end equipment are remarkably improved while smooth interaction experience is guaranteed.

The embodiment of the invention provides a block rendering control method, a controller, a device, a graphics processing unit and equipment, is applied to the technical field of computers, and aims to at least solve the problems of high hardware resource consumption, low GPU utilization rate and the like in a block rendering process. The control method comprises the following steps: dividing a block into at least one first sub-block; wherein the image blocks are obtained by dividing a to-be-rendered image, and the to-be-rendered image comprises at least two to-be-rendered layers; determining at least one second sub-block from the at least one first sub-block based on a first primitive list of the block; wherein the first primitive list of the block comprises at least one primitive in at least one layer to be rendered; and rendering the at least one second sub-image block by using the target rendering core corresponding to the image block.

The invention relates to the technical field of space-time big data processing, and discloses a Web-end-oriented space-time big data efficient rendering optimization method and system, a storage medium and electronic equipment, and the method carries out unified and intelligent management on the whole rendering process by introducing a central rendering task scheduler. Space-time big data fragments are split into fine-grained vector tile rendering tasks, a dynamic rendering priority score is calculated for each task, and the vector tile rendering tasks with high priorities are sequentially taken out from the head of a dynamic priority queue according to a current available rendering resource threshold value of a Web end. The method comprises the following steps: acquiring a plurality of rendering tasks, distributing the rendering tasks to a plurality of parallel execution rendering task execution units for real-time rendering processing, outputting a final spatio-temporal data visual image, and dynamically adjusting a task execution sequence and resource allocation in combination with real-time system monitoring, thereby preferentially ensuring that contents most concerned by a user are quickly rendered under limited Web end resources, and improving the user experience. And an efficient and smooth visual effect is realized.

Efficient handling of a restart index by a graphics processing unit (GPU) during tile-based delayed rendering (TBDR) is disclosed herein. In some aspects, a processor circuit of a GPU determines a position of a restart index of a plurality of indices of an index buffer associated with a primitive topology during a tile ordering pass, and determines a skip count based on the primitive topology and the position of the restart index, the skip count indicating a number of indices to skip during a tile rendering pass. In some aspects, the processor circuit also determines a visibility state of a primitive corresponding to the primitive topology, and generates visibility data including the visibility state and a skip count. Then, during the tile rendering pass, the processor circuit bypasses the acquisition of the restart index based on the skip count. According to some aspects, the processor circuitry may also assemble primitives based on visibility data.

The application relates to a tile processing method and device, computer equipment, a storage medium and a program product. The method comprises the following steps: in response to a background rendering instruction, acquiring background flags of each sub-block in each tile, the background flag being used to indicate whether the sub-block to which the background flag belongs is completely covered by at least one primitive; determining a target sub-block from each sub-block based on the background flags of the sub-blocks; wherein the target sub-block is a sub-block that is not completely covered by a primitive, and the target sub-block is used for background rendering. That is, in the method, the background flags of each sub-block in the tile are set, and the background flag can indicate whether the sub-block is completely covered by a primitive. The sub-blocks that need to be rendered in the background are screened out through the background flags, and the scanning operation can be directly skipped for the sub-blocks that do not need to be rendered in the background, thereby reducing the number of invalid scans, reducing the scanning time, improving the tile processing efficiency, and further reducing the tile rendering delay and improving the overall efficiency of the background rendering.

The invention provides a rendering method and system, a chip and equipment, and relates to the technical field of image rendering. The rendering system comprises a plurality of GPU cores and storage units respectively corresponding to the plurality of GPU cores, the rendering method comprises the following steps: a plurality of GPU cores respectively obtain a control configuration set from corresponding storage units; and the plurality of GPU cores asynchronously execute the tile rendering task based on the control configuration set. According to the scheme, the processing efficiency of the tile rendering task is improved.

In embodiments a graphics pipeline includes a logic that can assess whether to enable or disable tiled rendering for sets of graphics primitives. The logic applies one or more rules or heuristics to a set of graphics primitives associated with a frame, and determines whether to enable tiled rendering for that set of graphics primitives if the one or more rules or heuristics are satisfied. Otherwise, the logic determines to disable tiled rendering for that set of graphics primitives. As further graphics primitives are received for the frame, the logic may make additional decisions as to whether or not to render the further graphics primitives using tiled rendering.

A graphics processing system for performing tile-based rendering of a scene that includes safety-critical elements. A geometry engine identifies protected tiles that include safety-critical elements in a geometry processing phase. A fragment processing engine processes each of the protected tiles first and second times so as to respectively generate first and second fragment-processed outputs in a fragment processing phase. A check unit compares the first and second fragment-processed outputs for each of the protected tiles and raises a fault signal if the first and second fragment-processed outputs do not match.

A processing device and a method of tiled rendering of an image for display is provided. The processing device includes memory and a processor. The processor is configured to receive the image comprising one or more three dimensional (3D) objects, divide the image into tiles, execute coarse level tiling for the tiles of the image and execute fine level tiling for the tiles of the image. The processing device also includes same fixed function hardware used to execute the coarse level tiling and the fine level tiling. The processor is also configured to determine visibility information for a first one of the tiles. The visibility information is divided into draw call visibility information and triangle visibility information for each remaining tile of the image.

Embodiments of the present disclosure provide a control method, a controller and an apparatus of tile rendering, a graphics processor and a device, which are applied to the technical field of computer to at least solve the problems of high hardware resource consumption and low GPU utilization rate in the process of tile rendering. The control method comprises: dividing a tile into at least one first sub-tile; wherein the tile is obtained by dividing a to-be-rendered picture, and the to-be-rendered picture comprises at least two to-be-rendered layers; determining at least one second sub-tile from the at least one first sub-tile based on a first primitive list of the tile; wherein the first primitive list of the tile comprises at least one primitive in at least one to-be-rendered layer; and rendering the at least one second sub-tile by using a target rendering core corresponding to the tile.

A graphics processing system for performing tile-based rendering of a scene that includes safety-critical elements. The graphics processing system includes a geometry engine configured to, in a geometry processing phase, identify protected tiles that include safety-critical elements; a fragment processing engine configured to, in a fragment processing phase, process each of the protected tiles first and second times so as to, respectively, generate first and second fragment-processed outputs; and a check unit configured to, for each of the protected tiles, compare the first and second fragment-processed outputs and raise a fault signal if the first and second fragment-processed outputs do not match.

The invention relates to the technical field of vehicle-mounted display, and discloses a tile-based dynamic rendering method and device, a display system, a medium and a vehicle, and the method comprises the steps: obtaining a to-be-rendered scene of a current frame after a screen space is divided into a plurality of initial tiles, and calculating the complexity level of each initial tile according to the to-be-rendered scene; performing granularity dynamic adjustment on the initial tile according to the complexity level to obtain a corresponding current tile; and adding each current tile into the corresponding multi-level scheduling queue according to the complexity level, and rendering the current tile based on the priority of the scheduling queue. According to the method, the complexity of the tiles is dynamically analyzed, and the rendering tasks can be adaptively divided and scheduled based on the complexity, so that the GPU resource utilization rate and the tile rendering efficiency are improved, the display delay caused by accumulation of the rendering tasks is reduced, and the overall frame rate stability and the power consumption efficiency are improved.

The application provides an image tile rendering and video memory scheduling method and system and a readable storage medium thereof, and belongs to the technical field of computer graphics. In order to solve the problems of rendering delay and video memory overflow during super high resolution image browsing, the application collects the speed and acceleration of the viewport coordinate at a high frequency, dynamically calculates a prediction time window and outputs a predicted viewport bounding box; the intersection tile priority score is calculated and a preloading queue is generated; a background asynchronous thread decodes the image according to the queue and silently uploads the image to the video memory of the graphics processor, meanwhile, the reverse predictive de-weighting elimination is performed on the resident tile based on the motion direction; finally, the main rendering thread directly hits the ready texture in the video memory to complete the drawing. The application can be used for smooth browsing of super resolution images such as digital pathology.

The invention provides an image tile rendering and video memory scheduling method and system and a readable storage medium thereof, and belongs to the technical field of computer graphics. In order to solve the problems of rendering delay and video memory overflow during ultrahigh-resolution image browsing, viewport coordinate extraction speed and acceleration are collected at high frequency, a prediction time window is dynamically calculated, and a prediction viewport bounding box is output; calculating priority scores of the intersected tiles and generating a preloading queue; a background asynchronous thread decodes the image according to the queue and quietly uploads the image to a video memory of a graphics processor, and meanwhile, reverse predictive weight reduction elimination is performed on a resident tile based on the motion direction; finally, the main rendering thread directly hits the ready texture in the video memory to complete drawing. The method can be used for smooth browsing of super-resolution images such as digital pathology and the like.