9 results about "Fixed-function" patented technology

The invention requests to protect a multifunctional FFT (Fast Fourier Transform) hardware acceleration architecture capable of configuring software in real time, which comprises a first sample sequence rearrangement module, a first calculation unit, a second sample sequence rearrangement module, a second calculation unit, a third sample sequence rearrangement module, a butterfly operation circuit, a multiplexer and a dual-port RAM (Random Access Memory) which are sequentially connected end to end, in order to solve the technical problems that in an existing FFT hardware architecture, the operation length is fixed, the function is single, the fftshift function is lacked, and software dynamic configuration cannot be achieved, through software and hardware collaborative design, FFT hardware has operation flexibility, functional diversity and frequency spectrum processing capacity; the method can be widely applied to various digital signal processing scenes such as communication, images, radars and audios.

One embodiment provides a graphics processor comprising an instruction cache to store an instruction and a compute block configured to perform multiply-accumulate operations in response to execution of the instruction. The compute block includes a scheduler to schedule a plurality of threads for execution of the instruction and multiply-accumulate circuitry configured to execute the instruction via the plurality of threads, wherein the multiply-accumulate circuitry includes a plurality of functional units configured to process, in parallel via the plurality of threads, a corresponding plurality of matrix elements to multiply a first matrix and a second matrix, and to multiply the first matrix and the second matrix includes to multiply data elements in a row of the first matrix by corresponding data elements in a column of the second matrix to generate a plurality of products.

A mechanism for processing, on a hardware accelerator comprising fixed-function circuitry, data according to a neural network process that comprises a neural network with an associated argmax or argmin function. The argmax or argmin function is mapped to a set of elementary neural network operations available to the fixed-function circuitry. The neural network process is then executed using the fixed-function circuitry. The data processed using the neural network process comprises image and / or audio data.

Method of implementing, using a neural network accelerator comprising fixed-function hardware, a neural network comprising a plurality of layers, wherein at least one of the layers comprises a matrix

A processing device and a method of tiled rendering of an image for display is provided. The processing device includes memory and a processor. The processor is configured to receive the image comprising one or more three dimensional (3D) objects, divide the image into tiles, execute coarse level tiling for the tiles of the image and execute fine level tiling for the tiles of the image. The processing device also includes same fixed function hardware used to execute the coarse level tiling and the fine level tiling. The processor is also configured to determine visibility information for a first one of the tiles. The visibility information is divided into draw call visibility information and triangle visibility information for each remaining tile of the image.

A graphics processing system is configured to perform ray tracing. Rays are bundled together and processed together into a ray bundle using a programmable chip. Intersection testing is performed on the rays of the ray bundle in the scene using fixed function hardware. Results of the intersection testing are used to determine whether the rays are to be maintained in the ray bundle. Shader programs are executed on the rays in the ray bundle by determining differential data for a particular ray of the ray bundle using data for another ray of the ray bundle.

This invention discloses an intelligent interaction method and system based on programmable gestures and context awareness. An open, programmable interaction logic management layer is constructed on top of a low-level system with high-precision spatial pointing and multimodal gesture recognition capabilities. This method abstracts the gesture events and motion parameters output by the low-level system into standard programmable interaction elements; through a visual interface or script interface, users can combine custom interaction logic and map it to the control interface of the target software or device; the system determines the current interaction context based on real-time spatial pointing information and dynamically activates the corresponding custom logic; at runtime, it interprets the original interaction signals based on the activated logic, generating and distributing corresponding control commands. This invention transforms fixed-function dedicated interaction devices into freely definable, context-aware general-purpose platforms, improving system flexibility and applicability, and lowering the development and customization threshold.

Systems, apparatuses, and methods for implementing a hierarchical scheduling in fixed-function graphics pipeline are disclosed. In various implementations, a processor includes a pipeline comprising a plurality of fixed-function units and a scheduler. The scheduler is configured to schedule a first operation for execution by one or more fixed-function units of the pipeline by scheduling the first operation with a first unit of the pipeline, responsive to a first mode of operation and schedule a second operation for execution by a selected fixed-function unit of the pipeline by scheduling the second operation directly to the selected fixed-function unit, independent of a sequential arrangement of the one or more fixed-function units in the pipeline, responsive to a second mode of operation.

A graphics processing system is configured to perform ray tracing. Rays are bundled together and processed together into a ray bundle using a programmable chip. Intersection testing is performed on the rays of the ray bundle in the scene using fixed function hardware. Results of the intersection testing are used to determine whether the rays are to be maintained in the ray bundle. A plurality of instances of a shader program, each corresponding to a ray of the ray bundle, are executed, wherein the shader program utilizes data determined by the execution of an instance of the shader program corresponding to a first ray of the ray bundle in the execution of an instance of the shader program for a further ray of the ray bundle.