A GEMM (general matrix-matrix multiplication) high-performance realization method based on a domestic SW 26010 many-core CPU

A dense matrix, realization method technology, applied in program control design, instrument, electrical digital data processing and other directions, can solve the problem of low performance, open source BLAS math library Shenwei many-core processor 26010 optimized, can not give full play to many-core computing Ability and other issues to achieve the effect of improving function performance

Active Publication Date: 2017-09-15
INST OF SOFTWARE - CHINESE ACAD OF SCI +1
View PDF7 Cites 39 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The problem solved by the present invention is: based on the fact that the existing open source BLAS math library has not been specifically optimized for the Shenwei many-core processor 26010, cannot fully utilize the many-core computing capabilities, and has low performance, the present invention proposes a domestic Shenwei The high-performance implementation method of GEMM dense matrix multiplication on 26010 many-core CPU is based on platform features such as storage structure, memory access mode, hardware pipeline and register-level communication mechanism on Shenwei many-core processor 26010 single-core group. Format, vectorization, calculation and memory access overlapping, loop unrolling and software pipeline and other technologies, apply and improve the block matrix multiplication algorithm, and optimize function performance efficiently

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A GEMM (general matrix-matrix multiplication) high-performance realization method based on a domestic SW 26010 many-core CPU
  • A GEMM (general matrix-matrix multiplication) high-performance realization method based on a domestic SW 26010 many-core CPU
  • A GEMM (general matrix-matrix multiplication) high-performance realization method based on a domestic SW 26010 many-core CPU

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0036] The present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

[0037] Such as figure 1 As shown, the specific implementation adopts the three-level code framework of "interface interface layer-scheduling task scheduling layer-kernel assembly computing layer", which is described as follows:

[0038] (1) Interface interface layer function: This layer is a function interface, which checks the input parameters and returns an error code if an illegal parameter is judged; in addition, according to the accuracy and transposition of the input matrix A, B, call the corresponding scheduling Task scheduling layer function;

[0039] (2) Scheduling task scheduling layer function: It is called by the interface interface layer function, and calls the kernel assembly computing layer function. The updating order of the matrix C is controlled through the n-k-m three-layer loop, and the C sub-matrices are updated serially, with ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a GEMM (general matrix-matrix multiplication) high-performance realization method based on a domestic SW 26010 many-core CPU. For a domestic SW many-core processor 26010, based on the platform characteristics of storage structures, memory access, hardware assembly lines and register level communication mechanisms, a matrix partitioning and inter-core data mapping method is optimized and a top-down there-level partitioning parallel block matrix multiplication algorithm is designed; a slave core computing resource data sharing method is designed based on the register level communication mechanisms, and a computing and memory access overlap double buffering strategy is designed by using a master-slave core asynchronous DMA data transmission mechanism; for a single slave core, a loop unrolling strategy and a software assembly line arrangement method are designed; function optimization is achieved by using a highly-efficient register partitioning mode and an SIMD vectoring and multiplication and addition instruction. Compared with a single-core open-source BLAS math library GotoBLAS, the function performance of the high-performance GEMM has an average speed-up ratio of 227. 94 and a highest speed-up ratio of 296.93.

Description

technical field [0001] The present invention relates to a high-performance implementation method of the basic linear algebra library BLAS (Basic Linear Algebra Subprograms) level3 function dense matrix multiplication operation GEMM (General matrix-matrix multiplication), especially a high-performance GEMM implementation based on the domestic Shenwei many-core platform architecture and optimization methods. Background technique [0002] As the underlying and basic matrix operation, dense matrix multiplication is widely used in the fields of scientific and engineering computing, so its performance is extremely demanding. BLAS is a basic linear algebra subroutine library, which mainly includes the basic operations of vectors and matrices. It is one of the most basic and important mathematical libraries. At present, most software related to matrix operations will call the BLAS library, and the world's supercomputer TOP500 ranking The bottom layer of the benchmark software LINPA...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/302G06F9/38
CPCG06F9/3001G06F9/3012G06F9/3814G06F9/3869G06F9/3881G06F9/3887G06F9/3856
Inventor 杨超蒋丽娟尹万旺敖玉龙魏迪袁欣辉刘芳芳张鹏
Owner INST OF SOFTWARE - CHINESE ACAD OF SCI
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap