3785 results about "Euclidean vector" patented technology

A method for classifying or comparing objects includes detecting points of interest within two objects, computing feature descriptors at said points of interest, forming a multi-resolution histogram over feature descriptors for each object and computing a weighted intersection of multi-resolution histogram for each object. An alternative embodiment includes a method for matching objects by defining a plurality of bins for multi-resolution histograms having various levels and a plurality of cluster groups, each group having a center, for each point of interest, calculating a bin index, a bin count and a maximal distance to the bin center and providing a path vector indicative of the bins chosen at each level. Still another embodiment includes a method for matching objects comprising creating a set of feature vectors for each object of interest, mapping each set of feature vectors to a single high-dimensional vector to create an embedding vector and encoding each embedding vector with a binary hash string.

The invention discloses a bi-directional prediction method for video coding / decoding. When bi-directional prediction coding at the coding end, firstly the given forward candidate motion vector of the current image block is obtained for every image block of the current B-frame; the backward candidate motion vector is obtained through calculation, and the candidate bi-directional prediction reference block is obtained through bi-directional prediction method; the match is computed within the given searching scope and / or the given matching threshold; finally the optimal matching block is selected to determine the final forward motion vector, and the backward motion vector and the block residual. The present invention achieves the object of bi-directional prediction by coding a single motion vector, furthermore, it will not enhance the complexity of searching for a matching block at the coding end, and may save amount of coding the motion vector and represent the motion of the objects in video more actually. The present invention realizes a new prediction coding type by combining the forward prediction coding with the backward.

A higher code rate Low-Density Parity Check (LDPC) matrix may be designed by concatenating additional matrices to a π-rotation parity check matrix. The concatenated matrix may be selected such that the resultant LDPC matrix exhibits good expansion characteristics to enable the LDPC matrix to be used with variable block length codes. The codes may be designed by generating an ensemble of available codes, encoding them with information vectors of weight 1 and 2 and discarding codes with a low minimum distance. The approximate upper bounds for the remaining codes are then calculated and a small set of codes with the lowest bound under high signal to noise ratio is selected. The girth distributions for the remaining codes are then calculated and the code that has the minimum number of short cycles is selected. The selected code is concatenated to the original π-rotation parity check matrix.

A space vector pulse-width modulator (SVPWM) and a method implemented by the modulator. A precalculation module accepts Ua and Ub modulation indexes and in response thereto, outputs modified Ua and Ub information; a sector finder has a U module which receives the modified Ua information and outputs a U sector; and a Z module which receives the U sector and the modified Ub information and outputs a Z sector. The U sector and the Z sector are 2-phase control signals for implementing 2-phase modulation. For 3-phase modulation, the SVPWM and method further possess an active vectors calculation module and an assign vectors module which receive the modified Ua and Ub information and the U sector, and which calculate active vectors for 3-phase modulation; a zero vector selector which receives the Z sector and calculates zero vectors for 3-phase modulation; and a PWM counter block which receives the active vectors and zero vectors and outputs 3-phase control signals for implementing 3-phase modulation. The SVPWM and method may have a symmetrical PWM mode, an asymmetrical PWM mode, or both. Advantageously there may also be a rescale and overmodulation module which receives duration information corresponding to the vectors and in response thereto, detects the occurrence of overmodulation. Overmodulation may be detected in response to a negative zero vector time. The module may respond to overmodulation by clamping the zero vector time to zero and rescaling the active vector times to fit within the PWM cycle. The rescaling may restrict a voltage vector to stay within hexagonal boundaries on the space vector plane, while preserving voltage phase.