48 results about "Block size" patented technology

Several methods are described to jointly use the ABT (Asymmetric Binary Tree) partitioning mode and Matrix-based Intra Prediction (MIP). In a first embodiment, we propose to forbid the use of the MIP intra prediction mode, for block sizes that are resulted from ABT partitioning. In a second embodiment, we propose to allow the MIP intra prediction for block sizes not equal to a power of two in width or height, by extending the block before MIP and crop the predicted block to the original size after MIP. In a third embodiment, we propose to adapt the down-sampling of the boundary reference samples and the up-sampling of the reduced predicted blocks, to the block sizes introduced by ABT partitioning. In a further embodiment, we set the reduced predicted block to size 8×8 in any case the initial block size is 8 and larger than 8 in a direction.

An encoding method and apparatus thereof and a decoding method and apparatus thereof are provided. A method for decoding an image includes the steps of determining a prediction quantization parameter of a current quantization group determined according to at least one of block partition information and block size information, determining a differential quantization parameter of the current quantization group, determining a quantization parameter of the current quantization group based on the prediction quantization parameter and the differential quantization parameter of the current quantization group, and dequantizing a current block included in the current quantization group according to the quantization parameter of the current quantization group.

An apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, according to a code rate of 5 / 6 and a code block size of 7776 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code, the first binary parity check matrix corresponding to a first exponent matrix. The one or more processors may be configured to encode data using the first binary parity check matrix. The transmitter may be configured to transmit the encoded data.

A storage array controller may receive a write request comprising data to be stored at one or more solid-state storage devices. A write granularity associated with the write request may be generated that is less than a logical block size associated with the storage array controller. The data associated with the write request may be segmented based on the generated write granularity. The write request may be executed to store the segmented data at the one or more solid-state storage devices.

The invention discloses a terminal information security protection system and method, and relates to the technical field of information security. The encryption round number is dynamically determined through terminal hardware state data and to-be-protected data attributes, and self-adaptive matching of encryption strength and terminal resources is achieved; generating an initial key and a secret parameter according to the key material, and driving key expansion and encryption structure configuration through the secret parameter to obtain a key matched with the size of the data block; and performing multi-round encryption on the data by adopting a preset encryption strategy, and adding the meta-information to a ciphertext header for verification and decryption. The dynamic nature and the unpredictability of the secret key and the encryption structure are enhanced while light weight is guaranteed, the resistance to differential analysis, linear analysis and side channel attacks is effectively improved, and the reliability and the practicability of terminal information security protection are improved.

An apparatus (105) includes a transmitter (120) and one or more processors (2010). The one or more processors (2010) is configured to identify, according to a code rate of 1 / 2 and a code block size of 7776 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check, QC-LDPC, code, the first binary parity check matrix corresponding to a first exponent matrix. The one or more processors (2010) encode data using the first binary parity check matrix. The transmitter (120) transmits the encoded data.

The invention discloses a coding and decoding method, a code stream, a coder, a decoder and a storage medium. The method comprises the following steps: indicating whether a to-be-coded and decoded unit performs attribute prediction by using an inter-frame nearest neighbor search algorithm based on a spatial relationship through first syntax element identification information; in use, further determining the block size corresponding to the current LOD layer in the to-be-decoded unit; according to the block size corresponding to the current LOD layer, determining a reference block corresponding to the current point in the reference frame and a neighborhood block having spatial correlation with the reference block, performing inter-frame nearest neighbor search, and determining N neighbor points of the current point; and performing attribute prediction on the current point according to the N neighbor points to determine an attribute reconstruction value. Therefore, inter-frame nearest neighbor searching is carried out on the attributes of the point cloud based on the spatial correlation of the attributes of the point cloud, attribute prediction is carried out by using the searched N neighbor points, the correlation of the attributes of the point cloud between adjacent frames can be further removed, and the encoding and decoding efficiency of the attributes of the point cloud is improved.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 1 / 2, a second parity check matrix corresponding to a first exponent matrix comprising 1152 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 2 / 3, a second parity check matrix corresponding to a first exponent matrix comprising 768 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

In some implementations, an apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, according to a code rate of 1 / 2 and a code block size of 3888 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code. The first binary parity check matrix may correspond to a first exponent matrix having 288 values. The one or more processors may be configured to encode data using the first binary parity check matrix. The one or more processors may be configured to transmit the encoded data.

This application provides a method for determining a transport block size and a communication apparatus, which may be used in systems such as vehicle-to-everything, V2X, and V2V A receive-end terminal device and a transmit-end terminal device may determine a quantity of encoded symbols based on a symbol length used for sidelink communication in a time unit and an scaling factor, and may further determine a transport block size of a data channel based on the quantity of encoded symbols. Therefore, for all slots used for sidelink communication, a same quantity of encoded symbols can be determined, and a same transport block size can be further determined. In this way, initial transmission or retransmission of a transport block can be performed in each slot used for sidelink communication, to avoid a limitation on selection of a transmission resource and a resulting transmission delay.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 2 / 3, a second parity check matrix corresponding to a first exponent matrix comprising 768 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

An apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, based at least on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate R of 3 / 4, a second parity check matrix for a second QC-LDPC code, wherein the second QC-LDPC code has a code block size that is four times a code block size of the first QC-LDPC code. The one or more processors may be configured to encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data. In some implementations, the code block size of the second QC-LDPC code may be 7776 bits.

A context for a current block is determined. The current block has a block size and is partitioned into sub-blocks. The block size is mapped to a context group using a block size map. A probability model is selected from a probability table based on the context and the context group. A syntax element related to partitioning of the current block is entropy coded using the probability model. The context may be determined based on a left neighboring block and an above neighboring block of the current block. Determining the context may include calculating a context value based on whether the left neighboring block has a same size as the current block and whether the above neighboring block has a same size as the current block, and combining the context value with a context group identifier using a predefined offset value.

The invention relates to a system and a method for a quasi-cyclic low density parity check (QC-LDPC) code with a 1 / 2 code rate. An apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify a second parity check matrix of a second QC-LDPC code based at least on a first parity check matrix of a first QC-LDPC code according to a code rate R of 1 / 2, wherein the second QC-LDPC code has a code block size that is four times a code block size of the first QC-LDPC code. The one or more processors may be configured to encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data. In some embodiments, the code block size of the second QC-LDPC code may be 7776 bits.

Techniques are disclosed for security management techniques in a communication network environment. For example, a method includes generating a random number based on a cryptographic value, computing based on the random number, a data block size, and transmitting data, associated with an access control layer (e.g., MAC layer) of a communication network and consistent with the data block size, between user equipment and an access node associated with the communication network.

A system and method for encoding data using a plurality of encoding libraries with pre-coding and complexity estimation. Portions of the data are encoded by different encoding libraries, depending on which library provides the greatest compaction for a given portion of the data. This methodology not only provides substantial improvements in data compaction over use of a single data compaction algorithm with the highest average compaction, but provides substantial additional security in that multiple decoding libraries must be used to decode the data. In some embodiments, each portion of data may further be encoded using different data block sizes, providing further security enhancements as decoding requires multiple decoding libraries and knowledge of the data block size used for each portion of the data. In some embodiments, encoding libraries may be randomly or pseudo-randomly rotated to provide additional security.

An apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, based at least on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate R of 5 / 6, a second parity check matrix for a second QC-LDPC code, wherein the second QC-LDPC code has a code block size that is four times a code block size of the first QC-LDPC code. The one or more processors may be configured to encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data. In some implementations, the code block size of the second QC-LDPC code may be 7776 bits.

An apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, according to a code rate of 1 / 2 and a code block size of 7776 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code, the first binary parity check matrix corresponding to a first exponent matrix. The one or more processors may be configured to encode data using the first binary parity check matrix. The transmitter may be configured to transmit the encoded data.

An encoder (100) for encoding a signal into a data stream according to an embodiment is provided. The encoder (100) is configured to encode a plurality of blocks of the signal into the data stream, wherein each of the plurality of blocks comprises a plurality of samples and exhibits a block length depending on a number of the plurality of samples within the block. The encoder (100) is configured to encode a current block of the plurality of blocks of the signal into the data stream using an offset value for the current block. Moreover, the encoder (100) is configured to encode the current block depending on the offset value for the current block, wherein the offset value for the current block depends on the block length of one of the plurality of blocks.

The storage resource scheduling method and device, electronic equipment and storage medium provided by the application pre-allocate a logical space smaller than the maximum value (i.e. block size BlockSize) of the logical space that can be occupied by a single data block in the storage system for the data block when creating the data block, while allowing the actual physical space used by the data block to exceed the size value of the pre-allocated logical space (the upper limit is BlockSize) when writing and storing data, and in the case of exceeding, temporarily and dynamically additionally allocating the corresponding logical space of the data corresponding to the exceeding part to the data block to meet the logical space requirement of the exceeding part of the data. In this way, the logical space size occupied by the data block in the system is closer to the actual physical space size occupied, which can effectively improve the situation of idle physical space but insufficient logical space in the traditional technology, and improve the physical storage resource utilization of the system.

In some implementations, an apparatus may include a transmitter and one or more processors. The one or more processors may be configured to identify, according to a code rate of 1 / 2 and a code block size of 3888 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code. The first binary parity check matrix may correspond to a first exponent matrix having 288 values. The one or more processors may be configured to encode data using the first binary parity check matrix. The one or more processors may be configured to transmit the encoded data.

Methods, systems, and devices for wireless communications are described. A user equipment (UE) may receive a resource allocation for communication of a physical downlink shared channel (PDSCH) and may determine a quantity of code blocks associated with a transport block size of the PDSCH. In some implementations, the UE may adjust the quantity of code blocks to a second quantity of code blocks based on a quantity of time and frequency resources, a quantity of spatial layers, or both. In some implementations, the UE may adjust the quantity of code blocks to a second quantity of code blocks of a first size, to a third quantity of code blocks of a second size, or both based on a quantity of time and frequency resources, the quantity of code blocks, or both. The UE may communicate the second quantity of code blocks, the third quantity of code blocks, or both.

The present application relates to a kind of adaptive block data pulverization method and system based on hua lin number theory, method includes: according to the amount of data to be destroyed automatically selects block size, generates block strategy;Data is segmented into data block;Solve hua lin number theory power sum representation for each data block, utilize its multiple solution and randomly select one representation as fragment;Optionally, fragment independence enhancement and mutual information monitoring are carried out;Finally, number theory fingerprint is generated and is stored in chain and is proved.This application first makes the mutual information between fragments ≤0.01 bit As quantitative index, the destruction time controllable is realized by adaptive block, the multiple solution of hua lin number theory is used to ensure that data is mathematically irreversible and resistant to quantum attack, and it is suitable for high-security destruction scene of various storage media.

This invention discloses an AES file obfuscation and encryption method, apparatus, system, storage medium, and computer program product based on dynamic slice reconstruction, belonging to the field of computer data security and file encryption technology. To address the problems of high memory consumption in existing whole-file encryption, insufficient obfuscation in sequential block encryption structures, incomplete file header recovery parameters, and weak enterprise authorization and decryption control capabilities, this invention obtains the file size, encryption level, and server key material of the file to be encrypted. It adaptively determines the block size based on the file size, generates a slice reconstruction seed based on the AES key, salt value, and file size, and uses this seed to construct a deterministic out-of-order block arrangement sequence. During encryption, a file header containing the key version, salt value, block size, number of blocks, original file size, slice reconstruction seed, and header checksum is generated. Each plaintext block is encrypted and authenticated using an independent initialization vector using AES-GCM, and then written to the ciphertext file in out-of-order order. During decryption, after server authorization is passed, the block arrangement sequence is reconstructed, and each block is authenticated, decrypted, and written back to its original logical offset position. This invention can improve the obfuscation capability of the physical structure of encrypted files while ensuring file recovery, reduce the memory footprint of large file encryption, and support key version management, authorized decryption, and automatic encryption based on enterprise policies.

The invention provides a BKZ reduction method and device based on an adaptive Grover algorithm and a medium, and relates to the technical field of quantum computing. The method comprises the following steps: firstly, obtaining a lattice base to be reduced and a preset block size, determining a projection sub-lattice of the lattice base, and converting an SVP problem on the projection sub-lattice into a QUBO problem by adopting a binary variable coding method; then, constructing a quantum circuit containing a quantum dictionary and Grover search, and carrying out evolution on a quantum system; performing physical measurement on the evolved quantum register, and adaptively updating a search threshold value or adjusting a search parameter according to a measurement result until the shortest vector of the current projection sub-lattice is obtained; and finally, updating the lattice basis by using the shortest vector of the projection sub-lattice obtained by solving to generate a BKZ reduced basis. Compared with a classical violent enumeration method, square acceleration is realized by utilizing the parallel advantage of quantum calculation, and lattice base reduction efficiency is improved.

An apparatus for generating a frozen set associated with a polar code of length ‘N’ and dimension ‘K’ comprises a processing unit configured to take in input the polar code length ‘N’, the dimension ‘K’, and a profile of a structure of a block lower triangular affine (BLTA) group. The BLTA group structure is associated with an affine transformation matrix of size ‘n×n’ and the profile is an ordered set of a plurality of values corresponding to block sizes of blocks. The blocks are sub-matrices of the affine transformation matrix with all the diagonals of blocks in the same order as the ordered block sizes, forming the diagonal of the affine transformation matrix, each of the block sizes is such that ‘n’ is equal to the sum of block sizes and ‘n’ is equal to log2(N). The processing unit generates the frozen set.

The invention relates to a multi-channel parallel ZSTD data compression method and system based on an FPGA. The method comprises the steps that input data to be compressed are segmented according to a set block size; taking a character in the parallel processing window as a first character, taking a plurality of continuous characters after the first character is extracted as character strings, then moving the parallel processing window by a distance of one window length, and continuing to extract the character strings; the hash value of each character string is calculated in parallel, and the character strings are stored according to the hash values; matching the character string extracted from the current parallel processing window with a stored character string, determining a longest matching sequence in the character string extracted from the current parallel processing window, and trimming a matched and overlapped part in the longest matching sequence; the longest matching sequence is converted into triple data, FSE coding is carried out on the triple data, and Huffman coding is carried out on unmatched characters in character strings extracted by the parallel processing window; and integrating and packaging results of the FSE coding and the Huffman coding according to a ZSTD data format, and outputting final coded data.

Transmitter or receiver configured to identify, based at least on a first parity check matrix of a first quasi-cyclic-low-density parity-check, QC-LDPC, code according to a code rate R of 1 / 2, a second parity check matrix for a second QC-LDPC code, wherein the second QC-LDPC code has a code block size that is four times a code block size of the first QC-LDPC code. Encode or decode code data using the second parity check matrix. The code block size of the second QC-LDPC code may be 7776 bits.

Methods, systems, and devices for wireless communications are described. A user equipment (UE) may receive a resource allocation for communication of a physical downlink shared channel (PDSCH) and may determine a quantity of code blocks associated with a transport block size of the PDSCH. In some implementations, the UE may adjust the quantity of code blocks to a second quantity of code blocks based on a quantity of time and frequency resources, a quantity of spatial layers, or both. In some implementations, the UE may adjust the quantity of code blocks to a second quantity of code blocks of a first size, to a third quantity of code blocks of a second size, or both based on a quantity of time and frequency resources, the quantity of code blocks, or both. The UE may communicate the second quantity of code blocks, the third quantity of code blocks, or both.