124 results about "Zero matrix" patented technology

A method of generating a codebook for a multiple-input multiple-output (MIMO) system is provided. The codebook generation method includes: assigning a single-polarized preceding matrix to diagonal blocks among a plurality of blocks arranged in a block diagonal format in which a number of diagonal blocks corresponds to a number of polarization directions of transmitting antennas; and assigning a zero matrix to remaining blocks excluding the diagonal blocks.

A communication apparatus and method include: selecting, as a precoding matrix, one of pre-stored at least one matrix Wi, where i is a natural number, and precoding a data stream desired to be transmitted based on the precoding matrix, wherein each diagonal block, among a plurality of blocks included in each of the at least one matrix Wi, includes a nonzero matrix, the nonzero matrix excluding a zero matrix, and wherein each remaining block among the plurality of blocks, excluding the diagonal blocks, includes the zero matrix

A low density parity check (LDPC) code generating method and apparatus are provided. A parity check matrix with (N−K) rows for check nodes and N columns for variable nodes are formed to encode an information sequence of length K to a codeword of length N. The parity check matrix is divided into an information part matrix with K columns and a parity part matrix with (N−k) columns. The parity part is divided into P×P subblocks. P is a divisor of (N−K). First and second diagonals are defined in the parity part matrix and the second diagonal is a shift of the first diagonal by f subblocks. Shifted identity matrices are placed on the first and second diagonals and zero matrices are filled elsewhere. An odd number of delta matrices each having only one element of 1 are placed in one subblock column of the parity part matrix. The parity check matrix is stored.

A regular quasi-cyclic matrix is prepared, a conditional expression for assuring a predetermined minimum loop in a parity check matrix is derived, and a mask matrix for converting a specific cyclic permutation matrix into a zero-matrix based on the conditional expression and a predetermined weight distribution is generated. The specific cyclic permutation matrix is converted into the zero-matrix to generate an irregular masking quasi-cyclic matrix. An irregular parity check matrix in which the masking quasi-cyclic matrix and a matrix in which the cyclic permutation matrices are arranged in a staircase manner are arranged in a predetermined location.

A low density parity check (LDPC) code generating method and apparatus are provided. A parity check matrix with (N−K) rows for check nodes and N columns for variable nodes are formed to encode an information sequence of length K to a codeword of length N. The parity check matrix is divided into an information part matrix with K columns and a parity part matrix with (N−k) columns. The parity part is divided into P×P subblocks. P is a divisor of (N−K). First and second diagonals are defined in the parity part matrix and the second diagonal is a shift of the first diagonal by f subblocks. Shifted identity matrices are placed on the first and second diagonals and zero matrices are filled elsewhere. An odd number of delta matrices each having only one element of 1 are placed in one subblock column of the parity part matrix. The parity check matrix is stored.

The invention belongs to the construction technology field of LDPC code (low-density parity-check code) check matrix, and in particular relates to a construction method and encoding method for check matrix of LDPC code. The construction method for check matrix of LDPC code comprises the steps as follows: building the base matrix HB of the LDPC code check matrix, aiming at the base matrix HB, detecting and eliminating the four ring to obtain the base matrix after removing the four ring; in the base matrix after removing the four ring, using z*z whole zero matrix for replacing the 0 element, z expresses the set extension factor; F expresses the number of the non-zero element in the base matrix after removing the four ring, HB(f) expresses the f(th) non-zero element in the base matrix after removing the four ring, obtaining the matrix Iz(HB(f)) of the unit matrix with size of z*z for ring shift right of HB(f), in the base matrix after removing the four ring, replacing the f(th) non-zero element HB(f) by the matrix Iz(HB(f)); obtaining LDPC code check matrix, the LDPC code check matrix is the new matrix after replacing each element for the base matrix after removing the four ring.

A regular quasi-cyclic matrix is generated with cyclic permutation matrices and specific regularity given to the cyclic permutation matrices. A mask matrix for making the regular quasi-cyclic matrix into an irregular quasi-cyclic matrix is generated. An irregular masked quasi-cyclic matrix is generated by converting a specific cyclic permutation matrix in the regular quasi-cyclic matrix into a zero-matrix using a mask matrix supporting a specific encoding rate. An irregular parity check matrix with an LDGM structure is generated with a masked quasi-cyclic matrix and a matrix in which the cyclic permutation matrices are arranged in a staircase manner.

The invention provides an encoding method of an LDPC (Low Density Parity Check) code. The encoding method comprises the following steps of: adjusting elements of a modular matrix Hbm by using an expanding factor zf to generate an adjusted modular matrix Hbmf; expanding by using the modular matrix Hbmf to generate a check matrix H, wherein the expanding mode is as follows: sub-matrixes Pi and j in the check matrix H expand according to the value of the modular matrix Hbmf, and each of the sub-matrixes Pi and j is a full zero matrix, a unit matrix or a unit matrix for left and right cyclic shifting according to a line direction; and encoding input information U by using the check matrix H and outputting encoding information V. The invention also provides an encoder of the LDPC code. According to the technical scheme proposed by the invention, through increasing the quantity of zero elements of the modular matrix Hbm, the processing complexity and the implementation complexity of the encoding and the decoding of the LDPC code can be reduced, and the processing speed of the encoding and the coding can be improved.

The invention relates to a tail-biting staircase code coding method. The tail-biting staircase code coding method comprises the following steps: 1) selecting an (n, k) linear block code as a component code, wherein n represents a code length, n belongs to (500, 5000), and k represents an information length before coding; and 2) grounding received information according to a mode in staircase codes, constructing a matrix B<1>, B<2>, B<3>, ..., B<n>, adding a full-zero matrix participating the coding to a lower part of B<1>, coding the residual matrix using the component code then, generating a check bit matrix while the coding, completing end-to-end connection of codes of a final matrix and a first matrix in a group then, finally replacing the full-zero matrix complemented in the B<1> with the check bit matrix, and completing the coding. The coding method is advantageous in that, through adoption of the novel coding scheme, the novel tail-biting staircase codes have a characteristic of the block code, coding processes between groups are mutually independent, information of each matrix in the groups is still contained in the two component codes, and error correction performance is guaranteed.

The invention discloses a channel estimation method for an orthogonal frequency division multiplexing (OFDM) system under an interference environment. A column singular matrix is multiplied by a corresponding orthogonal projection matrix to obtain a zero matrix so that the vector obtained in the step (5) is equivalent to T=QIp, wherein the element Ip (k) in the vector Ip is a result of dividing an interference signal and noise by a local pilot signal. Because the orthogonal projection matrix is a linear matrix, the statistical property of each element T (k) of the vector T is the same as thatof the element Ip (k), the variance estimation value obtained in the step (5) is the sum of the interference signal variance and the noise variance, and optimal estimation of channel time domain impulse response is obtained by using the step (7). The method has low calculation complexity, and the estimated performance of the method is approximate to the ideal channel estimated performance in the absence of interference signals; and meanwhile, aiming at block pilot patterns and uniformly-spaced comb pilot patterns, the method is insensitive to the power of the interference signal, only needs one OFDM symbol, and has good instantaneity.

A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[Hd|Hp], Hd is the data portion, and Hp is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing.

The invention discloses a maximizing and speed rate pre-coding method for a simultaneous wireless information and power transfer system. The maximizing and speed rate pre-coding method for the simultaneous wireless information and power transfer system includes that acquiring all the channel state information through a base station, and building an optimizing model aimed to optimize information users and speed rate. The operation for the iterative optimization of pre-coding matrix includes steps that (1) initializing, to be specific, converting a target function into a convex function through first approximation, wherein at the moment, the information user maximization and speed rate problem is a convex problem under the constraints of sending power and energy user receiving power; setting a sending signal covariance matrix as a zero matrix to solve the problem; (2) iterating, to be specific, substituting the sending signal covariance matrix obtained through solving the optimization problem into the target function, and continuing to solve till realizing information user and speed rate convergence. The theory proves that the maximizing and speed rate pre-coding method for the simultaneous wireless information and power transfer system is globally optimal in performance, compared with an existing method, the maximizing and speed rate pre-coding method for the simultaneous wireless information and power transfer system converts the problem into the convex problem through gradual convex approximation to solve. By means of the pre-coding method, the information user and speed rate of the simultaneous wireless information and power transfer system can be effectively improved.

The invention relates to a method for acquiring a colorful digital holographic image. The method is technically characterized in that a black and white type area array CCD and multiple recording wavelength lens-free fourier transform hologram recording optical path are used for respectively shooting a single-color digital hologram of an object to be recorded under the irradiation of red, green and blue laser; after the zeroing treatment of the acquired single-color digital holograms is carried out to acquire the corresponding zeroed digital holograms, the median filtering pretreatment is respectively carried out to acquire the corresponding median filtering pretreatment holograms, then the inverse fast fourier transform operation is carried out, and the acquired red, green and blue single-color digital holograms are respectively inputted into a three-layer zero matrix to acquire a colorful digital holographic image of the object to be recorded. According to the method, the position of a reproduced image on a value reconstruction image plane is fixed by the distance between the recorded object on an object plane and a reference point light source during the recording and is not changed with the recording distance. In addition, the method has less constraint on the horizontal size of the object to be recorded and has a larger space-bandwidth product.

The invention relates to a counting method based on pedestrian head and shoulder multi-target detecting and tracking. The method comprises the steps that a positive sample data set and a negative sample data set of a pedestrian head and shoulder image are constructed, HOG feature vectors of the data sets are extracted, moving foregrounds are extracted through a Gaussian mixture model, the minimum envelope rectangle of the foregrounds is taken as a detection region, pedestrian head and shoulder targets are detected through a multi-scale slide window and a trained SVM classifier, a target matching matrix is initialized into a zero matrix, a pedestrian counter is initialized, the number of the target people passing through the area is counted, and for a target in a tracking list TraList, if the center position of the target is located out of a tracking area, the target is deleted, and the pedestrian counter is updated. According to the method, the pedestrian volume in the specific area is counted through a computer vision technology, the method is used for pedestrian counting, the problems that traditional pedestrian counting is low in efficiency and accurate rate are solved, the digital and intelligent level of pedestrian counting is increased, and the method is a multi-win project capable of bringing the economic benefit and social security and is suitable for multiple indoor and outdoor scenes.

According to a quasi-cyclic low density parity check code basis matrix construction method, node distribution acquired through optimization of a density evolution algorithm is used, then a stretch factor Z is set, the circle length of the LDPC code check matrix and external message scale of the circle are jointed optimized, finally, a QC-LDPC code basis matrix with excellent performances is generated through extension. Each element in the basis matrix is corresponding to one Z*Z dimensional all-zero matrix, a unit matrix or a cyclic shift matrix of the unit matrix. But in construction of high code rate QC-LDPC code, the contradiction of limitation of matrix row number and maximum line number usually occurs, namely, the maximum line number is greater than the row number. To solve the problem, the invention provides construction of the basis matrix through a method increasing line number through superposition of a plurality of cyclic shift matrixes, namely, multiple cyclic shift matrixes are embedded in a single block matrix. The "superposition" operation is binary addition, the constructed basis matrix not only guarantees the cycle performance of the QC-LDPC code, but also meets the requirement of optimization of codon performance through increase of minimum code distance.

A method of encoding / decoding using an LDPC code is disclosed, by which performance is enhanced and by which complexity is reduced. In encoding / decoding using an LDPC code defined by an (n−k)xn parity check matrix H, the present invention includes the step of performing the encoding / decoding input source data using the parity check matrix H including Hp and Hd to Meet H=[Hd|Hp] (where Hd has (n−k)×k dimensions, Hp has (n−k)×(n−k) dimensions), wherein if the Hp comprises a plurality of zXz sub-matrices, each of the sub-matrices is an identity matrix or a zero matrix and wherein a column weight of each column of the Hp is at least 2.

A regular qc matrix is generated in which cyclic permutation matrices with specific regularity are arranged in row and column directions. A mask matrix supporting multiple encoding rates is generated for making the regular qc matrix into irregular. A specific cyclic permutation matrix in the regular qc matrix is converted into a zero-matrix using a mask matrix corresponding to a specific encoding rate to generate an irregular masking qc matrix. An irregular parity check matrix with a LDGM structure is generated, in which the masking qc matrix and a matrix in which the cyclic permutation matrices are arranged in a staircase manner are arranged in a predetermined location.

The invention relates to a block encoder and an encoding method of a polarization code, and belongs to the technical field of encoding devices. According to the block encoder and the encoding method of the polarization code, the problems of high algorithm complexity and relatively low processing speed existing in the prior art are solved. The block encoder comprises an input encoding module, a generator matrix module and a multiplier module; and each module is provided with multiple exclusive-OR gates and multiple time delay units. The encoding method comprises the steps of grouping to-be-encoded input information sequences; constructing a generator matrix of the polarization codes; and generating an encoding result. The principle of the block encoder and the encoding method of the polarization code is that a matrix GN is compressed, a position containing F<Kronecker product k> is replaced by 1, a K*K zero matrix is replaced by zero, the compressed matrix is the generator matrix F< Kronecker product (n-k)> of the encoder; K information bits are input to the information sequences per each clock; and a result of corresponding encoding operation for a matrix GK is output after the result is subjected to selection and exclusive-OR operation. According to the block encoder and encoding method of the polarization code, K-bit data can be input at each clock, and N-bit data can be output after 1+N / K clocks, so that encoding delay is reduced, and the encoding efficiency is improved.

The invention discloses an LDPC code constructing method based on coding cooperative communication; the method comprises the following steps: 1. choose a basis matrix W (1) based on finite field multiplicative inverse; the multiplicative inverse of a certain element in the basis matrix is multiplied with each row of the basis matrix, so as to generate a multiplicative identity in the basis matrix; 3.the basis matrix is expanded, so as to obtain an expansion matrix containing diagonal line; 4. the submatrix above the diagonal line is substituted by zero matrix, so as to obtain a quasi-cyclic matrix which is provided with a lower triangular type and has a nested structure; the invention can flexibly construct the quasi-cyclic matrix with the nested structure, which is suitable for CC proposal, while reducing the code construction complexity, the complexity of a coder of a trunk node and a destination node is reduced; in addition, the code in the invention does not have short link characteristic, and the performance of the code is promoted obviously compared with the traditional decode and forward, DF proposal.

The invention discloses a novel structured irregular repeat accumulator (S-IRA)-type LDPC codeword, a corresponding coder, a decoder and a coding method. The codeword has a structure of H=[H'1piP'], H'1 is an information bit matrix, P' is a parity check bit matrix, piP' is to carry out row transformation on the parity check bit matrix, the information bit matrix H'1 comprises multiple cyclic sub matrixes pi,j, and each cyclic sub matrix can only be a unit cyclic shift matrix or an all-zero matrix. By adopting the technical scheme of the invention, through extensive simulation, a LDPC codeword information bit matrix structure more applicable to HSS decoding algorithm compared with the prior art is found out, a coder and a decoder using the LDPC code are found out, and the parity check bit matrix is further matched and improved, and performance of the LDPC code is enhanced. The invention also discloses a coding method corresponding to the above S-IRA structure, and a coder.

The invention discloses a method for optimizing image lattice quality and a device thereof. The method comprises the steps as follows: a halftone amplitude modulation screening threshold value matrix T is obtained, and node quantity CT in the halftone amplitude modulation screening threshold value matrix T is confirmed; CT / 2 data items are taken out from T sequentially; after CT / 2 data items are taken out each time, the following steps are implemented: T / 2 data items are put into a corresponding position for inputting a threshold value matrix H according to a position coordinates in T of T / 2 data items; maximum MH in H is counted; a value at the corresponding position of a zero matrix which has same size as T is set as 1 to obtain a human visual filter matrix G; filtering operation is carried out on the G to obtain a temporary matrix G'; the threshold value matrix H and element value at the corresponding position in the human visual filter matrix G are updated and output according the position coordinates of a minimum value of all elements at the position corresponding to T / 2 data items in G'; and the value of MH is updated, until T / 2 data items in the threshold value matrix H are processed and output. The invention carries out human eye filter treatment on the image lattice and obtains good image output effect.

The method comprises: in the first, constructing a composite matrix H with a three diagonal line structure; then using the a zero matrix N and a i-1 time shift matrix I (i-1) to replace the elements in the composite matrix H to get (0, 1) matrix H' which is used as the check matrix of low density code; the constructed low density code namely is the quasi-cyclic low density code of the three diagonal line structures. The invention has excellent error-correcting performance and low encoding complexity.

A method of encoding / decoding using an LDPC code is disclosed, by which performance is enhanced and by which complexity is reduced. In encoding / decoding using an LDPC code defined by an (n−k)xn parity check matrix H, the present invention includes the step of performing the encoding / decoding input source data using the parity check matrix H including Hp and Hd to meet H=[Hd|Hp] (where Hd has (n−k)×k dimensions, Hp has (n−k)×(n−k) dimensions), wherein if the Hp comprises a plurality of zXz sub-matrices, each of the sub-matrices is an identity matrix or a zero matrix and wherein a column weight of each column of the Hp is at least 2.

A regular quasi-cyclic matrix is prepared, a conditional expression for assuring a predetermined minimum loop in a parity check matrix is derived, and a mask matrix for converting a specific cyclic permutation matrix into a zero-matrix based on the conditional expression and a predetermined weight distribution is generated. The specific cyclic permutation matrix is converted into the zero-matrix to generate an irregular masking quasi-cyclic matrix. An irregular parity check matrix in which the masking quasi-cyclic matrix and a matrix in which the cyclic permutation matrices are arranged in a staircase manner are arranged in a predetermined location.

A method for encoding data, the method comprising: creating m parity bits from k data bits based on a parity-check matrix (40), the parity-check matrix (40) including a data portion (41) and a parity portion (42), the parity portion (42) includes sub-block matrices, each sub-block matrix being any one from the group consisting of: zero matrix, identity matrix and permutation matrix; and forming acodeword containing the k data bits and the created m parity bits; wherein an upper diagonal is defined in the parity portion (42) starting from the first sub-block matrix in the second column extending to the second last sub-block matrix in the last column, and each sub-block matrix on the upper diagonal is an identity matrix or a permutation matrix, and the sub-block matrices (44) above the upper diagonal are zero matrices; each column from the second column to the third last column of the parity portion (42) contains one or more identity matrices or permutation matrices below the upper diagonal (45).

A regular quasi-cyclic matrix is generated in which specific regularity is given to cyclic permutation matrices. A mask matrix capable of supporting a plurality of encoding rates is generated. A specific cyclic permutation matrix in the regular quasi-cyclic matrix is converted into a zero-matrix using a mask matrix corresponding to a specific encoding rate to generate an irregular masking quasi-cyclic matrix. An irregular parity check matrix with an LDGM structure is generated in which the masking quasi-cyclic matrix and a matrix in which the cyclic permutation matrices are arranged in a staircase manner are arranged in a predetermined location.

A coding device includes: an inspection matrix generating module that generates a block inspection matrix; and a coding module that generates and outputs a code word from an input message by the inspection matrix. The inspection matrix generating module includes: a degree-allocation unit that prescribes function values of the block inspection matrix by the coefficients of a self-reciprocal polynomial expression; a weight distribution determination unit that prescribes the number of components that are non-zero matrices among the components of each block of the block inspection matrix using a mask pattern; a first degree-altering unit that considers the sum of the components of the k_r-th row block of the block inspection matrix as a cyclic permutation matrix; and a second degree-altering unit that prescribes the row-block number of components that are non-zero matrices among the components of each row block excluding said k_r-th row block of the clock inspection matrix.

The invention relates to a construction method for a special structure protograph QC-LDPC code based on a Pascal's triangle, and belongs to the technical field of channel coding research. The method utilizes the Pascal's triangle to construct a matrix, and specifically comprises the following steps of constructing a weight matrix of the protograph, namely a base matrix Hbase; performing anticlockwise rotation by using the Pascal's triangle structure to acquire an S matrix; filling elements in the S matrix into the weight matrix Hbase of the protograph according to a rule to acquire a base matrix H of the protograph; extending the protograph base matrix H via a zero matrix and a unit matrix to acquire a check matrix, and providing a fast iterative coding algorithm of the codon according tothe structure of H. The base matrix has a quasi bidiagonal structure, avoids four rings and can achieve fast coding, is reduced in coding complexity, and has better iterative decoding performance without significant error floors.

The invention relates to a method for achieving security data transmission by utilizing a compressive sensing theory. Currently, the compressive sensing theory has not been applied to guaranteeing security of data transmission between a source end and a destination end in a data communication process. The source end is encrypted by a random projection matrix and a random vector, and the destination end is decrypted by the sub-matrix of the left zero matrix of the random projection matrix to re-construct data to be transmitted. Mutual information attribute in an information theory is used to prove that the data transmission method disclosed by the invention has perfect security, i.e., the method is safe to a ciphertext-only attack. The method is not only applicable to a point-to-point communication, but also applicable to multipoint-to-point communication and multipoint-to-multipoint communication. Especially when computing power of the data source end and the destination end is asymmetric (in such application fields as internet of things, wireless sensor network and the like), the method has greater advantages.

The invention provides an encoding method of an LDPC (Low Density Parity Check) code. The method comprises the following steps of: adjusting elements of a modular matrix Hbm by using an expanding factor zf to generate an adjusted modular matrix Hbmf; expanding by using the modular matrix Hbmf to generate a check matrix H, wherein the expanding mode is as follows: sub-matrixes Pi and j in the check matrix H expand according to the value of the modular matrix Hbmf, and each of the sub-matrixes Pi and j is a full zero matrix, a unit matrix or a unit matrix for right cyclic shifting according to a line direction; and encoding input information U by using the check matrix H and outputting encoding information V. The invention also provides an encoder of the LDPC code. According to the technical scheme proposed by the invention, through increasing the quantity of zero elements of the modular matrix Hbm, the processing complexity and the implementation complexity of encoding and decoding of the LDPC code can be reduced, and the processing speed of the encoding and the coding can be improved.