Quick LU factorization method for circuit sparse matrix in circuit simulation

A technology of sparse matrix and circuit simulation, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the time-consuming problems of circuit matrix LU decomposition, and achieve the effect of reducing the time of LU decomposition and reducing the time

Active Publication Date: 2011-08-03
TSINGHUA UNIV
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Problems solved by technology

The decomposition of the circuit matrix LU in these operations is particularly time-consuming, and improving the speed of LU decomposition plays a decisive role in accelerating the entire circuit simulation.

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  • Quick LU factorization method for circuit sparse matrix in circuit simulation
  • Quick LU factorization method for circuit sparse matrix in circuit simulation
  • Quick LU factorization method for circuit sparse matrix in circuit simulation

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Embodiment Construction

[0030] Although many scholars have considered the characteristics of the circuit matrix when writing LU decomposition software, they have made corresponding improvements on the basis of the left-looking algorithm (for example, KLU has abandoned Supernode in SuperLU and used Block Triangular Form , BTF) method), but no scholars have combined the characteristics of the circuit simulation process to separate the symbolic analysis and numerical decomposition in the LU decomposition to reduce the number of executions of the same symbolic analysis, thereby reducing the LU in the entire circuit simulation process. Break down the complexity and reduce the processing time.

[0031] The LU decomposition method for reducing the overall complexity of circuit simulation proposed by the present invention is described as follows in conjunction with the accompanying drawings, and its implementation steps are as follows:

[0032] Step 1: Perform symbolic analysis on the matrix after preprocess...

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Abstract

The invention relates to a quick LU factorization method for a circuit sparse matrix in circuit simulation, and belongs to the technical field of electronic design automation (EDA). The method comprises the following steps of: symbolic analysis and the calculation of LU factorization, wherein in the step of the symbolic analysis, a preprocessed matrix is analyzed to forecast each row of a non-zero structure of matrixes L and U formed after the matrix is subjected to the LU factorization; and in the step of the calculation of the LU factorization, based on the non-zero structures, obtained by the symbolic analysis, of the matrixes L and U, each row of the matrix is subjected to numerical solving and numerical distribution to obtain the matrixes L and U after the LU factorization. The method is characterized in that the symbolic analysis is separated from the circulation of the LU factorization, and the symbolic analysis is executed beyond the circulation of Newton-Raphson iteration in the process of the circuit simulation, namely is executed once, so the complexity of the circuit simulation can be reduced effectively, and the speed of the LU factorization can be improved to accelerate the integral circuit simulation.

Description

technical field [0001] The invention relates to a fast LU decomposition method for circuit sparse matrix in circuit simulation, belonging to the electronic design automation (EDA) technical field. Background technique [0002] In the traditional circuit design process, in order to verify the integrity of the connection and function of the integrated circuit, and to predict the behavior of the circuit, experiments are usually performed on breadboards and printed circuit boards to verify the design results; but for integrated circuit verification and Unlike traditional circuits, before the production of finished integrated circuits, it is impossible to use experimental methods to verify their performance. In order to improve the yield rate of integrated circuits in formal production and reduce the cost of integrated circuit design, it is necessary to use computer-aided integrated circuit design (CAD) tools to check their circuit characteristics to ensure the performance of the...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 汪玉武伟陈晓明杨华中
Owner TSINGHUA UNIV
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