2 results about "General purpose computing" patented technology

A computing device including a plurality of sensors, a system-on-module, a safety microcontroller and a plurality of communication interfaces communicatively coupling the system-on-module, the safety microcontroller and the plurality of sensors together. The system-on module can include an integrated interconnection of a plurality of different types of cores and one or more different types of memory. The system-on module can be configured to control operation and or performance of a system. The safety microcontroller can be configured to provide safety supervision of the system-on-module.

This disclosure provides a general-purpose computing unit and an instruction scheduling method for the general-purpose computing unit. The general-purpose computing unit includes: multiple execution units, each execution unit executing arithmetic instructions in units of thread bundles; and an instruction scheduler for determining the priority of multiple arithmetic instructions based on whether they have a reuse tag, and scheduling each arithmetic instruction to one of the multiple execution units based on the priority; wherein each execution unit includes: one or more reuse registers, each reuse register storing an operand and a tag of a previous arithmetic instruction, the tag indicating the address of the operand and the thread bundle; and an instruction decoding unit for decoding the received arithmetic instruction to determine the read location of the operand of the arithmetic instruction. By attaching a reuse tag to the entire arithmetic instruction to prioritize the scheduling of the instruction, the operand hit rate is improved, and excessive instruction bit fields are not required.