The invention discloses a high speed large capacity data collection system which is based on CPLD and SDRAM. Analog signals are inputted into the signal input port of suited input network circuit(1), the signal output port of the (1) is connected to the signal input port of magnifying and buffering circuit (2), the signal output port of the (2) is connected to the analog signal input port of analog /digital transforming circuit (3), the data output port of the (3) is connected to the data input port of CPLD control unit circuit (4), the time signal input port of the (3) is connected to the time signal output port of the (4), the data output port of the (4) is connected to the data input port of the data input port of interface circuit(5), the data output port (4) is connected to the data input and output ports of (6). The highest sampling frequency is 100MHz, storing capacity is 256MBit, and it has several excellences such as big buffer capacity, expansible, high integrity, high reliability, high antijamming capability and so on, it can be used in high speed testing and controlling system, and image collecting and dealing system.