57 results about "Cache page" patented technology

Key-value (KV) cache paging schemes can improve memory management for KV caches by storing a KV cache page having key tensors and value tensors for a fixed number of tokens in a fixed-sized block in the KV cache of a worker. To further improve memory management, the schemes can be modified to implement dynamic variable quantization. Quantization level of a KV cache page can be set based on a runtime importance score of the KV cache page. In addition, the quantization level of the KV cache page can be set based on the system load. The end result is a scheme that can achieve a high compression ratio of KV cache pages in the KV cache. Fitting more KV cache pages in the KV cache can lead to higher inference throughput, higher system-level user capacity, and higher end-to-end service availability.

The invention discloses a large language model low-delay reasoning method based on dynamic reasoning graph optimization, and provides a low-delay reasoning method based on dynamic reasoning graph optimization. Constructing a template inference graph which can be rewritten and replayed, and establishing a template library according to input shape vectors; during reasoning, a template is matched with a distance threshold value, and only the attention / feedforward sub-graph is locally recaptured when the distance threshold value exceeds the threshold value; executing a forward execution graph, injecting a key value cache page pointer, numerical value precision and an adapter identifier, and performing playback; dividing the pre-filling and decoding sub-graphs to implement graph-level scheduling; switching the key operator when the key operator operates between a standard / fast kernel and different precisions; page-level backspacing of speculative branches is achieved through a shadow page table and reference counting, and batch and template selection is adjusted in a self-adaptive mode based on online indexes; compared with the prior art, the method has the advantages that the recapture and start overhead is reduced, tail delay and jitter are inhibited, and the hardware utilization rate and the service stability are improved.

The invention provides a data write-back method and device, equipment and a medium. The data write-back method and device are used for quickly and efficiently performing data write-back. In the method, an identifier of a cache page where data is written, a bitmap identifier and a writing timestamp are recorded in data information of a cache region, and the bitmap identifier is generated according to whether the data is written into each sub-storage position of the cache page after the data is written into the cache page; for any data information in the cache region, judging whether other data information of which the identifier and the bitmap identifier of the cache page are the same as those of the cache page and the bitmap identifier of the data information exists in the cache region or not; if yes, determining the data information reserved in the cache region according to the write-in timestamp of the data information and the write-in timestamps of other data information; the corresponding data is written back into the storage device based on the data information reserved in the cache region, so that invalid data can be prevented from entering a write-back process, and the write-back efficiency is quickly improved.

The invention discloses a memory management unit, a processor and a page table caching method, and belongs to the technical field of computers. The memory management unit comprises a cache management module, a conversion backup buffer TLB module and a page table traversal PTW module; the TLB module is configured to cache a page table item; the PTW module is configured to query the page table according to the first virtual address under the condition that the TLB module is queried through the first virtual address and the TLB module is not hit; the cache management module is configured to merge 2n page table entries including a target page table entry to obtain a merged page table entry if the target page table entry corresponding to the first virtual address in the page table is valid and the page size indicated by the target page table entry is smaller than or equal to a merging threshold value; and caching the merged page table entry into a TLB module. The memory management unit provided by the invention can merge the effective page table entries corresponding to the pages smaller than or equal to the merge threshold, so that the utilization rate and hit rate of the TLB module are improved.

Improved techniques are directed to managing a cache in an electronic environment in which a first processing core is configured to utilize a first set of queues to reclaim the pages of the cache and a second processing core is configured to utilize a second set of queues to reclaim the pages of the cache. The techniques include adding, to a queue in the first set of queues, an entry identifying access information of a page of the cache. The techniques further include accessing the page by a second processing core. The techniques further include, while the entry is in the first set of queues, updating the access information by the second processing core to indicate accessing the page by the second processing core.

The embodiment of the invention provides a data reading method and a data writing method.The data reading method comprises the steps that a current caching strategy is obtained in response to a data reading request sent by an application program; under the condition of determining that the current caching strategy is the first caching strategy, distributing a target caching page which is not added into a page management chain table, and forwarding the data reading request to a user space file system service process; obtaining and analyzing reply data returned from the user space file system service process to obtain the to-be-read data; and writing the to-be-read data into the target cache page and copying the to-be-read data to the user space, and releasing the target cache page. By starting the first cache strategy, the to-be-read data is directly written into the target cache page and released after completion, and the phenomenon of application program blocking caused by direct memory recovery is remarkably reduced.

The invention relates to the technical field of Internet of Things cards, in particular to an Internet of Things card and a method for processing a read / write command and submitting cache data of a multi-page cache system in the Internet of Things card, and the method comprises the following steps: carrying out hash operation on a physical page address to be accessed by a write command to obtain a serial number of a table item of an address hash table; according to the serial number of the table item of the address hash table, the content of the table item of the address hash table is obtained from the address hash table, the content of the table item of the address hash table comprises the physical address of the cache page and the serial number of the table item of the cache mapping table, and whether the physical address of the cache page is consistent with the address of the physical page accessed by the write command or not is compared; if yes, cache mapping table item content is obtained from the cache mapping table according to the serial number of the cache mapping table item, the cache mapping table item content comprises a mapping physical address, a mapping state and cache data, the cache data is updated through data to be written in by the write command, and the mapping state is updated. According to the invention, the operation efficiency of the MCU system can be improved, so that the use experience of a user is improved.

The invention discloses a database distributed memory management method and device, equipment and a storage medium, and relates to the field of databases, and the method comprises the following steps: in a target database, constructing a distributed memory pooling framework by taking a database instance as a node, and under the distributed memory pooling framework, creating a mapping table by utilizing a memory mapping technology; accessing the shared cache page based on the mapping table among the nodes, and dynamically adjusting the distribution of the private cache page through a preset adaptive load monitoring algorithm and a preset load weight determination formula; and when a data write-in request of the node is obtained, controlling the request flow based on a token bucket algorithm, and executing a write operation on to-be-modified data located in the shared cache page in the node by using a timestamp-based optimistic lock mechanism. Therefore, the management efficiency of the distributed memory in the database can be improved.

The invention provides a high-performance page presentation acceleration method suitable for a data visualization interface, and relates to the technical field of data visualization, comprising: caching page data according to a preset condition, the page data comprising page chart data and associated query conditions and configuration conditions; when the user accesses the page for the first time, if effective cache data exists, directly returning the cached page data to shorten the loading time; the method comprises the following steps: monitoring a user operation state at a client, and when a system is in an idle state, performing background preloading on an unopened page; if the effective server cache data exists in the preloaded page, preferentially obtaining the data from the cache; user operation is monitored in real time in the preloading process, if it is detected that a user initiates a page switching or query request, preloading is paused to respond to the user operation preferentially, and preloading is recovered after the user operation is completed.

The invention discloses a BFS-like algorithm-oriented graph processing system caching method, a controller and a system, and belongs to the technical field of graph processing system performance optimizing.The method comprises the steps that based on the relation between cache page access popularity and the number of unaccessed vertexes in a BFS-like algorithm, more accurate popularity level-to-level management is carried out on cache pages; when the cache is fully loaded, pages with low access potential are effectively eliminated, so that the cache hit rate is increased; fragmented effective edge data are extracted from a cache page and are independently stored in a cache of fine-grained management; the scheduling sequence of the vertexes in the task queue is adjusted by obtaining the proportion of the edge lists of the vertexes in the BFS-like algorithm task queue residing in the cache and combining the attributes such as the out-degree of the vertexes, and the data residing in the cache is utilized to the maximum extent. According to the method, the cache hit rate of the graph processing system when the graph processing system processes the BFS-like algorithm task can be effectively improved, so that the access performance of the graph processing system is improved.

The invention discloses a data distribution statistical method, a storage device and data distribution detection equipment. The method comprises the steps that a controller determines target data in a storage unit based on a data distribution acquisition request in response to the received data distribution acquisition request; the controller obtains cache data corresponding to the target data in the storage cache according to the target data, wherein the cache data comprises at least two pages of cache page data; the controller performs logical operation on the at least two cache page data to obtain a logical operation result, the logical operation comprises AND operation, or the logical operation comprises XOR operation and AND operation; the controller obtains at least three target numbers based on the cache page data and the result that the data is one in the logical operation result; and the controller sends the at least three target numbers to an external controller, so that the external controller generates a data distribution result of the corresponding storage unit in a linear equation solution form based on the target numbers. In this way, the calculation occupation of the data distribution task on the external CPU is reduced.

Techniques providing data path strategies for improving storage performance at DR sites. The techniques include receiving, in an asynchronous replication process, a large replication data transfer including data changes of a production volume since the last synchronization to a replica volume, partitioning the replication data into multiple small write requests, tagging each small write request as a write request to the replica volume, and performing early evicting, from cache memory, all cache pages used to cache host data specified in the small write requests; deep compression of contiguous host data specified in the small write requests; stream separation on the small write requests, each small write request being tagged as corresponding to a specific production site; and / or flushing host data having the same retention period to a specific region of physical storage space for the replica volume, each small write request being tagged with hint information indicating the retention period.

The embodiment of the invention relates to a method, equipment and a computer program product for writing data into a disk array in a storage system. The storage system includes a disk array. A method includes, in response to receiving a write request to write new data to a data block in at least one disk array group in a degraded mode of a disk array, reading old data stored in the data block and old check information stored in a check block associated with the data block. The method further includes determining new check information associated with the new data based on the old data, the old check information, and the new data. The method further includes writing the new data and the new check information into at least one cache page provided by a cache component in the storage system, the at least one cache page being allocated in a persistent memory in the cache component. In addition, the method further comprises the step of flushing new data and new verification information into the data blocks and the verification blocks in the at least one disk array group respectively.

The invention discloses a file caching performance improvement method and system based on distributed storage, and the method comprises the steps: firstly obtaining first file caching information of a to-be-cached file in a local caching node, the information comprises at least one of IO mode information generated through an improved virtual file system read-write function, cache page IO type marks and memory state information collected through a memory monitoring thread; inputting the first file cache information into a pre-trained first cache strategy model to obtain a file cache feature vector; the feature vector is sent to a remote storage node, the remote node inputs the feature vector and second file cache information of the to-be-cached file into a pre-trained second cache strategy model together, and a final cache instruction is obtained; and the local node executes cache strategy adjustment according to the instruction. According to the method, global collaborative intelligent optimization of the cache strategy is realized, and the cache hit rate and the system response performance are remarkably improved.

The present invention discloses a method and device for data management optimization, which includes: initializing the acceleration card storage, host cache page information, the host page cache and the acceleration card page management information according to the page attribute data structure, the capacity of the acceleration card storage and the capacity of the host page cache; receiving and sending an operation instruction to the accelerator, the accelerator processing the data page according to the type of the operation instruction and the page attribute data structure, marking the data page as a dirty page, forming dirty page data, and returning the processing result to the host; and simultaneously returning dirty page modification information corresponding to the operation instruction, caching the dirty page data in the host page cache, and directly reading the dirty page data from the host page cache when the dirty page data is written back, thereby reducing the communication overhead of data interaction and improving the data processing performance and reliability of the database system.

Improved techniques are directed to managing a cache in an electronic environment in which a first processing core is configured to utilize a first set of queues to reclaim the pages of the cache and a second processing core is configured to utilize a second set of queues to reclaim the pages of the cache. The techniques include adding, to a queue in the first set of queues, an entry identifying access information of a page of the cache. The techniques further include accessing the page by a second processing core. The techniques further include, while the entry is in the first set of queues, updating the access information by the second processing core to indicate accessing the page by the second processing core.

The present invention discloses a method and system for improving the ejection speed of a USB flash drive under a Linux system. The method for improving the ejection speed of a USB flash drive under a Linux system includes counting the amount of written data and the usage rate of the USB flash drive per unit time, and predicting the maximum write speed of the USB flash drive according to the statistical data, and then determining a threshold value according to the predicted maximum write speed of the USB flash drive and the expected ejection time of the USB flash drive, and finally using the threshold value to limit the number of cache pages to be written back to the USB flash drive, and using it in a controllable state, thereby improving the ejection speed of the USB flash drive. The present invention aims to solve the problems of long ejection time of the USB flash drive and poor user experience that may exist under the current Linux file cache management strategy.

The application provides a memory management method and device, which can be used for fine management of process access conditions and traffic occupancy conditions of various cgroups in a physical host, a virtual machine or a container. The method comprises the following steps: recording all cgroups that read and write target data in a target cache page and the number of times that the cgroups read or write the target data in the target cache page through a first record table corresponding to the target cache page, so as to improve the accuracy of traffic statistical results of the cgroups. At this time, flow limiting is performed on the first cgroup based on the updated first record table, so that the flow limiting of the first cgroup is more fair and accurate.

The invention relates to a management method for efficiently realizing cache based on an LRU flash memory database, which comprises the following steps of: (1) classifying LRU linked lists according to dry and dirty attributes and cold and hot attributes of cache pages, and classifying the corresponding cache pages into the corresponding LRU linked lists according to access times and whether modification is performed or not; and (2) judging whether the page to be accessed currently is in the cache or not, and executing cache processing of the corresponding attribute linked list according to a judgment result. The invention also relates to a corresponding device, a processor and a computer readable storage medium. By the adoption of the management method and device for efficiently achieving cache based on the LRU flash memory database, the processor and the computer readable storage medium, a four-linked-table management mode is designed, a high cache access hit rate can be obtained while write operation is not increased, and the cache access efficiency is improved. The invention provides an efficient cache management method for a flash database, which is applicable to most scenes.

The application discloses a large language model low-delay inference method based on dynamic inference graph optimization, and proposes a low-delay inference method based on dynamic inference graph optimization; a rewritable and replayable template inference graph is constructed, and a template library is established according to an input shape vector; during inference, a template is matched according to a distance threshold value, and only attention / forward subgraphs are locally recaptured when the threshold value is exceeded; a forward execution graph injects a key-value cache page pointer, a numerical precision and an adapter identifier, and is replayed; pre-populated and decoded subgraphs are divided to implement a graph-level scheduling; a key operator is switched between a standard / quick kernel and different precisions during operation; a page-level rollback of a speculative branch is realized through a shadow page table and a reference count, and a batch and a template selection are adaptively adjusted based on online indicators; compared with existing schemes, the application reduces recapture and startup overhead, suppresses tail delay and jitter, and improves hardware utilization and service stability.

A data query method based on a cloud search service, a medium, a device and a program product relate to the technical field of computers, and store data of all pages included in a file maintained by fragmentation through cache pages of a local cache file. The method comprises the steps of determining first offset information and a first file identifier of a target page targeted by a query request through file metadata, reading data corresponding to the target page from a local cache file based on the first offset information and the first file identifier, the file metadata comprises the first offset information corresponding to the cache page used for pointing to the page included in the local cache file and used for storing the file, and each cache page is equivalent to a slice in the local cache file, so that Hash calculation can be avoided during data reading, and the data reading performance is improved.

Embodiments of the present application provide a page loading method, device, apparatus and storage medium. In the embodiments of the present application, new configuration attribute information is added for a single-page application. For a scenario of returning to a first page from a second page, according to configuration attribute information of the first page, a holding attribute of the first page and a target cache page of the first page can be obtained. In a case where the holding attribute of the first page is persistent holding and the target cache page of the first page is the second page, according to an identifier of the first page, historical state information of the first page is obtained from cached historical state information, and the first page is loaded according to the historical state information of the first page, so that selective saving and loading of the historical state information of the first page are implemented, which helps to improve flexibility of loading of the first page.

The application relates to a data backflushing method and device, computer equipment, a storage medium and a program product. The method comprises the following steps: determining a root volume in the to-be-backflushed snapshot volume according to a snapshot relationship between the to-be-backflushed snapshot volumes; and backfeeding cache pages corresponding to each snapshot volume in the to-be-backflushed snapshot volume according to the cache pages filled by the root volume and the snapshot relationship. The method can improve the data backflushing efficiency.

The application discloses a kind of storage and calling method and system of knowledge representation data structure, comprising: equivalence relation record table is constructed in computer external storage medium, single record in the record table includes first expression field and second expression field, and two fields are not distinguished in physical byte arrangement main key and foreign key;First expression and second expression with semantic equivalence mapping relationship are written into first expression field and second expression field respectively;Global unique expression hash index is constructed to single record in record table, and hash index table is established.In the application, processor can be realized when undertaking bidirectional mixed load, positive and negative direction query share same memory cache page, so as to effectively avoid page replacement concussion, and can realize the fast addressing of point-to-point equivalence relationship, and make cache hit rate greatly improve.

The invention relates to the technical field of algorithm module scheduling, and discloses an algorithm module scheduling method, which comprises the following steps of: firstly, acquiring a page size, a total page budget, a draft acceptance rate, a draft module service rate and a verification module service rate of a key value cache; calculating the expected length of the accepted prefix according to the draft acceptance rate, and determining the target draft drawing depth of the accepted prefix aligned with the integral multiple of the page size; calculating single-request peak page occupation according to the target draft depth, and obtaining the maximum concurrent micro-batch capacity in combination with the total page budget; further determining a beat period based on the service rates of the draft module and the verification module; and finally, mapping the requests to a fixed time coordinate and slot position according to an arrival sequence, and outputting a scheduling result containing the target draft depth and the mapping relationship. According to the method, the high utilization rate of the cache page can be realized under the condition that the page resources are fixed, the periodic fluctuation of the concurrent capacity is eliminated, and the overall execution efficiency and stability of a multi-module algorithm system are remarkably improved.

This invention discloses a non-contiguous variable-length Flash caching method, electronic device, and storage medium. The method includes: obtaining a read request for the physical address content of the Flash memory; traversing a cache segment linked list to obtain the content to be written; when a cache commit is required, traversing the cache segment linked list and dynamically allocating a segment of RAM as a cache page; and writing data according to the cache segment linked list and the cache page. This invention uses a linked list structure to cache only "useful" data, enabling Flash cache read / write operations with less RAM. Especially when the content to be updated is distributed across different Flash pages, the cache savings are even greater without reducing performance. The available RAM for other parts of the system can remain unchanged or increase, thus maintaining more system runtime and enhancing system compatibility.

This application relates to the field of memory access technology, and discloses a method, apparatus, electronic device, and storage medium for processing address access signals. The method for processing address access signals includes: configuring and generating a page height cache region in volatile memory; configuring at least one mapping register according to the page height cache region, such that the mapping register corresponds one-to-one with the page height cache pages; when it is determined that the address access signal is an access to non-volatile memory, traversing all configured mapping registers and determining whether the first page number of one of them is the same as the page number accessed by the address access signal; if not, keeping the page number accessed by the address access signal unchanged; if it is, remapping the page number accessed by the address access signal to the second page number stored in the matched mapping register. The address access signal processing method according to the embodiments of this application can optimize time overhead when processing address access signals.

Techniques are disclosed relating to managing page pools for sets of processing work. In some embodiments, page manager circuitry maintains, in memory circuitry, page pool descriptor information that indicates memory pages allocated to multiple different page pools. It may cache page pool descriptor information from the memory circuitry in a page pool descriptor cache, where the page pool descriptor cache includes multiple entries and a given entry is configured to store the following information for a cached page pool descriptor: a location of a corresponding page pool and page pool size information. The page manager circuitry may provide pages to requesting client circuitry from the page pool based on the cached page pool descriptor information.

Techniques for improving the performance of storing data to memory addresses implemented in a memory capacity of a memory subsystem. A connection from the memory subsystem to a host system supports both a protocol for cache-coherent memory accesses to memory devices implemented in the memory capacity and a protocol for memory accesses. The memory subsystem may use a cache memory to cache a page of the memory device for access through the connection. A memory access queue may be configured to provide a command configured to store data at a memory address in the memory device. Such commands may be input into the queue when the cache memory is temporarily unavailable or cause the memory subsystem to swap cache pages from the cache memory to the storage capacity.

The present application provides a paging cache method and related devices, which relate to the field of software technology, and configure the same cache paging size for multiple interface types under a target data list. Receive a query request for a target data list, the query request contains a query paging size and a query page number corresponding to the target interface type; calculate the cache page number based on the query paging size, the query page number, and the cache paging size; obtain the cache data list corresponding to the cache page number, and determine the first data subscript range corresponding to the cache data list; calculate the second data subscript range using the query paging size and the query page number, obtain the paging data list of the target interface type from the cache data list according to the intersection of the first data subscript range and the second data subscript range, and output the paging data list. The present application can realize that various interfaces share a cache, convert interface requests into cache internal operations, and save storage space to the greatest extent.