36 results about "Cache page" patented technology

The invention discloses a large language model low-delay reasoning method based on dynamic reasoning graph optimization, and provides a low-delay reasoning method based on dynamic reasoning graph optimization. Constructing a template inference graph which can be rewritten and replayed, and establishing a template library according to input shape vectors; during reasoning, a template is matched with a distance threshold value, and only the attention / feedforward sub-graph is locally recaptured when the distance threshold value exceeds the threshold value; executing a forward execution graph, injecting a key value cache page pointer, numerical value precision and an adapter identifier, and performing playback; dividing the pre-filling and decoding sub-graphs to implement graph-level scheduling; switching the key operator when the key operator operates between a standard / fast kernel and different precisions; page-level backspacing of speculative branches is achieved through a shadow page table and reference counting, and batch and template selection is adjusted in a self-adaptive mode based on online indexes; compared with the prior art, the method has the advantages that the recapture and start overhead is reduced, tail delay and jitter are inhibited, and the hardware utilization rate and the service stability are improved.

The embodiment of the invention provides a data reading method and a data writing method.The data reading method comprises the steps that a current caching strategy is obtained in response to a data reading request sent by an application program; under the condition of determining that the current caching strategy is the first caching strategy, distributing a target caching page which is not added into a page management chain table, and forwarding the data reading request to a user space file system service process; obtaining and analyzing reply data returned from the user space file system service process to obtain the to-be-read data; and writing the to-be-read data into the target cache page and copying the to-be-read data to the user space, and releasing the target cache page. By starting the first cache strategy, the to-be-read data is directly written into the target cache page and released after completion, and the phenomenon of application program blocking caused by direct memory recovery is remarkably reduced.

The invention relates to the technical field of Internet of Things cards, in particular to an Internet of Things card and a method for processing a read / write command and submitting cache data of a multi-page cache system in the Internet of Things card, and the method comprises the following steps: carrying out hash operation on a physical page address to be accessed by a write command to obtain a serial number of a table item of an address hash table; according to the serial number of the table item of the address hash table, the content of the table item of the address hash table is obtained from the address hash table, the content of the table item of the address hash table comprises the physical address of the cache page and the serial number of the table item of the cache mapping table, and whether the physical address of the cache page is consistent with the address of the physical page accessed by the write command or not is compared; if yes, cache mapping table item content is obtained from the cache mapping table according to the serial number of the cache mapping table item, the cache mapping table item content comprises a mapping physical address, a mapping state and cache data, the cache data is updated through data to be written in by the write command, and the mapping state is updated. According to the invention, the operation efficiency of the MCU system can be improved, so that the use experience of a user is improved.

The invention discloses a BFS-like algorithm-oriented graph processing system caching method, a controller and a system, and belongs to the technical field of graph processing system performance optimizing.The method comprises the steps that based on the relation between cache page access popularity and the number of unaccessed vertexes in a BFS-like algorithm, more accurate popularity level-to-level management is carried out on cache pages; when the cache is fully loaded, pages with low access potential are effectively eliminated, so that the cache hit rate is increased; fragmented effective edge data are extracted from a cache page and are independently stored in a cache of fine-grained management; the scheduling sequence of the vertexes in the task queue is adjusted by obtaining the proportion of the edge lists of the vertexes in the BFS-like algorithm task queue residing in the cache and combining the attributes such as the out-degree of the vertexes, and the data residing in the cache is utilized to the maximum extent. According to the method, the cache hit rate of the graph processing system when the graph processing system processes the BFS-like algorithm task can be effectively improved, so that the access performance of the graph processing system is improved.

The invention discloses a data distribution statistical method, a storage device and data distribution detection equipment. The method comprises the steps that a controller determines target data in a storage unit based on a data distribution acquisition request in response to the received data distribution acquisition request; the controller obtains cache data corresponding to the target data in the storage cache according to the target data, wherein the cache data comprises at least two pages of cache page data; the controller performs logical operation on the at least two cache page data to obtain a logical operation result, the logical operation comprises AND operation, or the logical operation comprises XOR operation and AND operation; the controller obtains at least three target numbers based on the cache page data and the result that the data is one in the logical operation result; and the controller sends the at least three target numbers to an external controller, so that the external controller generates a data distribution result of the corresponding storage unit in a linear equation solution form based on the target numbers. In this way, the calculation occupation of the data distribution task on the external CPU is reduced.

The embodiment of the invention relates to a method, equipment and a computer program product for writing data into a disk array in a storage system. The storage system includes a disk array. A method includes, in response to receiving a write request to write new data to a data block in at least one disk array group in a degraded mode of a disk array, reading old data stored in the data block and old check information stored in a check block associated with the data block. The method further includes determining new check information associated with the new data based on the old data, the old check information, and the new data. The method further includes writing the new data and the new check information into at least one cache page provided by a cache component in the storage system, the at least one cache page being allocated in a persistent memory in the cache component. In addition, the method further comprises the step of flushing new data and new verification information into the data blocks and the verification blocks in the at least one disk array group respectively.

The invention discloses a file caching performance improvement method and system based on distributed storage, and the method comprises the steps: firstly obtaining first file caching information of a to-be-cached file in a local caching node, the information comprises at least one of IO mode information generated through an improved virtual file system read-write function, cache page IO type marks and memory state information collected through a memory monitoring thread; inputting the first file cache information into a pre-trained first cache strategy model to obtain a file cache feature vector; the feature vector is sent to a remote storage node, the remote node inputs the feature vector and second file cache information of the to-be-cached file into a pre-trained second cache strategy model together, and a final cache instruction is obtained; and the local node executes cache strategy adjustment according to the instruction. According to the method, global collaborative intelligent optimization of the cache strategy is realized, and the cache hit rate and the system response performance are remarkably improved.

The application provides a memory management method and device, which can be used for fine management of process access conditions and traffic occupancy conditions of various cgroups in a physical host, a virtual machine or a container. The method comprises the following steps: recording all cgroups that read and write target data in a target cache page and the number of times that the cgroups read or write the target data in the target cache page through a first record table corresponding to the target cache page, so as to improve the accuracy of traffic statistical results of the cgroups. At this time, flow limiting is performed on the first cgroup based on the updated first record table, so that the flow limiting of the first cgroup is more fair and accurate.

The invention relates to a management method for efficiently realizing cache based on an LRU flash memory database, which comprises the following steps of: (1) classifying LRU linked lists according to dry and dirty attributes and cold and hot attributes of cache pages, and classifying the corresponding cache pages into the corresponding LRU linked lists according to access times and whether modification is performed or not; and (2) judging whether the page to be accessed currently is in the cache or not, and executing cache processing of the corresponding attribute linked list according to a judgment result. The invention also relates to a corresponding device, a processor and a computer readable storage medium. By the adoption of the management method and device for efficiently achieving cache based on the LRU flash memory database, the processor and the computer readable storage medium, a four-linked-table management mode is designed, a high cache access hit rate can be obtained while write operation is not increased, and the cache access efficiency is improved. The invention provides an efficient cache management method for a flash database, which is applicable to most scenes.

The application discloses a large language model low-delay inference method based on dynamic inference graph optimization, and proposes a low-delay inference method based on dynamic inference graph optimization; a rewritable and replayable template inference graph is constructed, and a template library is established according to an input shape vector; during inference, a template is matched according to a distance threshold value, and only attention / forward subgraphs are locally recaptured when the threshold value is exceeded; a forward execution graph injects a key-value cache page pointer, a numerical precision and an adapter identifier, and is replayed; pre-populated and decoded subgraphs are divided to implement a graph-level scheduling; a key operator is switched between a standard / quick kernel and different precisions during operation; a page-level rollback of a speculative branch is realized through a shadow page table and a reference count, and a batch and a template selection are adaptively adjusted based on online indicators; compared with existing schemes, the application reduces recapture and startup overhead, suppresses tail delay and jitter, and improves hardware utilization and service stability.

A data query method based on a cloud search service, a medium, a device and a program product relate to the technical field of computers, and store data of all pages included in a file maintained by fragmentation through cache pages of a local cache file. The method comprises the steps of determining first offset information and a first file identifier of a target page targeted by a query request through file metadata, reading data corresponding to the target page from a local cache file based on the first offset information and the first file identifier, the file metadata comprises the first offset information corresponding to the cache page used for pointing to the page included in the local cache file and used for storing the file, and each cache page is equivalent to a slice in the local cache file, so that Hash calculation can be avoided during data reading, and the data reading performance is improved.

Embodiments of the present application provide a page loading method, device, apparatus and storage medium. In the embodiments of the present application, new configuration attribute information is added for a single-page application. For a scenario of returning to a first page from a second page, according to configuration attribute information of the first page, a holding attribute of the first page and a target cache page of the first page can be obtained. In a case where the holding attribute of the first page is persistent holding and the target cache page of the first page is the second page, according to an identifier of the first page, historical state information of the first page is obtained from cached historical state information, and the first page is loaded according to the historical state information of the first page, so that selective saving and loading of the historical state information of the first page are implemented, which helps to improve flexibility of loading of the first page.

The application relates to a data backflushing method and device, computer equipment, a storage medium and a program product. The method comprises the following steps: determining a root volume in the to-be-backflushed snapshot volume according to a snapshot relationship between the to-be-backflushed snapshot volumes; and backfeeding cache pages corresponding to each snapshot volume in the to-be-backflushed snapshot volume according to the cache pages filled by the root volume and the snapshot relationship. The method can improve the data backflushing efficiency.

The application discloses a kind of storage and calling method and system of knowledge representation data structure, comprising: equivalence relation record table is constructed in computer external storage medium, single record in the record table includes first expression field and second expression field, and two fields are not distinguished in physical byte arrangement main key and foreign key;First expression and second expression with semantic equivalence mapping relationship are written into first expression field and second expression field respectively;Global unique expression hash index is constructed to single record in record table, and hash index table is established.In the application, processor can be realized when undertaking bidirectional mixed load, positive and negative direction query share same memory cache page, so as to effectively avoid page replacement concussion, and can realize the fast addressing of point-to-point equivalence relationship, and make cache hit rate greatly improve.

The invention relates to the technical field of algorithm module scheduling, and discloses an algorithm module scheduling method, which comprises the following steps of: firstly, acquiring a page size, a total page budget, a draft acceptance rate, a draft module service rate and a verification module service rate of a key value cache; calculating the expected length of the accepted prefix according to the draft acceptance rate, and determining the target draft drawing depth of the accepted prefix aligned with the integral multiple of the page size; calculating single-request peak page occupation according to the target draft depth, and obtaining the maximum concurrent micro-batch capacity in combination with the total page budget; further determining a beat period based on the service rates of the draft module and the verification module; and finally, mapping the requests to a fixed time coordinate and slot position according to an arrival sequence, and outputting a scheduling result containing the target draft depth and the mapping relationship. According to the method, the high utilization rate of the cache page can be realized under the condition that the page resources are fixed, the periodic fluctuation of the concurrent capacity is eliminated, and the overall execution efficiency and stability of a multi-module algorithm system are remarkably improved.

This invention discloses a non-contiguous variable-length Flash caching method, electronic device, and storage medium. The method includes: obtaining a read request for the physical address content of the Flash memory; traversing a cache segment linked list to obtain the content to be written; when a cache commit is required, traversing the cache segment linked list and dynamically allocating a segment of RAM as a cache page; and writing data according to the cache segment linked list and the cache page. This invention uses a linked list structure to cache only "useful" data, enabling Flash cache read / write operations with less RAM. Especially when the content to be updated is distributed across different Flash pages, the cache savings are even greater without reducing performance. The available RAM for other parts of the system can remain unchanged or increase, thus maintaining more system runtime and enhancing system compatibility.

This application relates to the field of memory access technology, and discloses a method, apparatus, electronic device, and storage medium for processing address access signals. The method for processing address access signals includes: configuring and generating a page height cache region in volatile memory; configuring at least one mapping register according to the page height cache region, such that the mapping register corresponds one-to-one with the page height cache pages; when it is determined that the address access signal is an access to non-volatile memory, traversing all configured mapping registers and determining whether the first page number of one of them is the same as the page number accessed by the address access signal; if not, keeping the page number accessed by the address access signal unchanged; if it is, remapping the page number accessed by the address access signal to the second page number stored in the matched mapping register. The address access signal processing method according to the embodiments of this application can optimize time overhead when processing address access signals.

Techniques are disclosed relating to managing page pools for sets of processing work. In some embodiments, page manager circuitry maintains, in memory circuitry, page pool descriptor information that indicates memory pages allocated to multiple different page pools. It may cache page pool descriptor information from the memory circuitry in a page pool descriptor cache, where the page pool descriptor cache includes multiple entries and a given entry is configured to store the following information for a cached page pool descriptor: a location of a corresponding page pool and page pool size information. The page manager circuitry may provide pages to requesting client circuitry from the page pool based on the cached page pool descriptor information.

The invention discloses an accelerated access method and system for a memory, and the method comprises the steps: judging whether a read address hits a data cache page or not when receiving an access request and a read request of host equipment, and directly taking and returning data if the read address hits the data cache page; and if not, triggering data prefetching, prefetching data from the off-chip memory according to the configurable cache page capacity by taking the read address as an initial address, storing the data into the cache page, and returning the data of the read request at the time. When a write request is requested, judging whether a write address hits the data cache page or not, if yes, setting the corresponding data cache page to be invalid, and sending the write request to the off-chip memory to execute write operation; if not, the corresponding data cache page is kept valid, and the write request is sent to the off-chip memory to execute write operation. The invention aims to realize efficient, flexible and safe accelerated access to the off-chip memory; the problems that in the prior art, an effective acceleration mechanism for off-chip memory access is lacked, the cache structure capacity is fixed and lacks configurability and is difficult to adapt to different application requirements, and a data security risk exists due to an imperfect data consistency maintenance mechanism are solved, so that the execution efficiency of a chip system is improved. The adaptability of the system in different application scenes is enhanced, and the system reliability and the data security are ensured.

Systems, methods, apparatuses, and computer program products are disclosed for caching pages in a compute replica of a set of compute replicas. Page statistics associated with requests to read or write pages are maintained at a first compute replica of a set of compute replicas. A subset of the page statistics associated with pages served by a page server are provided to the page server. The first compute replica receives, from the page server, a set of aggregate page statistics associated with pages served by the page server, the aggregate page statistics including aggregate page access frequencies of the pages by the set of compute replicas. The first compute replica determines, based on the set of aggregate page statistics, frequently accessed pages that are missing from a cache of the first compute replica, and obtains, from the page server, the missing pages.

The application discloses a kind of multi-screen cooperative control methods for war readiness shift, belong to multi-screen linkage technical field.The application is grouped to screen and is configured to report page, establishes the association of each report page and each screen group, then according to the configuration information of report page and the operation instruction sent by report end realizes the cooperative control of multiple screens;The application uniformly configures screen device and the display content of device in report end, more convenient, safe;The application designs screen grouping strategy, under the premise of guaranteeing that multiple report pages are simultaneously displayed by split screen at the same time, the efficiency of configuration is significantly improved;The application provides page preloading mechanism, and controlled screen pre-caches page content according to report page order, even in the case that page content is too large or short network jitter occurs, the fluency of report can still be guaranteed.

A key value (KV) cache paging scheme may improve memory management for a KV cache by storing KV cache pages having key tensors and value tensors for a fixed number of tags in a fixed size block in the KV cache of a worker. To further improve memory management, these schemes may be modified to achieve dynamic variable quantization. The quantization level of the KV cache page may be set based on the runtime importance score of the KV cache page. In addition, the quantization level of the KV cache page may be set based on the system load. And the final result is a scheme capable of realizing the high compression ratio of the KV cache page in the KV cache. The loading of more KV cache pages in the KV cache can bring higher reasoning throughput, higher system-level user capacity and higher end-to-end service availability.

The invention belongs to the technical field of computers, and particularly relates to an organizational structure information display method and system. According to the method, the complete organizational structure tree data is loaded to the front end at one time, so that interaction delay caused by frequent network requests in a traditional lazy loading scheme is avoided, operations such as unfolding and folding of a user can be instantly responded on the basis of local data, and the user experience is improved for the loaded total data. Through a mode of dynamically removing visual elements corresponding to all brother nodes of a current target node, only a small number of nodes on a current focusing path need to be rendered at any moment, so that the situation of interface jamming caused by one-time full-amount rendering in a traditional mode is avoided, and through cache paging and a selected state, the page rendering efficiency is improved. And all child nodes under the father node are mounted again during the folding operation, so that the smooth unfolding, folding and batch operation experience is provided while the large-scale hierarchical data is efficiently processed.

Systems, methods, apparatuses, and computer program products are disclosed for caching pages in a compute replica of a set of compute replicas. Page statistics associated with requests to read or write pages are maintained at a first compute replica of a set of compute replicas. A subset of the page statistics associated with pages served by a page server are provided to the page server. The first compute replica receives, from the page server, a set of aggregate page statistics associated with pages served by the page server, the aggregate page statistics including aggregate page access frequencies of the pages by the set of compute replicas. The first compute replica determines, based on the set of aggregate page statistics, frequently accessed pages that are missing from a cache of the first compute replica, and obtains, from the page server, the missing pages.

The invention relates to the technical field of computer software, in particular to a reusable Android ViewPager construction method, which comprises the following steps of: creating a self-defined adapter (HolderPagerAdapter), and initializing a cache queue; the method comprises the following steps: defining a ViewHolder structure; page instantiation and multiplexing logic are realized, and page recovery logic is realized; an interface for obtaining all the cached ViewHolders is provided, and an interface for searching for a specific ViewHolder according to the position is provided; and performing external operation on all the created pages based on the provided interface. The technical problems that in an Android native ViewPager component, due to the fact that a matched Pager Adapter does not expose an off-screen cache page interface, dynamic operation cannot be conducted on created but invisible pages, and performance overhead is brought by repeated view creation due to the fact that an effective page reuse mechanism is lacked are solved, unified access and control over all created pages are achieved, and the performance of the Android native ViewPager component is improved. Advanced interaction such as global theme switching and cross-page media playing control becomes possible.

A data query method, medium, equipment and program product based on a cloud search service, relate to the technical field of computers, and the data of all pages included in the file maintained by the cache page of the local cache file is stored, when a query request is received, the first offset information of the target page and the first file identifier to which the query request is directed are determined through the file metadata, the first offset information is used to point to the cache page in the local cache file for storing the pages included in the file, and the data corresponding to the target page is read from the local cache file based on the first offset information and the first file identifier. Since the first offset information for pointing to the cache page in the local cache file for storing the pages included in the file is included in the file metadata, each cache page corresponds to a piece in the local cache file, and the use of hash calculation can be avoided when data is read, thereby improving the performance of data reading.

The invention relates to the technical field of computers, and discloses a page cache recovery method and device.The method comprises the steps that recoverable page cache information is determined based on memory information of an operating system, page cache information, importance indexes of files, memory fragment degree indexes and cache pages which are not used recently; when the recoverable page cache information indicates that the cache occupation proportion is greater than a dynamic threshold value, determining a recovery strategy of the page cache according to load information and memory pressure information of an operating system; wherein the dynamic threshold value is determined based on the sliding average value of the memory use information in the target period; the recoverable page caches are recovered by using a recovery strategy of the page caches, so that excessive recovery of certain types of page caches is avoided, the recovery strategy of the page caches is dynamically adjusted by adopting a dynamic threshold value, the negative influence of page cache recovery on the performance of an operating system is reduced, and crash or performance reduction of the operating system caused by insufficient memory is avoided. And the stability of the operating system is improved.

Techniques for improving performance when storing data to memory addresses implemented in a data storage capacity of a storage subsystem. A connection from the storage subsystem to a host system supports both a cache-coherent memory access protocol to a storage device implemented in the data storage capacity and a data storage access protocol. The storage subsystem can use a cache to cache pages of the storage device for access over the connection. A data storage access queue can be configured to provide a command that is configured to store data at a memory address in the storage device.Such commands can be queued when the cache memory is temporarily unavailable, or to cause the storage subsystem to move a cached page from the cache memory to the data storage capacity.

This invention relates to the field of redundancy verification technology, specifically to an on-board intelligent AI data processing method for a dual-machine cold backup architecture, comprising the following steps: acquiring the task record sequence of the primary and backup channels, excluding paths based on node misalignment, identifying sequence difference segments, locating the corresponding structure, extracting cache pages and jump instructions to determine the connection direction, completing the jump chain, comparing variable paths to replace differing addresses, and inserting access numbers to complete the scheduling structure. In this invention, path filtering is performed based on the response timing differences of the primary and backup channels, structural matching is completed by combining the scheduling index and node misalignment relationships, the task segment order is located according to the primary task arrangement, jump breakpoints are extended according to page number trends, adjacent page directions guide jump chain completion, variable paths are filtered and replaced based on address consistency to construct path mapping, and the path access order is referenced to the scheduling rhythm to complete the structural connection. The task sequence maintains consistency in path continuation, jump connection, and variable path distribution.

This application discloses a cache management method, apparatus, server, and computer-readable storage medium, belonging to the field of storage technology. The method includes: a host determining the "hotness" information of multiple cache pages based on access information sent by multiple virtual machines; multiple virtual machines processing multiple cache pages based on the "hotness" information sent by the host, thereby reducing the memory footprint of cache pages on virtual machines and improving memory utilization efficiency. Because this method manages multiple cache pages using "hotness" information, the computational overhead is relatively small, enabling highly efficient cache management.