High-speed large-capacity data collecting system based on CPLD and SDRAM

A data acquisition system and large-capacity technology, applied in the direction of electrical digital data processing, input/output process of data processing, instruments, etc., can solve the problem that the static memory cannot meet the storage capacity requirements, etc.

Inactive Publication Date: 2005-03-23
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The increase in throughput rate will inevitably lead to an increase in data storage

Method used

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  • High-speed large-capacity data collecting system based on CPLD and SDRAM
  • High-speed large-capacity data collecting system based on CPLD and SDRAM

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Embodiment Construction

[0005] Combined with Figure 1, Figure 2, image 3 Describe this embodiment, this embodiment is made up of matching input network circuit 1, amplifying buffer circuit 2, analog / digital conversion circuit 3, CPLD control unit circuit 4, interface circuit 5, SDRAM storage unit circuit 6; The signal input end of the network circuit 1, the signal output end of the matching input network circuit 1 is connected to the signal input end of the amplification buffer circuit 2, the signal output end of the amplification buffer circuit 2 is connected to the analog signal input end of the analog / digital conversion circuit 3, and the analog / digital conversion circuit 3 is connected to the analog signal input end of the analog / digital conversion circuit 3. The data output end of the digital conversion circuit 3 is connected to the data input end of the CPLD control unit circuit 4, the clock signal input end of the analog / digital conversion circuit 3 is connected to the clock signal output end o...

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Abstract

The invention discloses a high speed large capacity data collection system which is based on CPLD and SDRAM. Analog signals are inputted into the signal input port of suited input network circuit(1), the signal output port of the (1) is connected to the signal input port of magnifying and buffering circuit (2), the signal output port of the (2) is connected to the analog signal input port of analog /digital transforming circuit (3), the data output port of the (3) is connected to the data input port of CPLD control unit circuit (4), the time signal input port of the (3) is connected to the time signal output port of the (4), the data output port of the (4) is connected to the data input port of the data input port of interface circuit(5), the data output port (4) is connected to the data input and output ports of (6). The highest sampling frequency is 100MHz, storing capacity is 256MBit, and it has several excellences such as big buffer capacity, expansible, high integrity, high reliability, high antijamming capability and so on, it can be used in high speed testing and controlling system, and image collecting and dealing system.

Description

Technical field: [0001] The invention relates to a data acquisition system, in particular to a high-speed and large-capacity data acquisition system based on CPLD and SDRAM. Background technique: [0002] With the development of science and technology and the wide application of data acquisition and processing systems, people have proposed more and more technical indicators of data acquisition systems, such as throughput rate, resolution, accuracy, input voltage range, and anti-interference ability. Higher requirements, especially the passing rate, are an important technical index that both the design and the user are very concerned about. The increase in throughput rate will inevitably lead to an increase in data storage capacity, and ordinary static memory cannot meet the storage capacity requirements. Invention content: [0003] The purpose of the invention is to provide a high-speed and large-capacity data acquisition system based on CPLD and SDRAM. The invention can...

Claims

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Application Information

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IPC IPC(8): G06F3/05
Inventor 王立欣
Owner HARBIN INST OF TECH
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