58 results about "Long code" patented technology

The invention belongs to the technical field of communication, and particularly relates to a multiplication active code decoding method based on an SO-ORBGRAND decoder. The SO-ORBGRAND decoder outputs soft information by calculating a correct posterior probability of a conjecture code word sequence, and high-performance decoding is realized through soft information exchange and optimization processing between the row decoder and the column decoder. In the iteration process, a method for judging the validity of the code word through the check matrix is designed by utilizing the polarization characteristic of the multiplication active code, so that the iteration is supported to jump out in advance to reduce the complexity. The invention provides a multiplication active code decoding algorithm based on an SO-ORBGRAND decoder, and compared with various non-system multiplication active code decoding algorithms and the performance of traditional long-code polarization codes, the method has remarkable advantages in error correction performance; a method for judging the validity of the code word through the check matrix by utilizing the polarization characteristic design of the multiplication positive code is provided, the complexity is reduced while the judgment success rate is improved, and the implementation overhead is reduced.

The invention provides a multi-agent-based code conversion system and method. The method comprises the following steps: preprocessing an input source code; performing block processing on the source code to obtain source code blocks, obtaining variable information and array size information of the blocks corresponding to the source code, and integrating the variable information and the array size information into complete variable information; fusing the code description file, the code blocks of the source codes and the variable information of the blocks corresponding to the source codes to generate target code blocks; debugging and checking the target code blocks in combination with the source code blocks; the code description file is used for guiding the intelligent agent to establish a jumping type relation in the code conversion process, and it is ensured that the generated target code better meets the actual function requirement of hardware; a block identifier is inserted into a long code to divide the long code into a plurality of blocks, so that the limitation on long code conversion is relieved; codes of different styles can be output by simply adjusting the cue word of the intelligent agent; through multiple times of debugging verification, the conversion quality of the target code is ensured.

The invention provides a decoding device and method. The method is suitable for the condition that periodic repeated code elements exist in original information code elements. The method comprises the steps that scrambled information code elements k0, k1, k2,..., kt-1, kt,..., km-1 with the length of m, the initial state M (0) of a long code generator and a state transition matrix B are received; constructing auxiliary data k0 ', k1', k2 ',..., k' 82 according to the scrambled information code elements k0, k1, k2,..., kt-1, kt,..., km-1; wherein ki '= ki + kt-1 + i, and i = 0, 1,..., 82; according to the auxiliary data k0 ', k1', k2 ',..., k' 82, the initial state M (0) and the state transition matrix B, a 42 * 42 full-rank matrix D is obtained through calculation; wherein the first behavior of the D is CBn, and then a scrambling code # imgabs0 # with the length of m is obtained through sequential analysis, the scrambling code obtained through analysis and scrambled information code elements k0, k1, k2,..., km-1 are subjected to modulo 2 addition operation, and an original information code element with the length of m is obtained.

The invention discloses a QC-LDPC code check matrix construction method and device, a medium and a product, and relates to the technical field of channel coding, and the method comprises the steps: firstly generating an initial check matrix without four rings; secondly, screening out a target column which is easy to cause decoding oscillation based on pre-decoding, and reducing non-zero items with the maximum number of six rings to generate an intermediate check matrix; and finally, optimizing six-ring distribution of the intermediate matrix column by column, and generating a target check matrix with mixed column weight. In order to solve the problem of decoding error leveling caused by short rings (four rings and six rings) in a QC-LDPC code with high code rate and long code word, the check matrix structure is dynamically optimized through a three-step construction method, the number of harmful short rings in the check matrix is remarkably reduced, the decoding performance is improved, and the error leveling is reduced.

The invention provides a code vulnerability detection method based on meta-learning and multi-modal fusion, belongs to the technical field of computers, and solves the technical problem that the existing vulnerability detection method is low in detection precision of a long code segment and weak in recognition capability under class imbalance. According to the technical scheme, the method comprises the following steps that S1, an original data set is preprocessed, and super-long code samples are screened; s2, simplifying a super-long code by using a large language model, and retaining key vulnerability semantics; s3, constructing AST extraction structure representation, and taking a code and a structure as multi-modal input; s4, code sequences and structural features are extracted through a pre-training model, and fusion is carried out through a cross-modal attention mechanism; s5, simulating a small sample task by adopting a meta-learning strategy to adapt to a class imbalance scene; and S6, inputting test data and outputting a vulnerability classification result. The method has the beneficial effects that the complex code and rare vulnerability detection performance can be improved, and the model stability and accuracy are enhanced.

According to the information processing method and device, a first LDPC base matrix can be divided into two types of G * G sub-matrixes, the row weight of each G * G sub-matrix is not larger than 1, and the column weight of each G * G sub-matrix is not larger than 1, so that the hardware implementation complexity is low, and a longer code length can be supported under the same hardware. Moreover, the first region of the first LDPC basis matrix comprises the second type of sub-matrixes with at least two element arrangement modes, so that interleaving can be realized, and long codes are supported. Moreover, the first region of the first LDPC basis matrix comprises a second type of sub-matrix in an element arrangement mode, so that the gain in the aspect of decoding parallelism can be provided.

The invention discloses a coding and decoding method and device of a memory, electronic equipment and a storage medium. The coding method comprises the steps of obtaining a to-be-written data block and a known word string corresponding to the data block; performing error correction coding on the data block and the known word string to obtain error correction information; and splicing the data block and the error correction information to obtain an error correction code word and storing the error correction code word in a memory. Error correction coding is carried out by introducing a known word string and a data block, so that the length of coded data is increased, the protection capability of an error correction code word is ensured, and then the data block and error correction information are spliced to obtain the error correction code word and write the error correction code word into a memory. As the known word string is introduced for error correction coding, the error correction code word protects one data block, the strong error correction capability of the error correction code word with high code length can still be ensured, and the memory access granularity is changed into a basic access unit, so that the problems of read amplification and write amplification can also be solved when the data block is updated, and the data block updating efficiency is improved. Therefore, the contradiction between the code length of the error correction code and the memory access granularity can be weakened.

The invention discloses an automatic Morse telegram communication method, which adopts a half-duplex communication mode and realizes automatic communication of Morse telegrams. The method comprises a link building communication stage and a text communication stage, a long code message format is adopted in the link building communication stage, and a short code message format is adopted in the text communication stage. In the link establishment communication stage, a double-layer CRC (Cyclic Redundancy Check) check, response confirmation and timeout retransmission mechanism is adopted to ensure reliable transmission of information; in the text communication stage, sub-package transmission and a unified response mechanism are adopted, and it is ensured that both real-time performance and reliability are considered in text transmission. The method effectively fills the blank of an automatic Morse telegraph communication protocol, and is suitable for application scenes needing automatic Morse telegraph communication, such as military, emergency rescue and the like.

The invention relates to the technical field of communication, in particular to a coding method and device and a decoding method and device. The method can be applied to the IEEE 802.11 ax standard, the 802.11 be standard, the 802.11 bn standard and the like and other standards of the IEEE 802.11 series, such as the 802.15 standard, the 802.11 bf standard, the IMMW standard or the star flash standard and the like. The method comprises the following steps: a first site obtains information bits, performs LDPC coding on the information bits based on a check matrix, obtains coded bits, and outputs a sequence. And after obtaining the to-be-decoded information, the second station performs LDPC decoding in combination with the check matrix to obtain information bits. The code length corresponding to the check matrix is 7776, the code rate corresponding to the check matrix is 3 / 4, and the expansion factor of the check matrix is 162. The check matrix can be better matched with a longer code length, and the coding and decoding performance is improved.

The invention discloses a high-density completion input construction and completion method for warehouse-level long codes. The method comprises the following steps: firstly, acquiring a current code snippet near a to-be-complemented position and a background long code context, performing structured analysis on the context, dividing candidate code units, and determining a code unit containing the to-be-complemented position as a query code unit; performing multi-channel correlation retrieval on the candidate code units, screening to obtain candidate subsets, performing function-level or class-level importance evaluation and reordering on the candidate subsets, performing self-adaptive truncation according to an attenuation relationship of adjacent candidate importance gains, further generating a fine-grained semantic unit sequence, dividing functional blocks, and obtaining a fine-grained semantic unit sequence; according to the method, importance evaluation is carried out on the function blocks, the function blocks are selected or cut under budget constraint, and the function blocks and current code snippets are jointly used as completion input, so that information density and task correlation are improved, reasoning cost and response delay are reduced, and stability and availability of warehouse-level long code completion are improved.

The invention discloses a long code abstract generation method based on a structure-guided sparse attention mechanism, and belongs to the field of software engineering. The method mainly solves the problem that in a long code snippet, due to the fact that the calculation complexity of a traditional Transform model self-attention mechanism is high, the performance is reduced. According to the code structure characterization method based on the abstract syntax tree (AST) and the control flow graph (CFG), the logic graph is constructed by fusing the abstract syntax tree and the control flow graph, and it is ensured that key structure features in codes are effectively reserved. On the basis, three attention distribution mechanisms are introduced, including a top-k attention distribution mechanism, a logic diagram attention distribution mechanism and a local attention distribution mechanism, and the calculation of the self-attention mechanism is sparse. Through the technical innovations, the interference of irrelevant information is inhibited while the efficient perception of the context of the long code is ensured, so that the generation quality of the long code abstract is effectively improved.

The present application relates to the technical field of communications, and particularly relates to a coding method and apparatus, and a decoding method and apparatus. The present application can be applied to the IEEE 802.11ax standard, the 802.11be standard, the 802.11bn standard, and other standards of the IEEE 802.11 series, such as the 802.15 standard, the 802.11bf standard, the IMMW standard or the SparkLink standard. The method comprises: a first station acquiring information bits, performing LDPC coding on the information bits on the basis of a parity-check matrix, so as to obtain the coded bits, and outputting a sequence; and after obtaining information to be decoded, a second station performing LDPC decoding in combination with the parity-check matrix, so as to obtain information bits, wherein the code length corresponding to the parity-check matrix is 7776, the code rate corresponding to the parity-check matrix is 5 / 6, and the expansion factor of the parity-check matrix is 162. The parity-check matrix can better match a longer code length, thereby improving the coding and decoding performance.

The present application discloses a method, device, medium and equipment for data-dependent jitter separation, which relates to the technical field of digital signal processing. Based on the traditional DDJ segmentation mode, the present application collects data of the input serial signal and segments it according to the period, calculates the DDJ data-dependent jitter after summing and averaging, and then separates the time interval error TIE according to the edge, so as to calculate the inter-symbol interference ISI and the duty cycle distortion DCD. It does not involve making a histogram statistics on the TIE, avoiding the problems of difficult confirmation of the histogram statistics interval due to the small code pattern length within a repeated period, and too large histogram statistics interval due to the too long code pattern within a repeated period, resulting in large peak errors in the statistical histogram and jitter separation errors, improving the effect of data-dependent jitter separation. At the same time, the processing speed is fast, the resource occupancy is small, and it can be applied to measurement systems with high real-time requirements for processing speed.

A parameter blind identification method for a long code LDPC belongs to the field of communication, and comprises the steps of training a generative adversarial network to perform sample data enhancement processing on sample data, and then training a neural network architecture constructed by a one-dimensional convolutional neural network and a Transformer to perform parameter identification. In order to solve the problems of insufficient data volume and single data form possibly occurring in the training process, the generative adversarial network is utilized to perform data enhancement, a new training sample is generated to supplement an existing data set, and the diversity of training data is expanded; and meanwhile, aiming at the problem that the length of the long code LDPC is relatively long, the long-distance dependency relationship and global information in the data are captured by utilizing Transform. According to the method, the generative adversarial network and Transform combined architecture is utilized, the parameter identification step of the long code LDPC is simplified, and a new thought is provided for parameter identification of the long code LDPC.

According to the method, the codes with the combination of the front shape and the rear shape are formed by splitting pronunciation and fonts in multiple regions for character symbols, the unique symbols are quickly retrieved, sequential searching of human eyes is reduced, and the problems that in an input method scheme, homophones are too many, codes are too long, repeated codes are too many, and learning cost is too high are solved.

A multimode solid-state drive (SSD) and associated method. An SSD includes: a plurality of flash memory chips addressable via a physical block address (PBA); and a controller chip configured to map logical block addresses (LBAs) from a host to PBAs, wherein the controller chip is further configured to handle different LBA block sizes according to a process that includes: partitioning a base partition to store one a long code word of size Clong having a single base data block protected with error correction coding (ECC); and partitioning a set of non-base partitions, each partitioned for a plurality of shortened code words, wherein each shortened code word is configured to store a shortened data block protected with ECC, and wherein the plurality of shortened code words are configured to be protected with ECC as a combined long codeword of size Clong.

The invention relates to the technical field of signal performance evaluation, in particular to a non-cooperative long code navigation signal performance evaluation method and related equipment, and the method comprises the following steps: obtaining a QPSK modulated non-cooperative long code navigation signal and a baseband code stream symbol; after the standard long code sequence is divided into equal-length signal segments, a sectional type parameter configuration correlation / integral method is used for capturing and tracking to obtain observed quantity information, and according to the standard long code sequence, the error performance of the non-cooperative signal code element sequence is evaluated, and the error rate and the position are counted; comparing the code element sequence after the baseband signal time domain waveform superposition with a local template, and evaluating time domain waveform distortion; the method comprises the following steps: quantifying non-cooperative signal channel characteristics, estimating digital distortion parameters through segmented accumulation of baseband signals, solving a response coefficient of an analog distortion filter by using a least square method, calculating an amplitude-frequency characteristic peak-to-peak value and a group delay variance, evaluating analog channel frequency response characteristics, and realizing accurate evaluation of non-cooperative long code signals.

The application discloses a kind of inter-satellite microwave measurement communication link signal generation and chain building method, comprising: generating transmitting signal based on direct sequence spread spectrum mode, and transmitting signal is divided into mutually orthogonal I branch and Q branch, and the spread spectrum code sequence of different length is modulated to two branches respectively;I branch is used as measurement branch, fixed modulation long code is used and binary offset subcarrier modulation mode is used, and measurement data frame with fixed frame length and information rate is loaded on I branch;Q branch is set to pilot mode or communication mode, short spread spectrum code is modulated in pilot mode and no data is loaded, long spread spectrum code is modulated in communication mode and communication data with configurable information rate is loaded;The start bit of spread spectrum code period of I branch and Q branch is aligned with the start bit of data frame header to the local maintained second pulse, and the generation of inter-satellite microwave measurement communication link transmitting signal is completed.The application can realize acquisition complexity and pseudo-range measurement accuracy under the condition of given bandwidth.

An information processing method and device, wherein a first LDPC base matrix used for encoding or decoding can be divided into multiple GxG sub-matrices with row weight not greater than 1 and column weight not greater than 1, the hardware implementation complexity is low, and longer code length can be supported under the same hardware. Moreover, the number of elements in the intersection of a first column set and a second column set is less than or equal to a first threshold, wherein the first column set is a set of columns in which non-zero elements of an i-th row of the first LDPC base matrix in a first region are located, the second column set is a set of columns in which non-zero elements of an i'-th row of the first LDPC base matrix in the first region are located, the i-th row and the i'-th row of the first LDPC base matrix can be any two rows in a first row set, and the first row set is a set of rows in which non-zero elements of each column in a reciprocal x-th column of a second region are located, which can accelerate the speed of information exchange, reduce decoding delay, and improve decoding performance.

The embodiment of the present application provides a kind of decoder and carrier rocket, comprising: jump edge detection module, for receiving the voltage signal encoded using Manchester II code and converted by physical layer transceiver, integrator, for using positive value to integrate and obtain integral value when received RX is high level, using negative value to integrate and obtain integral value when received RX# is high level;Synchronization head detection and window comparator, for using the symmetry of synchronization head, according to the start time of the jump edge of RX or the start time of the jump edge of RX#, the synchronization head is pre-judged according to integral value, in turn according to integral value appears in upper decision window or lower decision window, and according to the jump edge of RX or RX#, the code element value corresponding to data bit is determined, and when decoding or decoding is completed after the data bit of synchronization head, it is regarded as synchronization head decision success.Can deal with the problem that bus is too long code shape distortion is serious, and reliably decodes synchronization head and data bit.

The embodiment of the invention provides a code conversion method and device, electronic equipment and a medium, and the method comprises the steps: obtaining a source code, and generating a component tree according to the source code; wherein the component tree comprises a plurality of component nodes, and each component node corresponds to a section of component code in the source code; performing code conversion on the component codes corresponding to the component nodes of the component tree to obtain target component codes corresponding to the component nodes; determining position information of a component node corresponding to the target component code in a component tree; and according to the position information corresponding to each component node of the component tree, splicing the target component codes corresponding to each component node to obtain a target code. According to the embodiment of the invention, the source code is decomposed into the component codes corresponding to the component nodes through the component tree, and then the component codes are subjected to code conversion, so that the possibility of code conversion errors caused by overlong codes is reduced.

The embodiment of the invention provides a unit test code generation method and electronic equipment. The method comprises the steps that a to-be-tested task is obtained, the to-be-tested task is used for indicating that a unit test code is generated for a target code, and the target code comprises a plurality of methods arranged in sequence; based on the methods, the to-be-tested task is split to obtain a plurality of unit tasks, and the unit tasks are used for indicating generation of unit test codes for the corresponding methods; the unit tasks are input into a test code generation model, a plurality of first unit test codes are obtained, and the first unit test codes correspond to the methods; and based on the arrangement sequence of the methods, processing the plurality of first unit test codes to obtain a target unit test code. By the adoption of the method, the complex long code test task is divided into the unit tasks, the unit test codes corresponding to the unit tasks are generated through the model, then processing is conducted according to the original sequence of the method, and therefore the accuracy of test code generation is improved.

The invention discloses an adaptive burst communication method based on long code spread spectrum, and relates to the field of covert communication and anti-interference communication systems. According to the method, a modulation end senses or receives a channel state, a service volume demand and a bandwidth limiting condition as preconditions of communication, spread spectrum transmission is carried out on a specific transmission frame structure by utilizing a long code, frame header capture synchronization is realized by utilizing automatic adjustment of a capture threshold, timing of a frame header bit is realized by utilizing timing pre-correction, and the transmission efficiency is improved. Timing and carrier phase recovery of service data are achieved through open-loop tracking and open-loop phase estimation, and finally self-adaptive spread spectrum burst covert communication of long code spread spectrum is achieved. The method is easy to implement, FPGA implementation is easy, rapid synchronization of self-adaptive short burst spread spectrum communication under the low signal-to-noise ratio is facilitated, and the method is suitable for communication of underwater communication platforms, deep space communication platforms and other communication platforms or low-orbit satellite communication.

The invention provides an MDS symbol code matching construction method based on a single cyclic code, and belongs to the technical field of coding theories. According to the invention, the code length of a single cyclic code is selected; generating a polynomial according to the selected code length, and selecting a root of the polynomial; and solving an equation set corresponding to the selected code length and root, and excluding specific code words to construct three types of different MDS symbol codes. According to the method, the MDS symbol pair code can be effectively designed under the condition that the code length is fixed, and the MDS symbol pair code has a relatively large minimum symbol pair distance; and meanwhile, under the condition of the same minimum pair distance, a longer code length can be achieved through design, so that the fault tolerance and the repair efficiency are improved.

A method and apparatus are disclosed for eliminating overlong source code segments (e.g., methods) by evaluating input source code segments for a plurality of predetermined code metric values to identify a first long code segment based on predetermined code metric values for output and storage in a codefix issue queue, applying multiple extraction algorithms to the first long code segment to generate a second code segment that is semantically equivalent to and shorter than the first long code segment; and then generating a fixed codegraph representation of the software program using the second code segment to replace the first long code segment.

The present application relates to the technical field of communications, and in particular to an encoding method, a decoding method, and an apparatus. The present application can be applied to the IEEE 802.11ax standard, the 802.11be standard, and the 802.11bn standard, as well as other standards of the IEEE 802.11 series, such as the 802.15 standard, the 802.11bf standard, the IMMW standard, or the SparkLink standard. The method comprises: a first station acquires information bits, performs LDPC encoding on the information bits on the basis of a check matrix, obtains encoded bits, and outputs a sequence. After obtaining information to be decoded, a second station performs LDPC decoding in combination with the check matrix to obtain information bits. A code length corresponding to the check matrix is 7776, a code rate corresponding to the check matrix is 2 / 3, and a spreading factor of the check matrix is 162. The check matrix can better match a longer code length, thereby improving encoding and decoding performance.

The present application relates to the technical field of communications, and in particular to an encoding method and apparatus, and a decoding method and apparatus. The present application can be applied to the IEEE 802.11ax standard, 802.11be standard, 802.11bn standard, etc., and other standards in the IEEE 802.11 series, such as the 802.15 standard, 802.11bf standard, IMMW standard, or StarFlash standard. The encoding method comprises: a first station acquiring an information bit, performing LDPC encoding on the information bit on the basis of a check matrix to obtain an encoded bit, and outputting the encoded bit. A second station acquires information to be decoded, and then performs LDPC decoding on the basis of the check matrix to obtain the information bit. A code length corresponding to the check matrix is 7776, a code rate corresponding to the check matrix is 1 / 2, and a spreading factor of the check matrix is 162. The check matrix can better match a longer code length, thereby improving the encoding and decoding performance.

The invention provides a neural network weight compression method and system and a readable storage medium, and the method comprises the steps: obtaining a quantization weight, and constructing a first weight frequency table; obtaining a filling non-zero frequency value, taking the filling non-zero frequency value as a frequency value of a digit with the frequency value being zero in the first weight frequency table, obtaining a second weight frequency table, and constructing an initial Huffman tree; judging whether the longest coding length in the current initial Huffman tree exceeds a preset coding length, and if not, taking the current initial Huffman tree as a target Huffman tree; if yes, adjusting the filling non-zero frequency value, updating the current initial Huffman tree, continuing to judge until the longest coding length does not exceed the preset coding length, and taking the longest coding length as a target Huffman tree; and constructing a normal form Huffman tree according to the target Huffman tree and a preset compression rule to obtain a normal form Huffman coding table. The method is suitable for different types of neural network structures, the compression speed is high, lossless compression is basically adopted, and the integrity and accuracy of data can be kept.

The invention provides a polar code retransmission method and device, and the method comprises the steps: enabling a to-be-coded bit sequence and a first bit sequence which contains bits and has a value of 0 to be interleaved, forming a long code structure, carrying out the polar coding of the interleaved sequence, obtaining a coding sequence, enabling the coding sequence to comprise an initial transmission sequence after the coding of the to-be-coded bit sequence, and enabling the initial transmission sequence to be transmitted to the to-be-coded bit sequence; according to the invention, the same performance as the initial transmission can be ensured, the sequence except the initial transmission sequence in the coding sequence can be sent as the retransmission sequence, and the constructed retransmission sequence is stable in performance and has the effect of long code gain.

An information processing method and apparatus. A first LDPC base matrix can be divided into two types of G×G sub-matrices, and each G×G sub-matrix has a row weight of no greater than 1 and a column weight of no greater than 1, so that hardware implementation complexity is low, and under the same hardware, a longer code length can be supported. In addition, a first region of the first LDPC base matrix comprises a second type of sub-matrices of at least two element arrangement patterns, so that interleaving can be implemented, thereby supporting long codes. In addition, the first region of the first LDPC base matrix comprises a second type of sub-matrices of one element arrangement pattern, so that gains in terms of decoding parallelism can be provided.