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24 results about "Symbol decoding" patented technology

Digital receiver circuit and control method thereof

PendingCN119834820AMulti-frequency code systemsSymbol decodingPulse sequence
The invention provides a digital receiver circuit and a control method thereof. The digital receiver circuit comprises a frame synchronization detection module, a symbol synchronization detection module and a symbol decoding module, the frame synchronization detection module comprises a first matched filter and a first peak detection module; the first matched filter is used for performing convolution operation on a guide code sequence in the received synchronization signal to obtain a convolution operation result; the first peak value detection module is used for determining the position of a convolution peak value according to the convolution operation result; determining the end position of the guide code sequence according to the position of the convolution peak value; the symbol synchronization detection module is used for detecting positioning information of an end position of each symbol in effective data connected with the guide code sequence; according to the positioning information, determining a pulse sequence corresponding to a judgment moment of symbol decoding of the effective data; and the symbol decoding module is used for performing symbol decoding on the effective data according to the judgment time and the pulse sequence. The technology can improve the accuracy of signal detection and decoding.
Owner:SHANGHAI QUANRAY ELECTRONICS

System and method for symbol decoding in high frequency (hf) communication channels

One embodiment provides a method and a system for reconstructing symbols transmitted over a high frequency (HF) communication channel. During operation, the system can receive, at a receiver, a radio frequency (RF) signal carrying an input data frame and transmitted over the HF communication channel. The input data frame includes a number of known symbols followed by a number of unknown symbols. The system can determine a set of channel parameters associated with the HF communication channel based on the received RF signal and the known symbols and reconstruct, using a machine-learning technique, the unknown symbols based on the determined channel parameters and the received RF signal.
Owner:GENESEE VALLEY INNOVATIONS LLC

A method and apparatus for interleaved scheduling and hierarchical decoding of LDPC frames based on mutual information

ActiveCN116915365BImprove decoding processing speedfast updateError preventionError correction/detection using multiple parity bitsSymbol decodingTheoretical computer science
This invention discloses a layered decoding method and apparatus for LDPC frames based on mutual information, relating to the field of digital signal transmission in the physical layer of wireless communication. The method includes the following steps: 1) Calculating the LLR value of a given codeword to be decoded, and performing Q-ratio specific-point quantization to maximize mutual information on the entire frame's LLR value; 2) Calculating the PP value of the Q-ratio specific-point quantized LLR value according to Bayes' formula; 3) Layering the PP values ​​of the LLR values ​​of the data to be decoded according to the coefficients of the parity check matrix H; 4) Calculating the information within the information node; 5) Performing parity check node update calculations according to the PMS decoding algorithm to obtain the information value outside the parity check node; 6) Updating the information node using the information value outside the parity check node; 7) Symbol decoding; 8) Calculating the syndrome according to H. If the result of the syndrome is 0 or the maximum number of iterations is reached, outputting the three-frame codeword result; otherwise, returning to step 3) for the next decoding iteration. This invention can effectively improve the decoding processing speed of each frame.
Owner:THE 54TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION

Decoding circuit, decoding method and passive internet-of-things tag

The embodiment of the invention provides a decoding circuit, a decoding method and a passive internet of things tag, and the circuit comprises a frame synchronization module which is used for transmitting a downlink instruction, an effective frame signal and a symbol feature sequence to a symbol synchronization module; the symbol synchronization module is used for sending the symbol synchronization signal to the symbol decoding module; the convolution result is a convolution output value corresponding to each group of symbol feature sequences; and the symbol decoding module is used for reading convolution output values at two moments at each optimal judgment moment based on the symbol synchronization signal, comparing the convolution output values at the two moments based on a preset comparison rule, generating symbol judgment results, and combining the symbol judgment results to generate effective data. In the mode, effective data can be stably extracted in a complex communication environment, so that the decoding sensitivity and the anti-interference capability of the passive Internet of Things tag in the complex environment are improved, and the decoding precision and the stability of the passive Internet of Things tag are further improved.
Owner:SHANGHAI QUANRAY ELECTRONICS

Video encoding method, device and video decoding method, device

ActiveCN116260972BDigital video signal modificationSymbol decodingVideo encoding
The present invention provides a video encoding method, apparatus, and video decoding method and apparatus. The video decoding method includes: receiving decoded transform coefficients of a residual block corresponding to a current block, including decoded symbol residuals associated with a set of jointly predicted coefficient symbols; determining an allowed maximum number; decoding the decoded symbol residuals into decoded symbol residuals, wherein the total number of the set of jointly predicted coefficient symbols is equal to or less than the allowed maximum number; selecting a hypothesis to determine a joint symbol prediction for the set of jointly predicted coefficient symbols; and reconstructing the set of jointly predicted coefficient symbols based on the decoded symbol residuals and the joint symbol prediction. The video encoding method, apparatus, and video decoding method and apparatus of the present invention can improve the performance of transform coefficient symbol decoding.
Owner:MEDIATEK INC

System and method for correcting network data packet loss

The present invention provides a reference-order AL-FEC system for recovering lost network video data during real-time video communication, which includes a packetizer, a reference-order AL-FEC encoder, a reference-order AL-FEC decoder, and a depacketizer. The packetizer constructs source symbols based on the source data packets of the current frame. The encoder generates repair symbols from the source symbols of the current frame and other reference frames based on the reference order, rather than the time order, among the frames within the coding window. The encoder also generates repair data packets based on the repair symbols. The decoder recovers the lost source symbols based on the source symbols of the frames in the coding window and the repair symbols obtained by decoding the repair packets. The decoding is achieved by solving a linear equation of the repair symbols.
Owner:AGORA LAB INC

System-level data compression scheme

An implementation includes an integrated circuit, a network-on-chip (NoC) a plurality of first circuits, each first circuit may include a compressor and a decompressor, the compressor being configured to compress datastreams, and the decompressor being configured to decompress the compressed datastreams, the compressed datastreams may include symbols, the decompressor may include a plurality of symbol decoders configured to decode in parallel the compressed datastreams. The integrated circuit also includes a memory circuit. The circuit also includes a plurality of switches, the plurality of switches being interconnected and communicatively linking the plurality of first circuits with the memory circuit.
Owner:XILINX INC

Equalization for pulse-amplitude modulation

Described apparatuses and methods are directed to equalization with pulse-amplitude modulation (PAM) signaling. As bus frequencies have increased, the time for correctly transitioning between voltage levels has decreased, which can lead to errors. Symbol decoding reliability can be improved with equalization, like with decision-feedback equalization (DFE). DFE, however, can be expensive for chip area and power usage. Therefore, instead of applying DFE to all voltage level determination paths in a receiver, DFE can be applied to a subset of such determination paths. With PAM4 signaling, for example, a DFE circuit can be coupled between an output and an input of a middle slicer. In some cases, symbol detection reliability can be maintained even with fewer DFE circuits by compressing a middle eye of the PAM4 signal. The other two eyes thus have additional headroom for expansion. Encoding schemes, impedance terminations, or reference voltage levels can be tailored accordingly.
Owner:MICRON TECHNOLOGY INC

Estimation method of discrete digital signals in noisy overloaded wireless communication systems with CSI errors

A computer-implemented reconstruction method of discrete digital signals in noisy overloaded wireless communication systems with CSI Errors that is characterized by a channel matrix of complex coefficients, the method including receiving the signal from channel by a signal detector, estimation of the CSI error parameter τ is done at the receiver, estimation noise power is done by a noise power estimator, forwarding the detected signal and the CSI error parameter τ and noise power estimation to a decoder that estimates the transmitted symbol, wherein the estimation of the decoder produces a symbol that could probably have been transmitted it is forwarded to a de-mapper, which outputs the bit estimates corresponding to the estimated transmit signal and the corresponding estimated symbol to a microprocessor for further processing.
Owner:CONTINENTAL AUTOMOTIVE TECHNOLOGIES GMBH

System-level data compression scheme

An implementation includes an integrated circuit, a network-on-chip (NoC) a plurality of first circuits, each first circuit may include a compressor and a decompressor, the compressor being configured to compress datastreams, and the decompressor being configured to decompress the compressed datastreams, the compressed datastreams may include symbols, the decompressor may include a plurality of symbol decoders configured to decode in parallel the compressed datastreams. The integrated circuit also includes a memory circuit. The circuit also includes a plurality of switches, the plurality of switches being interconnected and communicatively linking the plurality of first circuits with the memory circuit.
Owner:XILINX INC

Signaling Predicted BVD / MVD Suffixes

A decoder receives a first one or more symbols in a bitstream to obtain a prefix of a magnitude of a difference vector for a current block. The decoder determines, after obtaining the prefix and based on a status of a flag in the received bitstream, whether or not the received bitstream includes a second one or more symbols of a suffix of the magnitude, and whether, when the received bitstream includes the second one or more symbols, the second one or more symbols comprise at least one context-coded symbol. The decoder obtainins the suffix in accordance with the determining and reconstructs the current block based on the difference vector with the magnitude represented by the obtained prefix and suffix.
Owner:OFINNO LLC

Apparatuses and Methods for a Radio Access Network

An apparatus and method for supporting advanced receiver in an open radio access network. A distributed unit (DU) and a radio unit (RU) in a radio access network include an advanced receiver for supporting interference cancellation in the uplink transmissions. The DU provides to the RU demodulation reference signal (DMRS) configuration information and information regarding resource partition of scheduled resources for uplink transmissions from user equipments (UEs) in a slot. The RU receives uplink transmissions from UEs and sends equalized modulation symbols of at least one resource partition to the DU. The DU decodes the equalized modulation symbols, reconstructs modulation symbols for at least one resource partition based on the decoded modulation symbols, and sends the reconstructed modulation symbols to the RU. The RU performs interference cancellation on the modulation symbols of the uplink transmissions based on the reconstructed modulation symbols and sends interference-cancelled equalized modulation symbols to the DU.
Owner:INTEL CORP

Error correction decoding device and error correction decoding method

PendingCN119731948AOther decoding techniquesError preventionSymbol decodingLogit
An error correction decoding device is configured to decode a multi-valued modulation symbol having a dimension of D and a number of bits per dimension of M (M is an integer of 2 or more) from each of D (D is an integer of 1 or more) pulse amplitude modulation symbols. An error correction decoding device is provided with: a soft decision unit (1) that acquires each pulse amplitude modulation symbol from a communication symbol sequence in which D pulse amplitude modulation symbols are arranged, calculates, on the basis of each pulse amplitude modulation symbol, a positive or negative first hard decision bit indicating the logarithmic posterior probability ratio of each of M bits included in a multi-valued modulation symbol, and outputs the calculated first hard decision bit to a second hard decision bit that indicates the logarithmic posterior probability ratio of each of the M bits included in the multi-valued modulation symbol; calculating an absolute value of each logarithmic posterior probability ratio as a first reliability; and an exclusive-OR calculation unit (2) that calculates the exclusive-OR of the D * M first hard decision bits calculated by the soft decision unit (1). Furthermore, the error correction decoding device is provided with: a reliability selection unit (3) which compares the D * M first reliability degrees calculated by the soft decision unit (1) with each other, selects one first reliability degree from among the D * M first reliability degrees on the basis of the result of the comparison, and outputs the one first reliability degree as a second reliability degree; and a soft decision error correction decoding unit (4) that performs soft decision error correction decoding on the result of the exclusive OR operation performed by the exclusive OR operation unit (2) and the second reliability.
Owner:MITSUBISHI ELECTRIC CORP

Product autoencoder for error-correcting via sub-stage processing

A processing circuit implements: an encoder configured to: supply k symbols of original data to a neural product encoder including M neural encoder stages, a j-th neural encoder stage including a j-th neural network configured by j-th parameters to implement an (nj, kj) error correction code (ECC), where nj is a factor of n and kj is a factor of k; and output n symbols representing the k symbols of original data encoded by an error correcting code; or a decoder configured to supply n symbols of a received message to a neural product decoder including neural decoder stages grouped into a I pipeline stages, an i-th pipeline stage of the neural product decoder including M neural decoder stages, a j-th neural decoder stage comprising a j-th neural network configured by j-th parameters to implement an (nj, kj) ECC; and output k symbols decoded from the n symbols of the received message.
Owner:SAMSUNG ELECTRONICS CO LTD

A method for distributed security transmission of information

ActiveCN116320073BSecuring communicationCommunications systemSymbol decoding
The application discloses a distributed secure transmission method of information, which comprises the following steps: dividing transmission symbols corresponding to secret information expected to be transmitted into two information-carrying symbols through serial-parallel conversion, and respectively sending each information-carrying symbol to different users for activation; all activated users cooperate with each other to recover the transmission symbols through parallel-serial conversion by receiving the information; and demodulating the transmission symbols to obtain the secret information. The application is applicable to the case that a eavesdropping user and an expected receiver are located in a similar direction under a line-of-sight channel, and can maximally inhibit the acquisition of secret information by the eavesdropping user while not affecting the decoding of expected symbols by the receiver. Therefore, the negative influence of a poor eavesdropping environment on the performance of a communication system is avoided, and the secure transmission performance of a signal is enhanced.
Owner:NORTHWESTERN POLYTECHNICAL UNIV

Data communication system, encoder logic, decoder logic, and encoding and decoding method using the same

PendingUS20260254682A1Communications systemSymbol decoding
A data communication system includes a link unit, a first communication unit including a first encoding / decoding unit, and a second communication unit including a second encoding / decoding unit. Each of the first and second encoding / decoding units includes an encoder logic and an decoder logic. The encoder logic defines signal pairs, in which a sum of PAM4 signals of each of the transmission lines is 0 and PAM values of each of the simultaneously driving transmission lines have different signal levels, as state symbols according to a relationship determined by assigning the signal pairs to vertices and line segments of graph coloring theory, and encodes the transmission data to match a corresponding state symbol using a relationship between a previous state symbol and a current state symbol. The decoder logic restores the received signal using the relationship between the previous state symbol and the current state symbol.
Owner:HAN SANG HYUN +1

Method and Apparatus for Signaling Predicted Motion Vector Difference Values

PendingUS20260006179A1Digital video signal modificationSymbol decodingMotion vector
A decoder receives, from a bitstream for a current block, a first indication of whether a magnitude symbol of a motion vector difference (MVD) is enabled to be selected for coding as an indication of whether the magnitude symbol is equal to a corresponding magnitude symbol of an MVD predictor. The decoder determines, based on the first indication, whether to skip parsing a second indication from the bitstream. The second indication indicates whether an absolute value of a component of the MVD is greater than one. The decoder receives, from the bitstream, one or more symbols of the component of the MVD. The decoder determines a value of the component of the MVD based on the one or more symbols and the determining whether to skip parsing the second indication. The decoder reconstructs the current block based on the MVD.
Owner:OFINNO LLC

Product autoencoder for error-correcting via sub-stage processing

A processing circuit implements: an encoder configured to: supply k symbols of original data to a neural product encoder including M neural encoder stages, a j-th neural encoder stage including a j-th neural network configured by j-th parameters to implement an (nj,kj) error correction code (ECC), where nj is a factor of n and kj is a factor of k; and output n symbols representing the k symbols of original data encoded by an error correcting code; or a decoder configured to supply n symbols of a received message to a neural product decoder including neural decoder stages grouped into a l pipeline stages, an i-th pipeline stage of the neural product decoder including M neural decoder stages, a j-th neural decoder stage comprising a j-th neural network configured by j-th parameters to implement an (nj,kj) ECC; and output k symbols decoded from the n symbols of the received message.
Owner:SAMSUNG ELECTRONICS CO LTD

Method for descrambling and symbol decoding

PendingUS20260254559A1Symbol decodingSignal on
A test and measurement device including a first input structured to acquire data from a sideband data communication channel that carries data related to one or more high speed data channels between a host and a device, a second input structured to acquire data signals carried on the related high speed data channel, and one or more processors structured to send a command to provoke the host to send a retiming message that includes one or more scrambling codes that were used to encode data signals on the coupled high speed data channel, extract the one or more scrambling codes from the retiming message, convert the data signals received on the coupled high speed data channel to coded data, descramble the coded data using the one or more scrambling codes extracted from the retiming message, and search the descrambled data for a predetermined code sequence. Methods are also described.
Owner:TEKTRONIX INC

System-level data compression scheme

An implementation includes an integrated circuit, a network-on-chip (NoC) a plurality of first circuits, each first circuit may include a compressor and a decompressor, the compressor being configured to compress datastreams, and the decompressor being configured to decompress the compressed datastreams, the compressed datastreams may include symbols, the decompressor may include a plurality of symbol decoders configured to decode in parallel the compressed datastreams. The integrated circuit also includes a memory circuit. The circuit also includes a plurality of switches, the plurality of switches being interconnected and communicatively linking the plurality of first circuits with the memory circuit.
Owner:XILINX INC

Detail reconstruction image transmission method and system oriented to low compression ratio

The invention discloses a detail reconstruction image transmission method and system oriented to a low compression ratio, and relates to the technical field of wireless communication, and the method comprises the steps: obtaining an input image, inputting the input image into a pre-established hybrid architecture model for semantic feature extraction, and outputting to obtain a hybrid feature map, local texture features and global semantic features are fused in the mixed feature map; performing dimensionality reduction on the mixed feature map through symbol compression to obtain a low-dimensional symbol representation sequence; inputting the low-dimensional symbol representation sequence into a pre-established preliminary reconstruction model for symbol decoding and global semantic feature recovery to generate a preliminarily reconstructed image, inputting the preliminarily reconstructed image into a pre-established detail enhancement network model, and gradually recovering high-frequency detail features of the image through a multi-layer dense residual structure to obtain a reconstructed image; and finally, a high-quality reconstructed image is output, so that the image transmission quality under the condition of a low compression ratio is improved.
Owner:NANJING UNIV OF POSTS & TELECOMM

Positioning measurement derivation based on a decoded physical downlink channel and corresponding measurement latency

PendingUS20260133276A1Position fixationPilot signal allocationSymbol decodingUser equipment
Disclosed are techniques for wireless positioning. In an aspect, a user equipment (UE) receives a demodulation reference signal (DMRS) and a physical downlink shared channel (PDSCH) associated with the DMRS, the DMRS and the PDSCH spanning a plurality of symbols of a slot, decodes the PDSCH, performs a positioning measurement based on the DMRS and the decoded PDSCH, and reports, to a location server, the positioning measurement or location information derived at least based on the positioning measurement.
Owner:QUALCOMM INC

Systems and methods decoding intended symbols from neural activity

Systems and methods for decoding intended symbols from neural activity in accordance with embodiments of the invention are illustrated. One embodiment includes a symbol decoding system for brain-computer interfacing, including a neural signal recorder implanted into a brain of a user, and a symbol decoder, the symbol decoder including a processor, and a memory, where the memory includes a symbol decoding application capable of directing the processor to obtain neural signal data from the neural signal recorder, estimate a symbol from the neural signal data using a symbol model, and perform a command associated with the symbol.
Owner:THE BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIV

Positioning measurement derivation based on a decoded physical downlink channel and corresponding measurement latency

ActiveUS12674855B2Symbol decodingUser equipment
Disclosed are techniques for wireless positioning. In an aspect, a user equipment (UE) receives a demodulation reference signal (DMRS) and a physical downlink shared channel (PDSCH) associated with the DMRS, the DMRS and the PDSCH spanning a plurality of symbols of a slot, decodes the PDSCH, performs a positioning measurement based on the DMRS and the decoded PDSCH, and reports, to a location server, the positioning measurement or location information derived at least based on the positioning measurement.
Owner:QUALCOMM INC