117 results about "Bit interleaved coded modulation" patented technology

Disclosed is an apparatus for transmitting a bit-interleaved coded modulation (BICM) signal in an orthogonal frequency division multiplexing (OFDM) system. A serial-to-parallel (S/P) converter generates bit streams using coded bits according to the number of transmission antennas and a modulation order of a predetermined modulation scheme. An interleaver applies at least one offset to the bit streams and performs interleaving on the offset-applied bit streams. A combiner combines the interleaved bit streams according to the number of transmission antennas.

A system employs space-time coding characterized at the transmitter by bit-interleaved coded modulation (BICM) combined with modulating several streams of the BICM encoded data for transmission over two or more antennas. Space-time coding techniques improve transmission efficiency in radio channels by using multiple transmit and/or receive antennas and coordination of the signaling over these antennas. Bit-interleaved coded modulation provides good diversity gain with higher-order modulation schemes that employ binary convolutional codes. A receiver demodulates the received signals and applies multi-input, multi-output (MIMO) demapping to estimate the BICM encoded bitstream. After deinterleaving of the BICM encoded bitstream, maximum a posteriori (MAP) decoding is applied to the resulting bit stream to generate soft output values. By applying well-known turbo-decoding principles to iteratively demap and decode, the overall receiver performance is significantly improved. The MIMO demapping and MAP decoding processes exchange likelihood information to improve the bit error rate performance over several iterations of demapping/decoding. By generating tentative decisions for transmitted bits, the overall number of evaluations used for demapping may be reduced.

A transmitter includes a plurality of encoders configured to receive source bit streams from m information sources, each of the plurality encoders including identical (n,k) low-density parity check (LDPC) codes of code rate r=k/n, where k is a number of information bits and n is codeword length. An interleaver is configured to collect m row-wise codewords from the plurality of encoders, and a mapper is configured to receive m bits at a time column-wise from the interleaver and to determine an M-ary signal constellation point. A modulator is configured to modulate a light source in accordance with the output of the mapper at a transmission rate R_s/r (R_s—the symbol rate, r—the code rate). A receiver and transmission and receiving methods are also disclosed.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.

A system employs space-time coding characterized at the transmitter by bit-interleaved coded modulation (BICM) combined with multi-carrier Orthogonal Frequency Division Multiplexing (OFDM) modulation. Space-Time coding techniques improve transmission efficiency in radio channels by using multiple transmit and/or receive antennas and coordination of the signaling over these antennas. Bit-interleaved coded modulation provides good diversity gain with higher-order modulation schemes that employ binary convolutional codes. OFDM modulation allows for wideband transmission over frequency selective radio channels. A receiver demodulates the OFDM signal and applies multi-input, multi-output (MIMO) demapping to estimate the BICM encoded bitstream. After deinterleaving of the BICM encoded bitstream, maximum a posteriori (MAP) decoding is applied to the resulting bit stream to generate soft output values. The MIMO demapping and MAP decoding processes exchange likelihood information to improve the bit error rate performance over several iterations of demapping/decoding. By applying well-known turbo-decoding principles to iteratively demap and decode, the overall receiver performance is significantly improved.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 1024-symbol mapping.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.

An efficient system and method for modulation and demodulation to achieve a high data rate using Bit-Interleaved Coded Modulation and OFDM uses either a coherent or a non-coherent transmission scheme using differential modulation. In order to maintain a high data rate impervious to sudden phase changes, a communication system uses an efficient constellation having multiple rings with different sizes and modulation/demodulation schemes utilizing this constellation. In power line communications, the channel gain information is obtained easily at a receiver (100) while the phase information is not. Thus, the communication system uses an absolute magnitude and differential phase coding for modulation and demodulation of the signals.

A method and apparatus is disclosed herein for adaptive soft output M-algorithm receiver structures. In one embodiment, a device for use in a wireless communication system includes a transmitter, and comprises of a receiver to receive information-bearing signals from the transmitter wirelessly transmitted using OFDM and bit interleaved coded modulation, where the receiver comprises an inner decoder structure having a soft output M-algorithm (SOMA) based multiple-in multiple-out (MIMO) joint demapper that uses a SOMA-based MIMO detection process to perform joint inner demapping over each subtone. The SOMA-based MIMO joint demapper is operable to identify a best candidate among a number of candidates by searching a detection tree under control of a parameter representing a total number of paths that are extended from each level, such that only a number of best alternatives from every level of the tree are expanded, wherein the SOMA-based MIMO detection process adapts one or more of the parameters based on tone quality.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 10/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.

A method and apparatus for tree position adaptive SOMA receiver structures are disclosed herein. In one embodiment, a device for use in a wireless communication system comprises a receiver to receive information-bearing signals from the transmitter wirelessly transmitted using OFDM and bit interleaved coded modulation, where the receiver includes an inner decoder structure having a soft output M-algorithm (SOMA) based multiple-in multiple-out (MIMO) joint demapper that uses a SOMA-based MIMO detection process to perform joint inner demapping over each tone, and wherein the SOMA-based MIMO joint demapper is operable to search a detection tree for each tone using a tree-search symbol order that is adapted for each tone based on channel state information and extrinsic information from the outer decoder, where only a number of best alternatives from every level of the tree are expanded.

A method and apparatus is disclosed herein for adaptive MaclogMAP-type receiver structures. In one embodiment, a device comprises a receiver to receive information-bearing signals from the transmitter wirelessly transmitted using OFDM and bit interleaved coded modulation, and the receiver comprises an inner decoder structure having a multiple-in multiple-out (MIMO) joint demapper to perform most likely transmitted symbol estimation using a modified MaxLogMAP process that is operable to adapt a degree of metric correction based on quality of OFDM tones.

LDPC (Low Density Parity Check) coded modulation symbol decoding using non-Gray code maps for improved performance. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate the bit nodes thereby generating an LDPC bipartite graph (such that symbol nodes are appropriately mapped directly to check nodes thereby obviating the bit nodes). The edges that communicatively couple the symbol nodes to the check nodes are labeled appropriately to support symbol decoding of the LDPC coded modulation signal. In addition, the LDPC coded modulation symbol decoding can be employed to decode a signal that has been encoded using LDPC-BICM (Low Density Parity Check-Bit Interleaved Coded Modulation) encoding with non-Gray code mapping. By using the non-Gray code mapping, a performance improvement over such a system using only Gray code mapping may be achieved.

Provided is a bit interleaved coded modulation-iterative decoding (BICM-ID) technique suffering a small loss in a transfer rate. A BICM-ID technique allowing a decoder to treat a small processing quantity is also provided. Encoding is carried out according to a code based on an iterative code. Encoded bits are reordered during interleaving processing, subjected to multi-valued modulation through extended mapping, and then transmitted. The extended mapping includes number-of-bits thinning processing of thinning l bits into m bits (m<l), and non-gray mapping. During the number-of-bits thinning processing, at least one of a predetermined number of bits is determined with only one of interleaved bits.

Provided is a receiver which includes at least one processor configured to control or execute: a first Bit-Interleaved Coded Modulation (BICM) decoder configured to generate a first output signal corresponding to an upper layer signal by processing a first input signal which includes a superposition coding signal generated at a transmitter by superimposing the upper layer signal and a lower layer signal; a parity generator configured to generate at least one parity based on a result of the processing of the first input signal by the first BICM decoder; and a second BICM decoder configured to generate a second output signal corresponding to the lower layer signal by processing a second input signal which is generated using the parity generated by the parity generator.

LDPC (Low Density Parity Check) coded modulation hybrid decoding using non-Gray code maps for improved performance. Check node updating and symbol node updating are successively and alternatively performed on bit edge messages for a predetermined number of decoding iterations or until sufficient degree of precision is achieved. The symbol node updating of the bit edge messages uses symbol metrics corresponding to the symbol being decoded and the bit edge messages most recently updated by check node updating. The check node updating of the bit edge messages uses the bit edge messages most recently updated by symbol node updating. The symbol node updating computes possible soft symbol estimates. LDPC coded modulation hybrid decoding can decode an LDPC-BICM (Low Density Parity Check-Bit Interleaved Coded Modulation) signal having a symbol mapped using non-Gray code mapping. By using the non-Gray code mapping, a performance improvement is achieved over an only Gray code mapping system.

A DVB-H bit-interleave coded modulation/demodulation system and method includes a convolutional encoder; an interleaver operatively connected to the convolutional encoder; a quadrature amplitude modulation (QAM) mapper operatively connected to the interleaver; a channel component operatively connected to the QAM mapper; a QAM demapper operatively connected to the channel component; a de-interleaver operatively connected to the QAM demapper; and a Viterbi decoder operatively connected to the de-interleaver. Preferably, the interleaver comprises a bit-wise interleaver and a symbol-wise interleaver operatively connected to the bit-wise interleaver. Preferably, the de-interleaver comprises a bit-wise de-interleaver; and a symbol-wise de-interleaver operatively connected to the bit-wise de-interleaver. The de-interleaver may be adapted to decode a soft decision metric for any of a QPSK, 16 QAM, and 64 QAM modulation. The de-interleaver may be adapted to decode a soft decision metric computation comprising a log-likelihood ratio soft decision metric of a binary bit stream of a signal.