43results about "Error correction/detection using concatenated codes" patented technology

Systems, devices, and methods for encoding information bits for storage, including obtaining information bits; encoding the information bits using an inner code to obtain a plurality of inner code words; encoding the plurality of inner code words using an outer code to generate an outer code word; and storing the outer code word in a storage device, wherein at least one of the inner code and the outer code includes a generalized concatenated code (GCC), and wherein the outer code word includes a hierarchical-GCC (H-GCC) code word.

The present disclosure relates to a system and a method for processing data in control channels. The system provides control data including a plurality of bits from the control channels to a cyclic redundancy check (CRC) block. The system determines if the plurality of bits corresponds to broadcast channel (BCH) data or downlink control information (DCI) data, and interleaves the plurality of bits if the plurality of bits corresponds to the BCH data, or bypasses interleaving of the plurality of bits if the plurality of bits corresponds to the DCI data. The system performs rate matching of the plurality of bits, and determines a length of a plurality of rate matched bits by setting an aggregation level for the control channels. The system performs scrambling operation on the plurality of rate matched bits, and modulates the plurality of rate matched bits based on scrambling operation outputs.

Acceleration of S-polarized ECC throughput by a scheduler is disclosed. A method of simplified successive cancellation list (SSCL) error decoding of an S-polar code includes representing an S-polar code as a perfect binary tree; providing a node v with a soft information vector from a parent node of v to compute a soft information vector for a left child node of v; providing v with a hard decision vector from the left child node and using it with to create a soft information vector and pass it to a right child node of v; providing v with a hard decision vector from its right child node and using it with to create a hard decision vector β v and pass it to its parent node; when v is an i-th leaf node of the perfect tree, updating two path metrics and selecting a path obtained by extending a current path by the lowest path metric.

Communication systems and methods are disclosed involving the transmission and reception of short block-length messages. In many embodiments, transmitters are utilized that encode messages by combing: at least a first partial codeword generated using a first encoder based upon a first convolutional code and a first expurgating linear function; and a second partial codeword generated by a second encoder based upon a second convolutional code and a second expurgating linear function. In a number of embodiments, receivers are utilized that decode received messages using a full decoder that reconstructs the transmitted message bits based upon: at least a first set of partial codewords produced by a first partial decoder based upon the first convolutional code and the first expurgating linear function; and a second set of partial codewords generated by a second partial decoder based upon the second convolutional code and the second expurgating linear function.

This application discloses a physical layer data transmission method, apparatus, system, and device, and a chip. In the method, after obtaining first data, a first device processes the first data based on a current operation mode, to obtain second data. The current operation mode indicates whether to perform FEC bypass, and the current operation mode is determined based on capabilities of the first device and a second device. Then, the first device sends the second data to the second device. According to the method provided in this application, a requirement of using FEC in a long-distance data transmission scenario can be supported, and a requirement of not using FEC in a low-latency data transmission scenario can also be supported, ensuring reliability of data transmission in different scenarios.

This application discloses a data processing method and a data processing apparatus. First data processing is performed on multiple first data streams encoded with a first FEC to obtain m second data streams. Each second data stream undergoes second FEC encoding, and each codeword after second FEC encoding includes N bits, where N = K + S, K represents the number of information bits, and S represents the number of parity bits. Second data processing is performed on each of the m second data streams to obtain m third data streams. Each third data stream includes at least one bit sequence, each bit sequence including P + W bits, where P bits in each bit sequence come from the second data streams, and W bits in each bit sequence are added alignment markers, where P = N × b. Third data processing is performed on the m third data streams to obtain Y modulation symbol streams, each modulation symbol stream being modulated, and the baud rate value of each modulation symbol stream being an integer multiple of the typical Ethernet reference clock frequency value.

Communication systems and methods are disclosed involving the transmission and reception of short block-length messages. In many embodiments, transmitters are utilized that encode messages by combing: at least a first partial codeword generated using a first encoder based upon a first convolutional code and a first expurgating linear function: and a second partial codeword generated by a second encoder based upon a second convolutional code and a second expurgating linear function. In a number of embodiments, receivers are utilized that decode received messages using a full decoder that reconstructs the transmitted message bits based upon: at least a first set of partial codewords produced by a first partial decoder based upon the first convolutional code and the first expurgating linear function; and a second set of partial codewords generated by a second partial decoder based upon, the second convolutional code and the second expurgating linear function.

An apparatus configured to apply a convolutional precoder with a time-varying polynomial to an information vector to generate a precoded vector, wherein coefficients of the time-varying polynomial are generated by a pseudo-random number generator (PRNG) using a radio network temporary identifier (RNTI) as an initialization seed, generate a polarization-adjusted convolution (PAC) codeword based on the precoded vector and transmit the PAC codeword.

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. Embodiments herein disclose methods and systems for parallelizing operations for decoding polar codes and reducing the latency, complexity, and power consumption in the domain of channel coding for beyond 5G networks. Embodiments herein disclose methods and systems for identifying the right number of decoding variables selected from a plurality of pre-defined discrete decoding variables for an Error Correcting Code (ECC) before the decoding process starts, where the method helps in saving significant amount of power.

Streams of data encoded by a plurality of OFEC encoders are merged and allocated among a plurality of optical subcarriers of an optical communication system having two polarization channels. Methods and apparatus are provided for performing the merging and allocating such that for each OFEC encoder of said OFEC encoder plurality, a same number of bits of encoded data is allocated to each subcarrier of the subcarrier plurality, and a same number of bits of encoded data is allocated to each of the two polarization channels.

Disclosed are an encoding method and apparatus, an electronic device and a storage medium, wherein same are used for solving the problem in the prior art of inflexibility of the segmentation of a sequence to be encoded. The method comprises: according to the length and a transmission code rate of a sequence to be encoded, determining the target number of segments of the sequence to be encoded; according to the target number, segmenting the sequence to be encoded; and encoding each sub-sequence after the segmentation, and cascading same after encoding. In the embodiments of the present application, according to the length and a transmission code rate of a sequence to be encoded, the target number of segments of the sequence to be encoded is determined, and according to the target number, the sequence to be encoded is segmented. The sequence to be encoded is flexibly segmented, thus improving the encoding performance.

To ensure good communication quality in data transmission using LDPC codes. [Solution] In group-wise interleaving, an LDPC code with a code length N of 69120 bits is interleaved in units of 360-bit bit groups, with the (i+1)th bit group from the beginning of the LDPC code being bit group i, and the arrangement of bit groups 0 to 191 of the 69120-bit LDPC code being interleaved in a predetermined order. In group-wise deinterleaving, the arrangement of the LDPC code after group-wise interleaving is restored to its original order. This technology can be applied, for example, to data transmission using LDPC codes.

This application discloses a data processing method and a data processing apparatus. First data processing is performed on a plurality of first data streams obtained through first FEC encoding, to obtain m second data streams. Second FEC encoding has been performed for each of the second data streams, and each codeword obtained through the second FEC encoding includes N bits, where N=K+S, K represents a quantity of information bits, and S represents a quantity of parity bits. Second data processing is separately performed on the m second data streams to obtain m third data streams. Each of the third data streams includes at least one bit sequence, each bit sequence includes P+W bits, the P bits in each bit sequence are from the second data stream, and the W bits in each bit sequence are an added alignment marker, where P=N×b. Third data processing is performed on the m third data streams to obtain Y modulated symbol streams, where modulation has been performed for each of the modulated symbol streams, and a value of a baud rate of each of the modulated symbol streams is an integer multiple of a value of an Ethernet common reference clock frequency.

Embodiments of this application disclose a data processing method and a data processing apparatus. The method is specifically as follows: separately performing inner-code encoding on n first data streams to obtain n second data streams, where the n second data streams include n inner-code codewords from the n second data streams, the n inner-code codewords include n / m codeword sets, each of the codeword sets includes m inner-code codewords, and each of the inner-code codewords includes N bits; separately performing bit interleaving on the n / m codeword sets to obtain n / m target bit sets; and separately mapping m×N bits in each of the target bit sets to obtain m×N / L modulation symbols, to obtain a total of n×N / L modulation symbols, where every L bits are mapped to one modulation symbol, and the L bits in the modulation symbol are from L inner-code codewords, where if the L bits in the modulation symbol are all from information bits in the inner-code codewords, any two bits in the modulation symbol are from two different locations in two different inner-code codewords.

To provide a method and an apparatus for encoding and decoding of data using concatenated polarization adjusted convolutional codes.SOLUTION: An encoder receives a concatenated encoder input block d, splits d into an outer code input array a, and encodes a using outer codes to generate an output array b. The encoder generates, from b, a concatenated code output array x using a layered polarization adjusted convolutional code. A decoder 106 counts the number of layers and carries out an inner decoding operation for a layered polarization adjusted convolutional code to generate an inner decoder decision b∼i from a concatenated decoder input array y and a cumulative decision feedback (b^1, b^2 to b^i-1). The decoder carries out an outer decoding operation to generate from b∼i an outer decoder decision a^i, and carries out a reencoding operation to generate a decision feedback b^i from a^i, where the number of layers is an integer greater than two, with a concatenated decoder output block d^ being generated from outer decoder decisions.SELECTED DRAWING: Figure 1

Communication systems and methods are disclosed involving the transmission and reception of short block-length messages. In many embodiments, transmitters are utilized that encode messages by combing: at least a first partial codeword generated using a first encoder based upon a first convolutional code and a first expurgating linear function; and a second partial codeword generated by a second encoder based upon a second convolutional code and a second expurgating linear function. In a number of embodiments, receivers are utilized that decode received messages using a full decoder that reconstructs the transmitted message bits based upon: at least a first set of partial codewords produced by a first partial decoder based upon the first convolutional code and the first expurgating linear function; and a second set of partial codewords generated by a second partial decoder based upon the second convolutional code and the second expurgating linear function.

The invention discloses a data processing method and a data processing device. And performing first data processing on the plurality of first data streams subjected to the first FEC coding to obtain m second data streams. Wherein each second data stream is subjected to second FEC coding, each code word after second FEC coding comprises N bits, N = K + S, K represents the number of information bits, and S represents the number of check bits. And performing second data processing on the m second data streams to obtain m third data streams. Wherein each third data stream comprises at least one bit sequence, each bit sequence comprises P + W bits, P bits in each bit sequence are from the second data stream, W bits in each bit sequence are added alignment identifiers, and P = N * b. Third data processing is carried out on the m third data streams to obtain Y modulation symbol streams, each modulation symbol stream is modulated, and the Baud rate value of each modulation symbol stream is integer multiples of the typical reference clock frequency value of the Ethernet.

This application discloses a data processing method and a data processing apparatus. First data processing is performed on a plurality of first data streams obtained through first FEC encoding, to obtain m second data streams. Second FEC encoding has been performed for each of the second data streams, and each codeword obtained through the second FEC encoding includes N bits, where N=K+S, K represents a quantity of information bits, and S represents a quantity of parity bits. Second data processing is separately performed on the m second data streams to obtain m third data streams. Each of the third data streams includes at least one bit sequence, each bit sequence includes P+W bits, the P bits in each bit sequence are from the second data stream, and the W bits in each bit sequence are an added alignment marker, where P=N×b. Third data processing is performed on the m third data streams to obtain Y modulated symbol streams, where modulation has been performed for each of the modulated symbol streams, and a value of a baud rate of each of the modulated symbol streams is an integer multiple of a value of an Ethernet common reference clock frequency.

The present invention relates to a capacity-approaching multicarrier modulation and coding system and method. A multicarrier transmitter apparatus is disclosed. The apparatus includes an outer encoder, a shell mapper, and an inner encoder. The outer encoder is configured to receive a signal, perform error correction on the received signal using an outer code, and generate an outer encoder signal. The shell mapper is configured to perform constellation shaping on a subset of bits from the outer encoder signal and generate one or more constellation-shaped bits. The inner encoder is configured to perform inner error correction / coding on a second subset of bits from the outer encoder signal using the inner code and generate an inner correction signal.

A method for soft decoding of a generalized Reed-Solomon (RS) error correction code includes: receiving a codeword through a digital electronic communication channel; verifying an HD error and an erasure decoding has failed; a Groebner base in charge of a fixed erasure set is found out; constructing a Chase decoding tree and a GMD decoding tree on the Chase coordinate set and the GMD coordinate set; traversing the decoding tree using the polynomial of the Groebner base as a base representing an updated coefficient polynomial on the Chase and GMD decoding tree; updating the polynomial on the decode tree using a root step of flipping the edge and a derivative step or a root step of erasing the edge; calculating an error position by performing polynomial evaluation on candidate polynomials from the decoding tree, and calculating an error value by using a Forne equation; and correcting the received codeword according to the calculated error position and the calculated error value.

The data processing method includes the steps of separately performing inner code encoding on n first data streams to obtain n second data streams, where the n second data streams include n inner code codewords from the n second data streams, the n inner code codewords include n / m codeword sets, each of the codeword sets includes m inner code codewords, and each of the inner code codewords includes N bits; separately performing bit interleaving on the n / m codeword sets to obtain n / m target bit sets; separately mapping m×N bits in each of the target bit sets to obtain m×N / L modulation symbols, and obtaining a total of n×N / L modulation symbols, where each L bits are mapped to one modulation symbol, the L bits in the modulation symbol are from L inner code codewords, and when the L bits in the modulation symbol are all from the information bits in the inner code codewords.

A joint de-mapping and decoding method and apparatus, a decoder, an integrated circuit, a device, and equipment, applied to the technical field of digital signal processing. A received symbol comprising a plurality of components is first acquired, wherein each component of the received symbol is jointly determined by a plurality of encoded bits involved in symbol mapping; when state transition is performed during a decoding process, a likelihood value of each symbol value is computed on the basis of the value of the received symbol, and branch metrics of each state transition branch is obtained on the basis of the likelihood values.

Various aspects of the present disclosure generally relate to wireless communications. In some aspects, a transmitting device may obtain a plurality of packet data convergence protocol (PDCP) packets. The transmitting device may generate an external coding block according to assembling the plurality of PDCP packets. The transmitting device may divide the external coding block into a plurality of external coding symbols according to an external coding symbol size. The transmitting device may apply forward error correction coding to the external coding block. The transmitting device may transmit the plurality of external coded symbols according to applying the forward error correction coding to the external coded block. Zero padding is applied to at least one of the outer coded block or the plurality of outer coded symbols based on a difference between a PDCP packet size associated with the plurality of PDCP packets and an outer coded symbol size associated with the plurality of outer coded symbols.

A joint de-mapping and decoding method and apparatus, a decoder, an integrated circuit, a device, and equipment, applied to the technical field of digital signal processing. A received symbol comprising a plurality of components is first acquired, wherein each component of the received symbol is jointly determined by a plurality of encoded bits involved in symbol mapping; when state transition is performed during a decoding process, a likelihood value of each symbol value is computed on the basis of the value of the received symbol, and branch metrics of each state transition branch is obtained on the basis of the likelihood values.

The invention discloses a data processing method and a data processing device. And performing first data processing on the plurality of first data streams subjected to the first FEC coding to obtain m second data streams. Wherein each second data stream is subjected to second FEC coding, each code word after second FEC coding comprises N bits, N = K + S, K represents the number of information bits, and S represents the number of check bits. And performing second data processing on the m second data streams to obtain m third data streams. Wherein each third data stream comprises at least one bit sequence, each bit sequence comprises P + W bits, P bits in each bit sequence are from the second data stream, W bits in each bit sequence are added alignment identifiers, and P = N * b. Third data processing is carried out on the m third data streams to obtain Y modulation symbol streams, each modulation symbol stream is modulated, and the Baud rate value of each modulation symbol stream is integer multiples of the typical reference clock frequency value of the Ethernet.

The present application discloses a data processing method. First data processing is performed on a plurality of first data streams obtained through first FEC encoding to obtain m second data streams. Second FEC encoding is performed on each of the second data streams, and each codeword obtained through the second FEC encoding includes N bits, where N=K+S. Second data processing is performed separately on m second data streams to obtain m third data streams. Each of the third data streams includes at least one bit sequence, each bit sequence including P+W bits, where P bits in each bit sequence are from the second data stream and W bits in each bit sequence are added alignment markers, where P=N×b. Third data processing is performed on the m third data streams to obtain Y modulated symbol streams, and modulation is performed on each modulated symbol stream.

Methods, systems, and devices for wireless communication are described. The described techniques provide for a device to generate, using a first decoder of the device, a first set of shaping bits associated with a first subset of information bits. The device may generate, using a second decoder of the first device, a second set of shaping bits based at least in part on a first set of concatenated bits. The first set of concatenated bits may include the first set of shaping bits and a second subset of the information bits. The device may apply mask vectors to the first subset of the information bits to obtain a first set of shaped bits and a second set of shaped bits. The device may transmit, based on applying the mask vectors, a message including the first set of shaped bits and the second set of shaped bits.

A flit decoder includes an error correction code (ECC) decoder that generates an ECC decoded packet fragment based on a packet fragment, an interleaver circuit that generates an interleaved packet based on the ECC decoded packet fragment, a cyclic redundancy check (CRC) decoder that generates an enable signal in response to a failure of a CRC decoding operation of the interleaved packet, a reliability calculator that generates bit stream information for identifying first to N-th error-estimated symbols of the packet fragment, and a post decoder. The post decoder generates first to N-th index values corresponding to the first to N-th error-estimated symbols, respectively, generates first to M-th candidate information indicating two combined of the first to N-th index values, generates first to M-th erasure decoded packet fragments, and provides a selected one of the first to M-th erasure decoded packet fragments to the interleaver circuit.

The present technology relates to a transmission device, a transmission method, a reception device, and a reception method with which it is possible to ensure good communication quality when using an LDPC code to transmit data. In group-wise interleaving in which an LDPC code having a code length N of 69120 bits is interleaved in units of bit groups of 360 bits, the order of bit groups 0 to 191 of the LDPC code of 69120 bits is interleaved to a prescribed order, with the i+1-th bit group from the start of the LDPC code being bit group i. In group-wise de-interleaving, the group-wise interleaved LDPC code is restored to the original ordering thereof. The present technology can be used for data transmission using an LDPC code, for example.

Aspects of block structure design for ambient device coding are described. In some examples, an ambient device may add a cyclic redundancy check to a code block to obtain a plurality of input bits. The ambient device may encode, via a FM0 encoder or a Miller modulated subcarriers (MMS) encoder, the plurality of input bits to generate a plurality of output bits, where the plurality of output bits comprise a plurality of extra bits. The FM0 encoder or the MMS encoder may be associated with a trellis having a constraint length of at least two. The ambient device may modulate the encoded plurality of output bits as On-Off Keying transitions on a signal, and the ambient device may transmit the signal on a backscatter wave.