15results about "Error correction/detection using concatenated codes" patented technology

Acceleration of S-polarized ECC throughput by a scheduler is disclosed. A method of simplified successive cancellation list (SSCL) error decoding of an S-polar code includes representing an S-polar code as a perfect binary tree; providing a node v with a soft information vector from a parent node of v to compute a soft information vector for a left child node of v; providing v with a hard decision vector from the left child node and using it with to create a soft information vector and pass it to a right child node of v; providing v with a hard decision vector from its right child node and using it with to create a hard decision vector β v and pass it to its parent node; when v is an i-th leaf node of the perfect tree, updating two path metrics and selecting a path obtained by extending a current path by the lowest path metric.

This application discloses a data processing method and a data processing apparatus. First data processing is performed on multiple first data streams encoded with a first FEC to obtain m second data streams. Each second data stream undergoes second FEC encoding, and each codeword after second FEC encoding includes N bits, where N = K + S, K represents the number of information bits, and S represents the number of parity bits. Second data processing is performed on each of the m second data streams to obtain m third data streams. Each third data stream includes at least one bit sequence, each bit sequence including P + W bits, where P bits in each bit sequence come from the second data streams, and W bits in each bit sequence are added alignment markers, where P = N × b. Third data processing is performed on the m third data streams to obtain Y modulation symbol streams, each modulation symbol stream being modulated, and the baud rate value of each modulation symbol stream being an integer multiple of the typical Ethernet reference clock frequency value.

An apparatus configured to apply a convolutional precoder with a time-varying polynomial to an information vector to generate a precoded vector, wherein coefficients of the time-varying polynomial are generated by a pseudo-random number generator (PRNG) using a radio network temporary identifier (RNTI) as an initialization seed, generate a polarization-adjusted convolution (PAC) codeword based on the precoded vector and transmit the PAC codeword.

Streams of data encoded by a plurality of OFEC encoders are merged and allocated among a plurality of optical subcarriers of an optical communication system having two polarization channels. Methods and apparatus are provided for performing the merging and allocating such that for each OFEC encoder of said OFEC encoder plurality, a same number of bits of encoded data is allocated to each subcarrier of the subcarrier plurality, and a same number of bits of encoded data is allocated to each of the two polarization channels.

To ensure good communication quality in data transmission using LDPC codes. [Solution] In group-wise interleaving, an LDPC code with a code length N of 69120 bits is interleaved in units of 360-bit bit groups, with the (i+1)th bit group from the beginning of the LDPC code being bit group i, and the arrangement of bit groups 0 to 191 of the 69120-bit LDPC code being interleaved in a predetermined order. In group-wise deinterleaving, the arrangement of the LDPC code after group-wise interleaving is restored to its original order. This technology can be applied, for example, to data transmission using LDPC codes.

This application discloses a data processing method and a data processing apparatus. First data processing is performed on a plurality of first data streams obtained through first FEC encoding, to obtain m second data streams. Second FEC encoding has been performed for each of the second data streams, and each codeword obtained through the second FEC encoding includes N bits, where N=K+S, K represents a quantity of information bits, and S represents a quantity of parity bits. Second data processing is separately performed on the m second data streams to obtain m third data streams. Each of the third data streams includes at least one bit sequence, each bit sequence includes P+W bits, the P bits in each bit sequence are from the second data stream, and the W bits in each bit sequence are an added alignment marker, where P=N×b. Third data processing is performed on the m third data streams to obtain Y modulated symbol streams, where modulation has been performed for each of the modulated symbol streams, and a value of a baud rate of each of the modulated symbol streams is an integer multiple of a value of an Ethernet common reference clock frequency.

Various aspects of the present disclosure generally relate to wireless communications. In some aspects, a transmitting device may obtain a plurality of packet data convergence protocol (PDCP) packets. The transmitting device may generate an external coding block according to assembling the plurality of PDCP packets. The transmitting device may divide the external coding block into a plurality of external coding symbols according to an external coding symbol size. The transmitting device may apply forward error correction coding to the external coding block. The transmitting device may transmit the plurality of external coded symbols according to applying the forward error correction coding to the external coded block. Zero padding is applied to at least one of the outer coded block or the plurality of outer coded symbols based on a difference between a PDCP packet size associated with the plurality of PDCP packets and an outer coded symbol size associated with the plurality of outer coded symbols.

A joint de-mapping and decoding method and apparatus, a decoder, an integrated circuit, a device, and equipment, applied to the technical field of digital signal processing. A received symbol comprising a plurality of components is first acquired, wherein each component of the received symbol is jointly determined by a plurality of encoded bits involved in symbol mapping; when state transition is performed during a decoding process, a likelihood value of each symbol value is computed on the basis of the value of the received symbol, and branch metrics of each state transition branch is obtained on the basis of the likelihood values.

Methods, systems, and devices for wireless communication are described. The described techniques provide for a device to generate, using a first decoder of the device, a first set of shaping bits associated with a first subset of information bits. The device may generate, using a second decoder of the first device, a second set of shaping bits based at least in part on a first set of concatenated bits. The first set of concatenated bits may include the first set of shaping bits and a second subset of the information bits. The device may apply mask vectors to the first subset of the information bits to obtain a first set of shaped bits and a second set of shaped bits. The device may transmit, based on applying the mask vectors, a message including the first set of shaped bits and the second set of shaped bits.

A flit decoder includes an error correction code (ECC) decoder that generates an ECC decoded packet fragment based on a packet fragment, an interleaver circuit that generates an interleaved packet based on the ECC decoded packet fragment, a cyclic redundancy check (CRC) decoder that generates an enable signal in response to a failure of a CRC decoding operation of the interleaved packet, a reliability calculator that generates bit stream information for identifying first to N-th error-estimated symbols of the packet fragment, and a post decoder. The post decoder generates first to N-th index values corresponding to the first to N-th error-estimated symbols, respectively, generates first to M-th candidate information indicating two combined of the first to N-th index values, generates first to M-th erasure decoded packet fragments, and provides a selected one of the first to M-th erasure decoded packet fragments to the interleaver circuit.

Aspects of block structure design for ambient device coding are described. In some examples, an ambient device may add a cyclic redundancy check to a code block to obtain a plurality of input bits. The ambient device may encode, via a FM0 encoder or a Miller modulated subcarriers (MMS) encoder, the plurality of input bits to generate a plurality of output bits, where the plurality of output bits comprise a plurality of extra bits. The FM0 encoder or the MMS encoder may be associated with a trellis having a constraint length of at least two. The ambient device may modulate the encoded plurality of output bits as On-Off Keying transitions on a signal, and the ambient device may transmit the signal on a backscatter wave.

The present disclosure relates to a system and a method for processing data in control channels. The system provides control data including a plurality of bits from the control channels to a cyclic redundancy check (CRC) block. The system determines if the plurality of bits corresponds to broadcast channel (BCH) data or downlink control information (DCI) data, and interleaves the plurality of bits if the plurality of bits corresponds to the BCH data, or bypasses interleaving of the plurality of bits if the plurality of bits corresponds to the DCI data. The system performs rate matching of the plurality of bits, and determines a length of a plurality of rate matched bits by setting an aggregation level for the control channels. The system performs scrambling operation on the plurality of rate matched bits, and modulates the plurality of rate matched bits based on scrambling operation outputs.

This application discloses a physical layer data transmission method, apparatus, system, and device, and a chip, and belongs to the field of communication technologies. In the method, after obtaining first data, a first device processes the first data based on a current operation mode, to obtain second data. The current operation mode indicates whether to perform FEC bypass, and the current operation mode is determined based on capabilities of the first device and a second device. Then, the first device sends the second data to the second device. According to the method provided in this application, in a physical layer data transmission process, whether to perform FEC bypass may be properly determined based on the current operation mode. In this way, a requirement of using FEC in a long-distance data transmission scenario can be supported, and a requirement of not using FEC in a low-latency data transmission scenario can also be supported, ensuring reliability of data transmission in different scenarios.

Systems, devices, and methods for encoding information bits for storage, including obtaining information bits and a target constraints vector, placing the information bits in an input vector, setting balance bits included in the input vector to zero, encoding the input vector using a systematic code to obtain a preliminary codeword, applying a constraints matrix to the preliminary codeword to obtain a preliminary constraints vector, applying a transition matrix to a sum of the preliminary constraints vector and the target constraints vector to determine updated balance bits, obtaining an output codeword based on the information bits and the updated balance bits, and storing the output codeword in the storage device.

Streams of data encoded by a plurality of OFEC encoders are merged and allocated among a plurality of optical subcarriers of an optical communication system having two polarization channels. Methods and apparatus are provided for performing the merging and allocating such that for each OFEC encoder of said OFEC encoder plurality, a same number of bits of encoded data is allocated to each subcarrier of the subcarrier plurality, and a same number of bits of encoded data is allocated to each of the two polarization channels.