662 results about "Check digit" patented technology

The invention relates to the technical field of data encryption, and discloses a data encryption protection system and method for intelligent controller hardware, and the method comprises the steps: generating a random confusion factor based on a real-time operation state through constructing a dynamic confusion algorithm, and carrying out the nonlinear transformation of original data; implementing a fragment encryption strategy, dividing fragments according to data sensitivity levels, and adopting a heterogeneous encryption algorithm; generating a dynamic binding key in combination with the environment parameters and the hardware unique identifier; hardware-level integrity check is executed, and data and hardware are verified through cyclic redundancy check codes and hardware fingerprints; establishing a self-adaptive key updating mechanism; performing multi-layer defense linkage; and implementing anti-side channel protection, and constructing a security audit log. According to the method, the hardware data security of the intelligent controller is comprehensively guaranteed, various security threats are effectively resisted, and the data confidentiality, integrity and availability are improved.

The invention discloses a data slice recombination order-preserving method based on a Beidou short message, which relates to the technical field of data transmission and recombination optimization, and ensures the stability and low error rate of data in the transmission process by dynamically optimizing the size and quantity of slices according to channel bandwidth and delay through a self-adaptive slice adjustment mechanism. A unique serial number identifier and a first check code attached to each fragment are beneficial to identifying data under a complex channel condition, and errors and chaos in a recombination process are reduced. At a receiving end, a conflict analysis model is constructed by analyzing sequence offset and delay conditions of fragment arrival in real time, and a multi-layer correction instruction is provided according to an overall conflict rate and a time sequence consistency coefficient. The order-preserving mechanism ensures that the original order of the data can be maintained even in a complex network environment by preferentially processing the unlocked fragment and generating a retransmission instruction of the lost fragment. The combination of dynamic priority adjustment and a retransmission mechanism promotes the structure of the original data after recombination.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 3 / 4, a second parity check matrix corresponding to a first exponent matrix comprising 576 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

The embodiment of the invention provides a data processing method and device, electronic equipment and a storage medium, is suitable for a processor comprising a first integrated circuit unit and a second integrated circuit unit, and comprises the following steps: acquiring to-be-transmitted data and providing the to-be-transmitted data to the first integrated circuit unit; the verification information of the data to be transmitted is generated, the verification information comprises state information of a forward error correction code, data information of the forward error correction code and state information of cyclic redundancy check, and the data information of the forward error correction code and error data in the data to be transmitted have a corresponding relation; and sending the verification information and the to-be-transmitted data to the second integrated circuit unit, so that the second integrated circuit unit sends the to-be-transmitted data to the second integrated circuit unit under the condition that the state information of the forward error correction code is error-free or correctable error and the state information of the cyclic redundancy check is error-free. And a correct cyclic redundancy check code is calculated based on the received data to be transmitted and the data information of the forward error correction code, so that efficient data transmission is realized.

The invention discloses a project side end data fragmentation recombination and service breakpoint resuming method in a weak network environment, and the method comprises the steps: receiving original service data collected on site through a project side end, carrying out the fragmentation according to the division of a construction region and a time interval, and generating a fragmentation data package with a time-space identifier and a check code; verifying the received fragmented data packet, and generating a fragmented cache set with a processing progress; when all fragments of a certain region-time fragment in the fragment cache set are received, the preprocessing progress of the corresponding service is read from the persistent file, and remaining service processing continues to be executed from the progress interruption position; and integrating the recombined original data of each region-time slice, the business processing result, the breakpoint resume record and the fragment transmission log, and generating a business data file containing a complete data chain and a processing track. By utilizing the embodiment of the invention, the data transmission efficiency and the service continuity in a weak network environment can be improved, and the reliability requirement of a project side end scene is met.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 5 / 6, a second parity check matrix corresponding to a first exponent matrix comprising 384 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

The invention discloses an OBD tamper-proof two-way verification method, which comprises the steps of obtaining OBD equipment data and vehicle sensor data, registering to a cloud end based on the OBD equipment data, obtaining registration data, obtaining key data and non-key data according to the vehicle sensor data, symmetrically encrypting the key data by using a session key in the registration data, and verifying the key data and the non-key data. Performing approximate homomorphic encryption on the non-key data, obtaining a double-entropy source dynamic salt value according to the time entropy of the ciphertext and the OBD equipment operation entropy, reversely reconstructing the dynamic salt value by the cloud according to the timestamp and the registration data, verifying the ciphertext structure by using the dynamic salt value and generating a random challenge containing a salt value check code, and sending the random challenge to the cloud; the equipment verification result and the challenge value are signed and then transmitted back, the OBD equipment carries out reverse verification on the salt value according to the signature and the equipment verification result, and the cloud generates an authority token based on the reverse verification result. According to the method, the data authenticity and integrity of the diagnostic equipment are guaranteed through packet encryption, dynamic salt value generation and bidirectional identity verification of transmission data.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 2 / 3, a second parity check matrix corresponding to a first exponent matrix comprising 768 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

The invention discloses a high-speed camera data self-adaptive two-stage caching system and method and a storage medium, and relates to the technical field of machine vision high-speed imaging and high-speed data storage, a preprocessing unit is used for performing deserialization and parallel connection, ROI cutting and gain adjustment on collected item number data, and writing incremental FrameID and cyclic redundancy check codes into each frame; the DDR annular cache unit comprises a monitoring module, a decision module and an execution module; the decision module is used for calculating an instantaneous cache demand Cnew and a dynamic cache occupancy U; the execution module expands and shrinks an annular buffer space in a single shot through a DDR4 controller, and outputs a Hi / Lo mark in real time through an occupancy rate comparator to drive an NVMe queue manager. According to the invention, on the premise of zero extra burden in a normal working condition, millisecond-level automatic capacity expansion and high-speed flood discharge can be realized in a sudden working condition, and real-time frame-level integrity verification can be completed on a local FPGA (Field Programmable Gate Array) side. The patent is subsidized by national key research and development plans, and the project number is 2023YFF0719700.

An apparatus may include a transmitter and one or more processors. The one or more processors may identify, based on a first parity check matrix of a first quasi-cyclic-low-density parity-check (QC-LDPC) code according to a code rate of 1 / 2, a second parity check matrix corresponding to a first exponent matrix comprising 1152 values for a second QC-LDPC code. The second QC-LDPC code may have a code block size that is twice a code block size of the first QC-LDPC code. The one or more processors may encode data using the second parity check matrix. The transmitter may be configured to transmit the encoded data.

The invention provides a method, system and device for data encryption transmission between isolation networks based on a two-dimensional code and a medium, and belongs to the technical field of data transmission. The method comprises the steps that a form needing to be transmitted is acquired from an intranet, and key fields are extracted; converting the primary key field into a short code by using a mapping table, splicing the short code with the basic field and the service field, and adding a check code to obtain source data; after encrypting and encoding the source data, converting the source data into a two-dimensional code, and transmitting the two-dimensional code to an external network system through a physical medium; scanning the two-dimensional code by using a terminal device in an extranet, decoding and decrypting the two-dimensional code, and then splitting the two-dimensional code to obtain a short code, a basic field, a service field and a check code; and performing data verification by using the verification code, restoring the short code into the main key field by using the mapping table after the verification is passed, and restoring the original form according to the main key field, the basic field and the service field. According to the invention, a complete process from internal network data extraction to external network data restoration is realized based on the two-dimensional code.

The invention discloses a data management method and device, electronic equipment and a medium, and the method comprises the steps: responding to obtained transmission data of first equipment, extracting the transmission data, and obtaining a check code and equipment information; when it is confirmed that the transmission data is qualified according to the check code, desensitizing the transmission data, and determining an encryption confidentiality level mode corresponding to the transmission data according to the equipment type indicated by the equipment information; according to an encryption method corresponding to the confidentiality level, encrypting the desensitized transmission data by adopting an encryption mode to obtain encrypted data; performing desensitization processing and identification processing on the encrypted data to obtain encrypted identification data after desensitization processing; and storing the encrypted data identification data after the desensitization processing to a target storage area. The method can be applied to the business fields of financial science and technology, medical health, old-age care and the like, the overall data safety is improved, privacy protection of sensitive information is increased, meanwhile, the data management and tracing capacity is improved, and balance between safety and performance is achieved.

The invention discloses a safety inter-core communication method based on derived key negotiation. The safety defect of a traditional inter-core communication scheme is overcome through a dynamic key negotiation mechanism. Based on a preset derived base key and a random salt value, a unique temporary session key is negotiated before each communication, and forward security is ensured: even if the derived base key is leaked, historical encrypted data still cannot be decoded; a bidirectional salt value check code verification mechanism is adopted, chip identity legality authentication is achieved in the negotiation stage, and forgery or tampering attacks are blocked; during communication, a data ciphertext check code is generated through a check key, and data integrity and source authenticity are guaranteed; it is ensured that the session key is unpredictable each time through the random salt value, and replay attacks are effectively resisted in combination with a timeliness verification mechanism. In addition, key re-negotiation is triggered according to data sensitivity, a key exposure time window is dynamically reduced, the risk of long-term key leakage is further reduced, and safety and resource efficiency are both considered.

In an aspect, digital communication coding methods (or simply coding methods) are provided, said methods comprising providing families of quasi-cyclic low-density parity check, LDPC, codes each represented by a single equation. Said single equation is derived from a geometry whose nature implies good error correcting properties for each of the LDPC codes and allows quasi-cyclic parity check matrices to be constructed for geometric LDPC codes of exceedingly long length, up to and exceeding four hundred thousand bits. The construction of such check matrices is not possible by any other known method. The LDPC codes have different lengths and different rates and the families of LDPC codes are provided with a guarantee of minimum distance. The geometric and quasi-cyclic properties of the LDPC codes allow low complexity decoding with very low frame error rates. Systems, computing systems and computer programs suitable to perform such coding methods are also provided.

The invention discloses a data error correction method and device based on low-density parity check, equipment and a medium, and relates to the technical field of data error correction, and the method comprises the steps: reading data to be corrected from a data memory, and carrying out the pre-verification of the data to be corrected and a verification matrix of a preset low-density parity check code, and obtaining a pre-verification result; based on the pre-verification result, determining a first error position set in a code word position set; performing bit flipping operation on code words indicated by the first error position set to complete pre-error correction; and inputting the code word after pre-error correction processing into a low density parity check decoder for decoding, outputting data after error correction, pre-detecting the error position of the code word, and performing bit flipping on the code word at the error position, thereby reducing the number of error bits entering LDPC decoding, and improving the decoding efficiency. Therefore, the number of error bits does not exceed the decoding capability limit of hard decoding, the probability that the system enters soft decoding is reduced, and the decoding throughput rate of the system is ensured.

The invention discloses a data acquisition method and system based on multiple protocols. The method comprises the following steps: acquiring data of a sensor; protocol identification and adaptation: identifying the type of a communication protocol used by the current data, and loading or calling a corresponding adaptation protocol after successful identification; timestamp synchronization processing: performing unified timestamp correction or supplement on the obtained original data; unified packaging protocol processing: packaging the data subjected to protocol adaptation and timestamp synchronization processing according to a unified structure; data encryption and integrity verification: performing encryption and compression processing on the acquired data according to configuration or a data sensitivity level, and calculating and adding a verification code to each frame of encapsulated data; data transmission: transmitting the packaged data to a processing server or a local recording module; data storage and management; the scheme has the characteristics of improving data synchronism, supporting multi-protocol integration and simplifying data storage and management.

The invention discloses a satellite Internet of Things distributed node parallel transmission acceleration method, which relates to the technical field of satellite Internet of Things, and comprises the following steps: dynamically fragmenting, splitting into N fragments according to a network load rate and a node state, adding a serial number, a check code and redundant information, and marking a head as {INJ}; the intelligent routing is used for distributing fragments to distributed nodes through a scoring function based on satellite ephemeris, node loads and link quality; dynamic path switching: monitoring link and node states, and switching to a better path when the performance does not reach the standard; fault-tolerant recombination is carried out, recombination is carried out according to sequence numbers, if missing fragments are few, erasure codes are used for recovery, and if missing fragments are more, local retransmission is carried out. Through parallel transmission, dynamic switching and fault-tolerant recombination, the transmission rate, throughput and robustness are improved, node loads are balanced, and the performance of the satellite Internet of Things is optimized.

The invention relates to the technical field of intelligent capacity expansion, in particular to an intelligent capacity expansion method and system for an enterprise-level solid state disk, and the method comprises the following steps: an I / O controller detects a newly accessed enterprise-level solid state disk and sets a total write-in amount threshold value; according to the method, the total write-in quantity threshold is set after the enterprise-level solid state disk is accessed, and the dynamic delay portrait is constructed in combination with the real-time delay data, so that the performance state of the target hard disk is precisely mastered in the capacity expansion process, and the logic data block and the check code are synchronously embedded in the data write-in stage; and an erasure code check block is synchronously generated in combination with a write-in voucher and written into a far-end address, so that a main and auxiliary path parallel write-in mechanism is realized. And comparing data consistency by reading main and auxiliary addresses, constructing an inconsistent item set, obtaining a corresponding physical region error log by relying on an NVMe interface, extracting an abnormal sector, and mapping to form an unstable physical region coordinate, so that the system has the capability of actively avoiding an unstable region.

The invention provides an automatic vehicle damage assessment method and system based on video segmentation in vehicle insurance claim settlement. The method comprises the following steps: constructing a chain hash and a digital signature by taking an accident video as input, and detecting secondary compression and frame pulling; a shared trunk and double-branch network is adopted to complete part damage segmentation, and optical flow and re-identification are combined to keep cross-frame consistency and refine a mask; under the calibration of a license plate, a hub and a marked line, a monocular depth and part curvature prior estimation recess depth and normal disturbance are fused; calculating quantitative indexes such as scratch length, scratch width, paint removal area, crack span and the like according to component topology, and performing grade evaluation; the evaluation result is mapped to a part BOM, man-hour and price library, replacement, repair and spraying schemes and cost details are automatically generated, a structured report containing key frame superposition and check codes is output, and video-level stable quantification, evidence traceability and automatic loss assessment are achieved.

The invention provides an FDP mode dynamic switching method and device of an SSD, computer equipment and a storage medium, and the method comprises the following steps: presetting a dynamic configuration table containing multi-mode parameters, and defining a physical block management rule by the dynamic configuration table; performing physical block resource initialization according to the dynamic configuration table, and generating an initial physical block index and a management structure matched with the current mode; in response to a mode switching instruction, based on a target mode parameter in the dynamic configuration table, cleaning user data and reconstructing a physical block index; updating a target mode identifier according to the reconstructed physical block index, and generating an encryption check code to verify a switching result; and based on a switching result, multiplexing the reconstructed physical block index to realize multi-mode cyclic switching. The technical problems that an existing FDP mode switching method of the SSD is complex in process, poor in fault tolerance and waste in resources are solved.

The invention relates to the technical field of intelligent power grids, and provides a remote software upgrading method for an intelligent electric energy meter, which comprises the following steps: S1, a server generates an upgrading package containing a version identifier, and transmits the upgrading package to the intelligent electric energy meter in a fragmented manner through a TLS encryption channel; s2, the intelligent electric energy meter doubly verifies the integrity of the upgrade package and the legality of the source through an SHA-256 check code and a digital signature, the upgrade package and the source legality are written into a backup storage area of the Flash memory after verification is passed, and a CRC write-in check value is recorded; s3, performing secondary verification on the upgrade package of the backup storage area, triggering restarting after verification is passed, and writing data of the backup area into the main partition in the restarting process; s4, if the main partition system is not started or the core function is abnormal within the set time, returning to an old version and generating a fault log containing a timestamp; through a dynamic subpackage strategy, differential upgrading, SHA256 verification, a watchdog mechanism and a fault log record, the upgrading efficiency and safety of the intelligent electric energy meter are remarkably improved, and the dynamic subpackage strategy dynamically adjusts the size of a data packet according to the network condition.

The embodiment of the invention provides a coding and decoding method and device and a storage medium, relates to the technical field of communication, and can reduce the storage space requirement of coding. The method comprises the steps that a parity check matrix is determined, the dimension of the parity check matrix is determined based on the dimension of a binary extension matrix, the binary extension matrix is obtained by hashing an index matrix based on a lifting factor, and the lifting factor is determined based on the order of a binary basic matrix, an information bit sequence and a non-binary low-density parity check code NB-LDPC code; and according to the parity check matrix or a generation matrix corresponding to the parity check matrix, performing NB-LDPC coding on the information bit sequence to obtain a coding sequence.

The invention provides a one-master multi-slave type high-speed serial communication and synchronous control method and system and a medium, and the method comprises the steps: firstly, resetting slave stations based on an initialization instruction, and sequentially transmitting equipment type query instructions based on a physical connection sequence, thereby completing the topology recognition of the slave stations; then, aggregated data frames are periodically constructed, a frame header is written into a master station status word, a frame body is formed by splicing slave station data packets according to a station number sequence, and a frame tail is a check code; and finally, the slave station analyzes the aggregated data frame based on the station number, executes the task, and feeds back a task execution result according to a physical inverted sequence. In addition, when a new slave station is accessed, the master station switches a status word and triggers the whole system to be reinitialized, and the new slave station is dynamically incorporated into the topology; according to the invention, the expansibility, the real-time performance and the reliability of multi-node synchronous control in an industrial scene are comprehensively improved.

The embodiment of the invention relates to the technical field of data transmission security detection, and provides a data transmission detection method and device, electronic equipment and a medium, and the method comprises the steps: receiving target data which is transmitted by a transmitting end and carries a first check code, and obtaining the character length of the first check code; when the character length of the first check code does not meet the integral multiple of the parallelism degree of a cyclic redundancy check algorithm, a preset method is adopted to verify the first check code, and the preset method is a method for carrying out data frame tail zero padding and then backspacing on the first check code; and carrying out transmission anomaly detection on the target data based on a verification result of the first check code. Therefore, processing delay is greatly reduced, resource occupation and power consumption are reduced, and cost is reduced.

The invention provides a controller, method and device for verifying stored data and a storage medium. The controller obtains a data writing instruction and a verification writing instruction; in response to the data writing instruction, writing the to-be-written data block into the first memory; in response to the write verification instruction, obtaining a to-be-read data block based on the read address; calculating a read address and a to-be-read data block to obtain a write check code; the to-be-read data block is a part of the to-be-written data block; obtaining a read verification instruction; in response to the read verification instruction, obtaining a read data block from the first memory based on the read address; calculating a read address and a read data block to obtain a read check code; and comparing the write check code with the read check code to obtain a comparison result. According to the technical scheme, whether the read data block is abnormal or not can be checked by calculating the read data block and the read address corresponding to the read data block, and therefore safe operation and performance of the ADAS chip are guaranteed.

The invention relates to a false comment detection method, belongs to the technical field of Internet information security, and mainly solves the problems of incomplete data acquisition, single feature modeling, slow model updating and rigid threshold judgment in the prior art. According to the method, comment text data are collected in real time through a distributed crawler system, non-language characters are filtered through a preprocessing module, the text length is standardized, and a three-dimensional feature set containing semantics, user behaviors and time-space association is extracted; a double-layer dynamic classification model is adopted for training; dividing a training set and a verification set based on a sliding time window, starting incremental learning and adjusting parameters of a full connection layer when the cosine similarity of new data and historical features is lower than 0.7, calculating weighted values of median and upper quartile in real time through a dynamic threshold module to judge abnormal comments, and generating a structured detection report with a hash check code. The method is suitable for real-time monitoring and risk management and control of online platform false comments, and the detection efficiency and accuracy are improved.

The invention belongs to the technical field of quantum communication, and particularly relates to a discrete variable quantum key distribution data coordination method and system based on a code rate adaptive multi-system LDPC code. Aiming at the defect of performance bottleneck of an existing discrete variable quantum key distribution system adopting a binary low-density parity check code in a long-distance and high-noise environment, the invention provides a discrete variable quantum key distribution data coordination method. The method comprises the following steps: preparing and transmitting a quantum state; screening data; error rate estimation and eavesdropping detection; data coordination based on symbol-level code rate adaptation and / or bit-level code rate adaptation; and confidentiality enhancement. According to the method disclosed by the invention, the construction and storage pressure of the system on error correction codes with different code rates is obviously reduced, the robustness of the system under a complex channel condition is enhanced, and efficient and unconditionally safe key distribution is ensured; the eavesdropping attack can be effectively resisted, and the communication security is ensured.

The invention discloses a distributed storage management method, an electronic device, a storage medium and a program product, and relates to the technical field of distributed storage. Cyclic redundancy check codes corresponding to data are written into metadata, the amount of metadata written into a distributed key value storage database is reduced, the performance of the distributed key value storage database is improved, and the reliability of the distributed key value storage database is improved. According to the method, the network transmission protocol is expanded, the metadata separation transmission mode is supported, the data logic block pointer and the independent metadata logic block pointer are supported when the distributed storage protocol access layer processes the read-write request, data copying of distributed storage is reduced through the metadata separation transmission mode, and the read-write performance is improved.

Disclosed are a data transmission method, system and device, a medium and a computer program product, relating to the technical field of communications, a sender device performing check code and error correction code encoding on a first data transmission unit, and performing position rearrangement on information symbols in a first preset number of first data transmission units by using a preset rearrangement function, the information symbols in the second data transmission units at least come from two first data transmission units in the transmission group, so that the receiver equipment performs symbol position recovery on the information symbols in the data transmission units by using a preset rearrangement function after receiving the data transmission units. The information symbols in different data transmission units are replaced, continuous transmission errors are dispersed to the multiple data transmission units, the capacity of the data transmission system for resisting continuous error data transmission errors is improved, and the data error correction capacity in data transmission is improved on the basis that the error correction calculation cost does not need to be increased.

The invention provides a dynamic coding and decoding negotiation method based on link state quality. The dynamic coding and decoding negotiation method comprises the following steps: grouping reference station RTCM data and determining the priority of the RTCM data according to the message ID of the RTCM data; based on the determined first strategy selection mode, the RTCM data is subjected to check code generation, character coding and encryption in sequence, and the strategy selection mode of the base station is synchronized to a strategy selection module of the moving station; after the moving station receives the data, decryption, character decoding and verification are sequentially carried out on the encrypted data based on the information synchronized by the strategy selection module; meanwhile, the moving station counts the packet loss rate and the verification failure rate of the RTCM data in real time; and adjusting the strategy selection mode of the next group of data according to the quality of the current link, the system load and the priority of the RTCM data until all grouped data are sent. According to the invention, a real-time closed loop is provided, and the link quality is evaluated more comprehensively.