Provided in the present application are a decoding method and apparatus, an encoding method and apparatus, and a
chip and a computing device. The decoding method comprises: a decoding apparatus acquiring a first matrix, and then decoding a first codeword vector on the basis of the first matrix to obtain a decoding result, wherein the first matrix is a 0-1 matrix in which elements in a second matrix are represented on a polynomial ring, the second matrix is a check matrix having r rows and n columns on a finite field 2q, a first polynomial corresponding to the polynomial ring is an
irreducible polynomial of a degree q on a binary field, and the number of "1"s in the first matrix is less than the number of "1"s in a 0-1
matrix representation of the second matrix; and the first codeword vector comprises k information symbols and r check symbols, where n=k+r, each symbol comprises q data units, and each data unit comprises at least one bit. The solution of the present application can effectively reduce the hardware implementation complexity and overheads of RS encoding and decoding.