50results about How to "Shorten the propagation path" patented technology

The invention discloses a light-emitting diode which comprises a substrate, a first semiconductor layer, an active layer and a second semiconductor layer, wherein the substrate has a first surface and a second surface which are opposite to each other, the first semiconductor, the active layer and the second semiconductor are sequentially stacked on the first surface of the substrate, a first electrode is electrically connected with the first semiconductor layer, a second electrode is electrically connected with the second semiconductor, and the second surface of the substrate is a light-emitting surface of the light-emitting diode. At least one surface of the substrate further comprises a plurality of three-dimensional nanometer structures which extend parallelly, each three-dimensional nanometer structure comprises a first protruding edge and a second protruding edge which extend parallelly, a first groove is arranged between the adjacent first protruding edge and second protruding edge, a second groove is arranged between the adjacent three-dimensional nanometer structures, and the depth of the first groove is smaller than that of the second groove.

The present application discloses an array substrate, a preparation method thereof, and a display device, which are used to reduce the light propagation path of pattern recognition and improve the accuracy and efficiency of pattern recognition. The array substrate includes: a substrate; the array substrate has: a display area and a peripheral area; the display area includes: a first thin film transistor on the substrate, and a first connection lead electrically connected to the first thin film transistor on the substrate , an encapsulation layer over the first thin film transistor, a photosensitive device over the encapsulation layer, and a second connection lead electrically connected to the photosensitive device over the encapsulation layer; a first connection lead, a second connection lead, and The encapsulation layers all extend to the peripheral area; the peripheral area includes: a blocking wall between the first connection lead and the encapsulation layer; the encapsulation layer covers the blocking wall, and the encapsulation layer has an exposed first The first via hole of the connecting lead, and the second connecting lead are electrically connected to the first connecting lead through the first via hole.

The present application provides an inductance-capacitance network unit and a DC-DC converter, which are applied to an input filter unit, an inverter unit connected to the input filter unit, a transformer unit, a first port and a second port, and the inverter unit. A power conversion system in which the third port and the fourth port are connected to the inductor-capacitor network unit connected to the transformer unit, the rectifier unit connected to the transformer unit, and the output filter unit connected to the rectifier unit. The inductor-capacitor network unit includes a first capacitor and a second capacitor. An inductor, a second inductor, a second capacitor and a third capacitor, the first end of the first capacitor is connected to the first ends of both the first inductor and the second capacitor, the first port is the second end of the first capacitor, and the first end of the first capacitor is connected to the first end of the first capacitor. The three ports are the second end of the first inductor, the second port is the first end of both the second inductor and the third capacitor, the second ends of the second capacitor and the third capacitor are grounded, and the fourth port is the second end of the second capacitor. The second terminal of the inductor. Reduce electromagnetic compatibility problems caused by high-frequency harmonics.