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Arrangement method of photovoltaic cell gate lines

A photovoltaic cell and grid line technology, applied in the field of grid line arrangement of photovoltaic cells, can solve problems such as large internal resistance of photovoltaic cells, and achieve the effects of increasing extra cost, increasing sunlight shading area, and reducing internal resistance

Inactive Publication Date: 2014-06-25
INST OF ELECTRICAL ENG CHINESE ACAD OF SCI
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  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to overcome the shortcomings of the prior art that the internal resistance of the photovoltaic cell is relatively large due to the unreasonable arrangement of the grid lines, and propose a new arrangement of the grid lines of the photovoltaic cell

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  • Arrangement method of photovoltaic cell gate lines
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  • Arrangement method of photovoltaic cell gate lines

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Embodiment Construction

[0010] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0011] The arrangement of radial grid lines in the present invention is specifically described as follows:

[0012] The grid lines of the present invention include grid lines in shapes such as thin horizontal grids, radial grids and thick horizontal grids. A plurality of gate wires are all arranged on the semiconductor substrate of the photovoltaic cell, and are closely ohmic connected with the semiconductor substrate. The intersections of the gate lines are also tightly ohmic connected to reduce connection resistance. The thin horizontal grids are arranged in parallel, with a distance of 3-5 mm between adjacent thin horizontal grids, and spread all over the semiconductor substrate of the photovoltaic cell. The thick horizontal grid is placed on one side of the semiconductor substrate and parallel to the thin horizontal grid. The thick horiz...

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Abstract

An arrangement method of photovoltaic cell gate lines is characterized in that multiple gates lines are all arranged on a semiconductor substrate of a photovoltaic cell and in tight Ohm connection with the semiconductor substrate; the gate lines are in tight Ohm connection with one another in the intersection positions; the gate lines include thick transverse gates, thin transverse gates and radiation gates; the thin transverse gates are arranged in parallel, the distance between every two adjacent thin transverse gates is 3 mm to 5 mm, and the thin transverse gates are spread all over the semiconductor substrate of the photovoltaic cell; the thick transverse gates are arranged on one side of the semiconductor substrate and parallel with the thin transverse gates; the middles of the thick transverse gates are connected with a negative electrode; the radiation gates and the transverse gates intersect, and the radiation gates are not parallel with one another and have the trend to converging to the electrode; in the plane where the semiconductor substrate is located, the extension lines of all the radiation lines converge at one point, the point is located in the perpendicular bisector of the thick transverse gates, and the distance from the point to the thick transverse gates is half of the length of the thick transverse gates.

Description

technical field [0001] The invention relates to a grid line arrangement method of photovoltaic cells. Background technique [0002] A photovoltaic cell array is composed of several photovoltaic cells connected in series and parallel. Traditional photovoltaic cells are composed of semiconductor substrates, electrodes and grid lines. The grid lines are divided into thin horizontal grids, vertical grids and thick horizontal grids, which are in close ohmic contact with the semiconductor substrate. When working, sunlight irradiates the semiconductor substrate to generate electrons, which are collected by the thin horizontal grid and transferred to the vertical grid, and then collected to the thick horizontal grid, which is connected to the negative pole. In order to increase the irradiated area of ​​the semiconductor substrate receiving sunlight, the gate lines are usually made extremely thin. In order to reduce the internal resistance of the battery, the grid lines and negativ...

Claims

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Application Information

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IPC IPC(8): H01L31/05H01L31/0224
CPCY02E10/50H01L31/022433
Inventor 孙振奥杨子龙王一波许洪华
Owner INST OF ELECTRICAL ENG CHINESE ACAD OF SCI
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