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312 results about "Iir filtering" patented technology

An IIR filter is a particular type of filter; typical uses of an IIR filter would be to simplify cyclical data that includes random noise over a steadily increasing or decreasing trend. The IIR filter you cretae with this module defines a set of constants (or coefficients) that alter the signal that is passed through.

Digital predistortion system and method for high efficiency transmitters

A system for digitally linearizing the nonlinear behaviour of RF high efficiency amplifiers employing baseband predistortion techniques is disclosed. The system provides additive or multiplicative predistortion of the digital quadrature (I/Q) input signal in order to minimize distortion at the output of the amplifier. The predistorter uses a discrete-time polynomial kernel to model the inverse transfer characteristic of the amplifier, providing separate and simultaneous compensation for nonlinear static distortion, linear dynamic distortion and nonlinear dynamic effects including reactive electrical memory effects. Compensation for higher order reactive and thermal memory effects is embedded in the nonlinear dynamic compensation operation of the predistorter in an IIR filter bank. A predistortion controller periodically monitors the output of the amplifier and compares it to the quadrature input signal to compute estimates of the residual output distortion of the amplifier. Output distortion estimates are used to adaptively compute the values of the parameters of the predistorter in response to changes in the amplifier's operating conditions (temperature drifts, changes in modulation input bandwidth, variations in drive level, aging, etc). The predistortion parameter values computed by the predistortion controller are stored in non-volatile memory and used in the polynomial digital predistorter. The digital predistortion system of the invention may provide broadband linearization of highly nonlinear and highly efficient RF amplification circuits including, but not limited to, dynamic load modulation amplifiers.
Owner:TAHOE RES LTD

System for digital filtering in a fixed number of clock cycles

An integrated circuit, e.g. an AC '97 conforming audio codec, includes a digital filter and gain module including multiple channels of gain control and multiple channels of digital filtering. A gain control module includes an overflow check of data samples requiring differing lengths of clamping. Each channel of the digital filter includes a finite impulse response (FIR) filter, and an infinite impulse response (IIR) filter. The digital filtering is implemented largely in hardware independent of the number of channels required and/or independent of the required order of the filtering. Thus, filter channels can be added or additional filtering implemented merely by increasing the clock speed without changing the digital filter design. The FIR filter is capable of being reset each frame to prevent a DC buildup at internal nodes. The IIR filter performs a plurality of 2nd order biquadratic equations in an overall average of as few as four clock cycles per 2nd order biquad. A RAM is used to store the state variables for the 2nd order biquadratic equations. The state variable RAM is reset by controlling the clear input of latches at an input and/or the output of the state variable RAM, and the state variable RAM is addressed by a delta counter which is independent of the particular number of filter channels or filter orders implemented. Test patterns may be inserted between functional modules of an integrated circuit such as the disclosed audio codec by appropriate control of the preset and clear inputs to output latches of the functional modules.
Owner:WSOU INVESTMENTS LLC +1

Recursive digital filter with reset

An integrated circuit, e.g. an Audio Codec (AC) '97 conforming audio codec, includes a digital filter and gain module including multiple channels of gain control and multiple channels of digital filtering. A gain control module includes an overflow check of data samples requiring differing lengths of clamping. Each channel of the digital filter includes a finite impulse response (FIR) filter, and an infinite impulse response (IIR) filter. The digital filtering is implemented largely in hardware independent of the number of channels required and/or independent of the required order of the filtering. Thus, filter channels can be added or additional filtering implemented merely by increasing the clock speed without changing the digital filter design. The FIR filter is capable of being reset each frame to prevent a direct current (DC) buildup at internal nodes. The IIR filter performs a plurality of 2nd order biquadratic equations in an overall average of as few as four clock cycles per 2nd order biquad. A random access memory (RAM) is used to store the state variables for the 2nd order biquadratic equations. The state variable RAM is reset by controlling the clear input of latches at an input and/or the output of the state variable RAM, and the state variable RAM is addressed by a delta counter which is independent of the particular number of filter channels or filter orders implemented. Test patterns may be inserted between functional blocks of an integrated circuit such as the disclosed audio codec by appropriate control of the preset and clear inputs to output latches of the functional blocks.
Owner:LUCENT TECH INC +1

Distributed gain for audio codec

An integrated circuit, e.g. an AC '97 conforming audio codec, includes a digital filter and gain module including multiple channels of gain control and multiple channels of digital filtering. A gain control module includes an overflow check of data samples requiring differing lengths of clamping. Each channel of the digital filter includes a finite impulse response (FIR) filter, and an infinite impulse response (IIR) filter. The digital filtering is implemented largely in hardware independent of the number of channels required and / or independent of the required order of the filtering. Thus, filter channels can be added or additional filtering implemented merely by increasing the clock speed without changing the digital filter design. The FIR filter is capable of being reset each frame to prevent a DC buildup at internal nodes. The IIR filter performs a plurality of 2nd order biquadratic equations in an overall average of as few as four clock cycles per 2nd order biquad. A RAM is used to store the state variables for the 2nd order biquadratic equations. The state variable RAM is reset by controlling the clear input of latches at an input and / or the output of the state variable RAM, and the state variable RAM is addressed by a delta counter which is independent of the particular number of filter channels or filter orders implemented. Test patterns may be inserted between functional blocks of an integrated circuit such as the disclosed audio codec by appropriate control of the preset and clear inputs to output latches of the functional blocks.
Owner:LUCENT TECH INC

Method of and system for improving temporal consistency in sharpness enhancement for a video signal

In accordance with the preferred embodiment of the present invention, a method of and system for improving temporal consistency of an enhanced signal representative of at least one frame using a sharpness enhancement algorithm with an enhancement gain are provided. The method comprises the steps of: receiving the enhanced signal comprising at least one frame, obtaining an enhancement gain for each pixel in the frame, retrieving an enhancement gain value of each pixel in a reference frame from a gain memory using motion vectors, identifying if the frame is an I, P or B frame type and determining an updated enhancement gain for an I frame type by calculating a gain map for use in the sharpness enhancement algorithm. The updated enhancement gain of each pixel is equal to enhancement gain previously determined for use in the sharpness enhancement algorithm. In addition, the method includes storing the updated enhancement gain to gain memory, and applying the updated enhancement gain to the sharpness enhancement algorithm to improve temporal consistency of the enhanced signal. The method may further comprise the step of further improving the updated enhancement gain by applying a motion adaptive temporal IIR filter on the updated enhancement gain.
Owner:FUNAI ELECTRIC CO LTD

Adaptive spatio-temporal filter for human vision system models

InactiveUS6907143B2Image enhancementTelevision system detailsHuman visual system modelLow-pass filter
An adaptive spatio-temporal filter for use in video quality of service instruments based on human vision system models has a pair of parallel, lowpass, spatio-temporal filters receiving a common video input signal. The outputs from the pair of lowpass spatio-temporal filters are differenced to produce the output of the adaptive spatio-temporal filter, with the bandwidths of the pair being such as to produce an overall bandpass response. A filter adaptation controller generates adaptive filter coefficients for each pixel processed based on a perceptual parameter, such as the local average luminance, contrast, etc., of either the input video signal or the output of one of the pair of lowpass spatio-temporal filters. Each of the pair of lowpass spatio-temporal filters has a temporal IIR filter in cascade with a 2-D spatial IIR filter, and each individual filter is composed of a common building block,5 i.e., a first order, unity DC gain, tunable lowpass filter having a topology suitable for IC implementation. At least two of the building blocks make up each filter with the overall adaptive spatio-temporal filter response having a linear portion and a non-linear portion, the linear portion being dominant at low luminance levels and the non-linear portion being consistent with enhanced perceived brightness as the luminance level increases.
Owner:PROJECT GIANTS LLC

Digital adaptive equalizer for T1/E1 long haul transceiver

The present invention relates to the implementation of a digital adaptive equalizer for a T1/E1 long haul transceiver which is capable of adapting to a wide range of cable types, cable lengths, and/or other data transmission impairments, particularly when the transmission path type and/or length are unknown. The digital adaptive equalizer contains two filter blocks, i.e., an IIR filter and a FIR filter, together with a filter selector block to select a best IIR filter based on an error estimation of the received data. Only a few sets of coefficients are found to be necessary to allow proper digital equalization of a large number of cable types and/or lengths. A filter selector block selects a desired set of coefficients corresponding to the optimum IIR filter. The coefficients may be programmed into volatile memory (e.g., RAM) or non-volatile memory (e.g., Flash). Alternatively, the coefficients may be hardwired into the IIR filter. The back end of the digital adaptive equalizer contains an adaptive finite impulse response (FIR) filter. In the disclosed embodiment, the FIR filter uses a least mean square (LMS) algorithm for adaptation to the unknown or changed T1 or E1 transmission channel or medium. The adaptive FIR filter adjusts the output from the IIR filter to accurately match the inverse response of the unknown channel used to transmit the received T1/E1 signal. Equalization may be temporarily frozen if periodic patterns are detected in the received T1/E1 signal. A restored T1 or E1 signal is output from the FIR filter, and thus from the digital adaptive equalizer.
Owner:INTEL CORP
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