6results about "Amplifiers with memory effect compensation" patented technology

Provided is a method for implementing a digital predistortion scheme. The method includes obtaining (S210) artificial-intelligence-digital-predistortion (AI-DPD) schemes of eight neural-networks by using a unified digital predistortion (DPD) hardware structure and using software configuration.

An electronic device includes a processor that converts AM-AM data and AM-PM data into complex domains for each of a plurality of different amplitudes to acquire a plurality of preprocessed data parts, converts the plurality of preprocessed data parts into a time domain to generate a plurality of filters for each of a plurality of different amplitudes, generates an output signal by performing a convolution on an input signal with the plurality of filters, and models a non-linear memory system using the input signal and the output signal.

According to embodiments, a method performed by an electronic device includes: identifying a channel bandwidth; identifying one or more active DPD units among a plurality of DPD units of a digital pre-distortion (DPD) circuit based on the channel bandwidth and amount of resource allocated within the channel bandwidth; generating a DPD output signal of the DPD circuit based on the one or more active DPD units; generating an amplifier output signal based on the DPD output signal of the DPD circuit, a digital-to-analog converter (DAC), and a power amplifier (PA). While the DPD output signal is generated, at least one DPD unit different from the one or more active DPD units among the plurality of DPD units of the DPD circuit is deactivated.

A distortion apparatus for a power amplifier comprises: pre-distortion circuitry that comprises a memory polynomial look-up-table (LUT) circuit; and post-distortion circuitry that updates the pre-distortion circuitry based on an output of the power amplifier. The pre-distortion circuitry comprises a plurality of LUTs. Each LUT corresponds to a different memory depth of a memory polynomial of a Volterra series. Each LUT indexed by an instantaneous power of an input sample delayed by an amount corresponds to a respective memory depth of each LUT. An output of the memory polynomial LUT circuit corresponds to a summation of an output of each LUT multiplied by the input sample delayed by the amount corresponding to the respective memory depth of each LUT, and an output of the pre-distortion circuitry is provided to the power amplifier.

A digital pre-distortion achieving near ideal spectral regrowth suppression with a bandlimited loopback. To eliminate mismatch between the bandwidth of the pre-distortion model terms and the bandwidth of the signal used to determine the model a band limiting operation may be applied to both the loopback signal and the input to the power amplifier used for estimating the pre-distortion coefficients. In addition, oversampling may be performed in the digital domain to avoid aliasing in the nonlinear terms of the pre-distortion model.

A digital pre-distortion achieving near ideal spectral regrowth suppression with a bandlimited loopback. To eliminate mismatch between the bandwidth of the pre-distortion model terms and the bandwidth of the signal used to determine the model a band limiting operation may be applied to both the loopback signal and the input to the power amplifier used for estimating the pre-distortion coefficients. In addition, oversampling may be performed in the digital domain to avoid aliasing in the nonlinear terms of the pre-distortion model.