82 results about "Memory polynomial" patented technology

Non-linear interference cancellation techniques are provided for wireless transceivers. Non-linear reduction of interference of a transmit signal on a received signal in a transceiver device, comprises applying the transmit signal to a first non-linear system; applying the received signal to a second non-linear system; and subtracting an output of the first non-linear system output from an output of second non-linear system output to produce an interference mitigated received signal. The first non-linear system and / or the second non-linear system can be to implemented using one or more of a Volterra series and a Generalized Memory Polynomial Model. System parameters of the first non-linear system and / or the second non-linear system are adapted to reduce a power of the interference mitigated received signal.

A power amplifier system including a composite digital predistorter (DPD) ensuring optimized linearity for the power amplifier is described. In this system, a digital-to-analog converter (DAC), an analog filter, a first mixer, and the power amplifier are serially coupled to the composite DPD. A second mixer, a receive gain block, and an analog-to-digital converter (ADC) are serially coupled to the output of the power amplifier. A DPD training component is coupled between the inputs of the composite DPD and the ADC. The composite DPD includes a memory-based DPD, e.g., a memory polynomial (MP) DPD, a memoryless-linearizing DPD, e.g., a look-up table (LUT) DPD, and two multiplexers.

A predistortion method and apparatus are provided which use a DPD actuator (225) to apply a memory polynomial formed with first DPD coefficients to a first input signal x[n], thereby generating a first pre-distorted input signal y[n] which is provided to the non-linear electronic device (253) to produce the output signal, where the memory polynomial may be adaptively modified with a digital predistortion adapter (224) which computes second DPD coefficients u[n] with an iterative fixed-point conjugate gradient method which uses N received digital samples of the first pre-distorted input signal y[n] and a feedback signal z[n] captured from the output signal to process a set of conjugate gradient parameters (u, b, v, r, ω, α, β) at each predetermined interval, thereby updating the first DPD coefficients with the second DPD coefficients u[n] generate a second pre-distorted input signal which is provided to the non-linear electronic device.

A predistortion method and apparatus are provided which use a DPD actuator (225) to apply a memory polynomial formed with first DPD coefficients to a first input signal x[n], thereby generating a first pre-distorted input signal y[n] which is provided to the non-linear electronic device (253) to produce the output signal, where the memory polynomial may be adaptively modified with a digital predistortion adapter (224) which computes second DPD coefficients u[n] with an iterative fixed-point conjugate gradient method which uses N received digital samples of the first pre-distorted input signal y[n] and a feedback signal z[n] captured from the output signal to process a set of conjugate gradient parameters (u, b, v, r, ω, α, β) at each predetermined interval, thereby updating the first DPD coefficients with the second DPD coefficients u[n] generate a second pre-distorted input signal which is provided to the non-linear electronic device.

The augmented twin nonlinear two-box modeling and predistortion method for power amplifiers and transmitters provides power amplifier distortion modeling and predistortion linearization. A memoryless nonlinearity is combined with a memory polynomial function that includes cross-terms. The method can utilize an augmented forward twin-nonlinear two-box model, an augmented reverse twin-nonlinear two-box model, or alternatively, an augmented parallel twin-nonlinear two-box model. The present two-box models are validated in modeling and predistortion applications. Measurement results demonstrate the superiority of the present two-box models with respect to conventional state of the art models. The present two-box models lead to better accuracy with reduced complexity.

The invention discloses a polynomial power amplifier modeling and digital pre-distorting method based on a segmented memory. By means of a vector threshold decomposition technique, the modeling method comprises the steps that an original input signal of a power amplifier is disassembled to be a plurality of sub-signals, memory polynomial expansion is conducted on the sub-signals, and expansion results are merged to serve as a final output signal of the power amplifier; the digital pre-distorting method comprises the steps that a digital predistortor is constructed based on the modeling, and linear processing is conducted on the power amplifier. By means of the modeling method, non-linear characteristics of the wideband radio frequency power amplifier can be described accurately, and the degree of linearity of the wideband radio frequency power amplifier is effectively improved by means of the corresponding digital pre-distorting method.

The invention relates to the technology of digital pre-distortion, provides a novel digital pre-distortion structure, and achieves a good effect in the linearization of a power amplifier. According to the technical scheme, a memory polynomial digital pre-distortion method based on a piecewise linear function includes: the input of a pre-distortion module is y(n) / G, and the output is the conjugate of z(n), and G is the gain of the power amplifier. An input signal is x(n), the input signal passes through a structure which is the same with the pre-distortion module to generate an output signal z(n), e(n)=z(n)-the conjugate of z(n), e(n) is minimized by employing the recursive least squares algorithm iteration, and the signal is linearly amplified. The method is mainly applied to linearization occasions of the power amplifiers.

The invention relates to a digital pre-distortion processing method and device for a power amplifier. The digital pre-distortion processing device for the power amplifier comprises a pre-distortion module, a forward direction data collection module, a feedback data collection module, a microprocessor module and a control module. According to the digital pre-distortion processing method for the power amplifier, forward direction data entering the pre-distortion module and feedback data amplified by the power amplifier and fed back through a same data source channel after a peak subsides are collected; parameters of a memory polynomial in the pre-distortion module are computed in the RLS method based on the QR factorization; after coefficient computation is finished, the results are updated into the parameters of the memory polynomial in the pre-distortion module in a parallel mode; signals processed by a peak-subsiding module enter the pre-distortion module, memory polynomial computation is conducted, and pre-distortion processing of eliminating nonlinear effect of the power amplifier is conducted; circulating collection and iterative computations enable digital pre-distortion processing to be in a restrain state. Timeliness of a system is improved and resource consumption of the whole system is reduced on the whole, abnormal condition can be processed, and system stability is improved.

A system and method for linearizing a power amplifier using digital predistortion technique is provided including processing circuitry, the processing circuitry configured to apply a digital predistortion function based on a weighted static polynomial function, a weighted dynamic polynomial function and a threshold parameter which splits the nonlinear transfer characteristics of the device under test into a region where the static nonlinearity predominates and a region where the dynamic distortions predominate.

The invention discloses a digital predistorter design method and device based on power amplifier model cutting, and the method comprises the steps: transmitting an original input signal to a hardwarecommunication system, and obtaining an output signal of a radio frequency power amplifier through a hardware feedback channel; carrying out down-conversion operation and digital sampling on the outputsignal, and then carrying out frequency alignment on the output signal and the input signal; carrying out autocorrelation synchronization processing and normalization operation on the output signal and the input signal; establishing a power amplifier model between the input signal and the output signal by using the generalized memory polynomial model; cutting the power amplifier model by adoptinga blind sparse segmented weak orthogonal matching pursuit algorithm to obtain a simplified power amplifier model; and performing inversion operation on the simplified power amplifier module to obtainthe power amplifier digital predistorter. According to the method, the GMP model is cut through the blind sparse SWOMP algorithm, and the power amplifier sparse model with high sparse capability andaccuracy is constructed, so that the digital predistorter with low complexity and high accuracy is obtained.

The invention discloses an apparatus and method for implementing digital predistortion, wherein the method includes utilizing programmable logic structure to realize the following steps: S1. a parameter control module utilizes power amplifier incoming signals and power amplifier feedback signals of a power amplifier to synchronously calculate and renovate all power amplifier model parameters in the memorization multinomial model; S2. a model copy module assigns the value of the power amplifier model parameter to the corresponding model parameters a digital predistortion module; S3. the digital predistortion module carries out a predistortion process to the incoming signals according to model parameters. The inventive apparatus and method utilizes parallel arithmetic advantage of the programmable logic structure, thereby realizing the calculation of all model parameters in an instruction cycle, reducing computing time, improving predistortion process efficiency, and quickly and accurately realizing the digital predistortion process.

A system and method for linearizing a power amplifier using digital predistortion technique is provided including processing circuitry, the processing circuitry configured to apply a digital predistortion function based on a weighted static polynomial function, a weighted dynamic polynomial function and a threshold parameter which splits the nonlinear transfer characteristics of the device under test into a region where the static nonlinearity predominates and a region where the dynamic distortions predominate.

A power amplifier system including a composite digital predistorter (DPD) ensuring optimized linearity for the power amplifier is described. In this system, a digital-to-analog converter (DAC), an analog filter, a first mixer, and the power amplifier are serially coupled to the composite DPD. A second mixer, a receive gain block, and an analog-to-digital converter (ADC) are serially coupled to the output of the power amplifier. A DPD training component is coupled between the inputs of the composite DPD and the ADC. The composite DPD includes a memory-based DPD, e.g., a memory polynomial (MP) DPD, a memoryless-linearizing DPD, e.g., a look-up table (LUT) DPD, and two multiplexers.

An electronic device includes a nonlinear power amplifier, a predistortion coefficient calculator, and a memory polynomial predistortion filter coupled to the nonlinear power amplifier and to the predistortion coefficient calculator. The memory polynomial predistortion filter may include a plurality of finite impulse response (FIR) filter stages, and a summer coupled to the plurality of FIR filter stages. The FIR filter stages may functionally operate in parallel or may include a series of FIR filters coupled in parallel.

The invention relates to a digital predistortion method of jointly compensating for IQ imbalance and PA non-linearity. Comprehensively considering the requirement of jointly compensating for IQ imbalance and PA non-linearity, based on a GMP (Generalized Memory Polynomial)-based traditional digital predistortion model, the method further considers I / Q imbalance influence, and simultaneously completes I / Q imbalance non-linearity and power amplification non-linearity compensation, thereby eliminating main non-linearity in a transmitter.

The invention discloses a predistortion device and a predistortion method based on a precise inverse solution memory polynomial model equation, belonging to the predistortion technology in the field of communication and aiming to solve the problem on lowered system performance due to excessively large computing error in the traditional predistortion algorithm based on polynomial model identification. The predistortion device comprises a digital predistorter (100), a power amplifier model parameter estimation module (106) and a predistortion function computing module (107). The predistortion method comprises two processes of modeling a power amplifier and computing a predistortion function. The predistortion device and the predistortion method are both inverse functions based on precise solution memory polynomial model equation, and the precise predistortion function is obtained by a way of constructing an equation of higher degree in one unknown and computing a real root of the equation. According to the predistortion device and the predistortion method, the computing error can be reduced, and the frequency spectrum growth can be effectively inhibited, so that the system performance is improved.

The invention discloses a method, equipment and a system for adjusting the linear performance of predistortion. The method mainly comprises the steps that a system of linear equations based on a memory polynomial model is constructed according to an input signal z(n) and an output signal y(n) of a radio-frequency power amplifier, and after the system of linear equations is converted, an expression of a predistortion factor a comprising R_uu is obtained; the process of determining the predistortion factor a is converted to a process of determining a characteristic value matrix S and a characteristic vector matrix V of the R_uu, so as to simplify the computational complexity; in the process of determining the characteristic value matrix S and the characteristic vector matrix V, the dimensionality for conducting matrix operations is lower, and storage space needed by the operations is less; and finally, the determined characteristic value matrix S and characteristic vector matrix V of the R_uu are plugged into the expression of the predistortion factor a to obtain the predistortion factor. The predistortion factor a obtained in such a way has higher stability, so the linear adjusting performance of the predistortion is also improved to some extent.

The invention provides a mixed double-frequency digital pre-distortion model method based on the DDR. The method includes the following steps that a concurrent double-frequency DPD system based on indirect learning is built; an operation sequence is optimized, a one-dimensional LUT achievement model of the 2D-MP is obtained, a one-dimensional LUT achievement model of 2D-MMP is derived, and then aone-dimensional LUT high-frequency concurrent double-frequency DPD achievement scheme and a model are provided; a dynamic deviation function is substituted into a one-order model of the DDR, and a discrete equivalent baseband expression of the one-order DDR model is obtained and extended to be in a synchronic double-frequency mode; a two-dimensional memory polynomial model same-order envelope cross term is introduced, and a new model and a one-dimensional LUT achievement method of the model in an FPGA are obtained. According to the method, the modeling accuracy and the linearization performance better than a simplified two-dimensional memory polynomial model and a traditional DDR model can be obtained; meanwhile, the advantage that achievement can be conveniently conducted through a one-dimensional lookup table is kept, the new model has a good level in the aspects of performance and complexity, and the method is suitable for practical system applying.

The digital predistortion system and method with extended correction bandwidth includes a predistortion system that uses a two-box architecture based on the cascade of a memory polynomial followed by a memoryless predistortion function. The memoryless predistorter is identified offline and used to perform a coarse linearization which cancels out most of the static nonlinearity of the device under test allowing for a reduced observation bandwidth for the synthesis of the memory polynomial predistortion sub-function.

The behavioral model and predistorter for modeling and reducing nonlinear effects in power amplifiers addresses the model size estimation problem. The GMP model is replaced by the hybrid memory polynomial / envelope memory polynomial (HMEM) model within a twin nonlinear two-box structure to reduce the number of variables involved in the model size estimation problem, without compromising model accuracy and digital predistorter performance. A sequential approach is presented to efficiently estimate the model size. Experimental validation is carried out to evaluate the performance of the size estimation and the accuracy of the HMEM-based twin-nonlinear two-box model with respect to that of the GMP-based twin-nonlinear two-box model.

An electronic device includes a nonlinear power amplifier, a predistortion coefficient calculator, and a memory polynomial predistortion filter coupled to the nonlinear power amplifier and to the predistortion coefficient calculator. The memory polynomial predistortion filter may include a plurality of finite impulse response (FIR) filter stages, and a summer coupled to the plurality of FIR filter stages. The FIR filter stages may functionally operate in parallel or may include a series of FIR filters coupled in parallel.

The invention discloses a pre-distortion method for a power amplifier. The pre-distortion method includes the steps that transmitting signals x(k) are received; the transmitting signals x(k) are substituted into a pre-distortion relational expression which is established according to the characteristics of the power amplifier and is based on a memory polynomial, the transmitting signals x(k) are subjected to pre-distortion in combination with a lookup table, pre-distorted transmitting signals y(k) are obtained, and the pre-distorted transmitting signals y(k) are sent to the power amplifier for power amplification and output. It is thus clear that before the transmitting signals x(k) are sent to the power amplifier, the transmitting signals x(k) are subjected to pre-distortion through the pre-distortion relational expression which is established according to the characteristics of the power amplifier and is based on the memory polynomial, distortion caused by non-linearity of the power amplifier and generated when the pre-distorted transmitting signals y(k) pass through the power amplifier is offset, optimal performance transmission of the transmitting signals x(k) is guaranteed, radio frequency transmitting efficiency is improved, and the application range is wide. The invention further discloses a pre-distortion device for the power amplifier and a radio frequency system.

Systems and methods are disclosed for digital predistortion for a concurrent multi-band transmitter that compensates for both in-band and out-of- band intermodulation products according to a memory polynomial based baseband model. In one embodiment, a concurrent multi-band transmitter includes a digital predistortion subsystem, power amplifier circuitry, and an adaptation subsystem. The digital predistortion subsystem includes multiple digital predistorters configured to process digital input signals for frequency bands of a concurrent multi-band signal to provide predistorted digital input signals each being for a different one of the frequency bands of the concurrent multi-band signal and one or more intermodulation distortion compensation signals each being for a different one of one or more intermodulation distortion frequency bands. The adaptation subsystem is configured to adaptively configure the plurality of digital predistorters according to a memory polynomial based digital baseband model of the digital predistorters.

The memory polynomial based digital predistorter utilizes a cluster-based particle swarm optimization (PSO) technique and has an embedded model-size estimator. The PSO technique and model-size estimator efficiently find the dimensions and accurately estimate the coefficients of the memory polynomial based digital predistorter for improved linearity of a power amplifier.

The invention discloses a digital pre-distortion (DPD) processing method for a multi-mode RRU. The method comprises the following steps: a DPD processing module carries out time delay calculation according to captured forward downlink signals and captured feedback signals, and carries out alignment processing on the forward downlink signals and the feedback signals; matrix modeling is carried outon the forward downlink signals and the feedback signals which are aligned through a memory polynomial model, so that a pre-distortion coefficient is calculated; and the pre-distortion coefficient isused on the forward downlink signals, and pre-distorted downlink signals are output to a power amplifier, so that the linearity of the power amplifier and the demodulation performance of multi-mode signals can be improved. The method disclosed by the invention has the following beneficial effects: non-linear distortion of the multi-mode signals can be calibrated; and compared with the prior art, the method has the advantages that the DPD processing module adopts the multi-mode DPD algorithm, so that single-mode broadband signals, single-mode narrowband signals and multi-mode broadband signalscan be processed.

A method for estimating round-trip time (RTT) values for data packets travelling in a telecommunication network is disclosed. During a first time interval (206) which begins with the start of a data transmission, estimated RTT values (14) are generated by filtering a periodic sequence of RTT samples (12) with a self-initialising expanding memory polynomial (EMP) filter (16) and, after a first switch-over time at the end of the first time interval, the estimated RTT values are generated by filtering the RTT samples with a fading memory polynomial (FMP) filter (18). The first switch-over time is determined by comparing an FMP estimation error and an EMP estimation error, where the FMP estimation error is the difference between an output of the FMP filter and the RTT samples, and the EMP estimation error is the difference between an output of the EMP filter and the RTT samples, and triggering the first switch-over time when the FMP estimation error becomes equal to or less than the EMP estimation error.

The invention discloses a digital pre-distortion processing method based on a memory and cross memory polynomial model. The method includes: carrying out modulo operation on each input baseband signalto obtain the amplitude corresponding to each input baseband signal; delaying each input baseband signal and solving the modulus to obtain the amplitude of a delayed signal, wherein the amplitude ofeach input baseband signal and the amplitude of the delayed signal respectively pass through an address mapping unit and then are used as an address index of a lookup table to look up a correspondingcrossed item pre-distortion coefficient and a corresponding non-crossed item pre-distortion coefficient; and establishing a memory and cross memory polynomial model, multiplying the input signals after time delay alignment by the corresponding pre-distortion coefficients and amplitudes, accumulating the multiplied input signals to serve as signal output after pre-distortion processing, and performing digital pre-distortion processing on each input baseband signal according to the memory and cross memory polynomial model to obtain output baseband signals. According to the invention, the compromise of modeling precision and calculation complexity can be realized.

The invention provides a system for stabilizing an amplifier. The system comprises a processor for modeling for the power amplifier, a digital analog converter for performing digital-to-analog conversion on an output signal of the processor, the power amplifier for amplifying an input signal, and an acquisition circuit for acquiring an output signal of the power amplifier. The invention also provides a method for stabilizing the amplifier; the method comprises the steps of generating the input signal, acquiring the output signal, modeling for the power amplifier according to the input signal and the acquired output signal, determining the order and the memory depth of a polynomial in a model to obtain a predistortion model, and updating the predistortion model according to the work mode of the power amplifier. According to the system and the method, the memory effect of a pulse type input signal to the power amplifier is considered, the memory polynomial is used for modeling for the power amplifier, a memory polynomial structure based on a lookup table is provided, and the degree of linearity is greatly improved.

The scalable digital predistortion system and method provides compensation for the nonlinear distortions of power amplifiers and transmitters. The scalable digital predistortion system and its associated update algorithms provide scalability in terms of signal bandwidth and average power, allowing for low complexity updates following changes in the signal's bandwidth and / or power level. The method applies both memory polynomial functions and memoryless predistortion functions for compensating for the nonlinear distortions.

The invention belongs to the technical field of adaptive digital pre-distortion and discloses a system and a method for improving short-wave digital pre-distortion performance. For the characteristicof narrow bandwidth of short-wave signals, a weak nonlinear filter of an FIR filter is integrated to overcome a memory effect, and a memory polynomial model is integrated, so that pre-distortion parameter extraction can be carried out with higher integrating degree, parameters more conforming to actual characteristics of the power amplifier are obtained, the performance of a digital pre-distortionsystem is improved, and the linearity and the power amplifier efficiency of the radio frequency power amplifier are improved.