The utility model discloses a blasting
data acquisition circuit based on an FPGA, and belongs to the technical field of blasting
data acquisition. Comprising a
field programmable gate array (FPGA) which is connected with an analog-to-
digital converter (ADC) and an advanced RISC
machine (ARM) processor. The input end of the analog-to-
digital converter ADC is connected with three four-order analog filters, and the three four-order analog filters are respectively used for filtering X-direction, Y-direction and Z-direction signals; and the ARM processor is connected with a nonvolatile storage device FLASH, an SDRAM (
Synchronous Dynamic Random Access Memory) and an external device. According to the utility model, through combination of the FPGA, the ADC and the ARM, the precision, real-time performance and flexibility of
data acquisition can be improved, the overall
power consumption is reduced, and the overall performance is improved. The FPGA is used for
processing high-speed data, and the ARM is used for subsequent
processing, so that the
system delay can be reduced, and the
throughput can be improved. And the FPGA is used for
processing real-time tasks, and the ARM enters a low-power-consumption mode when being idle, so that the overall
power consumption can be reduced.