772 results about "Cross coupled" patented technology

The invention provides a broadband low-noise amplifier based on a three-coil coupling transformer. The broadband low-noise amplifier comprises an input matching network, a common-source differential output driving stage amplifier, an inter-stage matching network, a common-source differential output power stage amplifier and an output matching network which are connected in sequence, broadband matching is realized by using the input matching network and the inter-stage matching network, and the effective transconductance of the transistor is improved; through the cross-coupled capacitors, the LNA gain and stability on a broadband are improved, better isolation is realized, and input and output are decoupled; due to the design of the grounding capacitor, the linearity of the LNA is improved; through the combination of the three-coil coupling transformer and the differential topology, output signals are superposed in the same direction at the output end, and noise is cancelled in the reverse direction at the output end, so that the thermal noise is greatly inhibited, the isolation is improved through the output matching network, the insertion loss is reduced, and the output matching performance is optimized.

The invention relates to the technical field of servo control, in particular to a high-precision current closed-loop control system and method for a servo driver, and the method comprises the steps: collecting three-phase current, rotor position, winding temperature and bus voltage, and constructing a state data set; constructing a parameter identification model fusing physical prior and an attention mechanism, deducing inductance and flux linkage parameters influenced by temperature, saturation and cross coupling, and correcting a motor model in real time; the correction parameters are injected into an FOC decoupling and feedforward link, and a self-adaptive PI regulator is linked to set the gain of a current loop on line; calculating a d-q axis voltage command according to the update model to respectively control excitation and torque components; an extended state observer is introduced to estimate load abrupt change and parameter disturbance, feed-forward compensation is carried out, and three-phase PWM is generated through anti-Parker and SVPWM; and an inverter nonlinear compensation model of a dead zone and switch delay is constructed, PWM is pre-distorted and output to a power device, and robust and low-ripple current closed-loop control of the servo motor is realized.

The invention provides a wide-angle scanning dual-circularly-polarized phased-array antenna unit, which belongs to the field of dual-circularly-polarized antennas and comprises a first dielectric layer, a second dielectric layer and a third dielectric layer which are sequentially stacked, the antenna radiator is arranged on the side, away from the second dielectric layer, of the first dielectric layer, the antenna radiator comprises four radiation patches, each radiation patch comprises a metal patch and a loading branch knot, and each metal patch is provided with a slotted structure; the first metal ground layer is clamped between the first dielectric layer and the second dielectric layer, and a cross coupling gap and a first coupling gap and a second coupling gap which are perpendicular to each other are formed in the first metal ground layer; the U-shaped feeder line is clamped between the second dielectric layer and the third dielectric layer, and two ends of the U-shaped feeder line are respectively connected with a coaxial feed column penetrating through the third dielectric layer; the second metal ground layer is arranged on the side, away from the second dielectric layer, of the third dielectric layer; an array is also provided; the problem that a traditional circularly polarized antenna is narrow in impedance bandwidth and limited in polarization is solved.

The invention discloses a low-phase noise ring voltage-controlled oscillator based on multiphase injection locking, relates to the technical field of integrated circuits, and is used for solving the technical problems that an existing injection locking oscillator limits the frequency tuning range and cannot effectively suppress noise. The invention discloses a low-phase noise ring voltage-controlled oscillator based on multiphase injection locking. The low-phase noise ring voltage-controlled oscillator comprises a first ring oscillator unit and a second ring oscillator unit, the n first ring oscillator units are connected in series to form a chain structure; the second ring oscillator unit is provided with a cross coupling inverter complementary injection unit and a tail current source injection unit; a first output end of the chain structure is connected with a second input end of the second ring oscillator unit, and a second output end of the chain structure is connected with a first input end of the second ring oscillator unit; a first signal is injected into a cross-coupling inverter complementary injection unit and a tail current source injection unit, and a second ring oscillator unit receives a second signal output by a chain structure and then outputs a third signal.

The invention provides a cross-coupling cooperative control method for double permanent magnet synchronous motors of an aviation airborne suspension lifting system. The cross-coupling cooperative control method comprises the following steps: acquiring a global instruction and real-time state feedback of the double motors; based on the global instruction and the real-time state feedback, constructing a dynamic topology and dynamically adjusting the weight to obtain the weight of the dynamic topology; generating a collaborative correction based on the weight of the dynamic topology and a consistency protocol; dynamic error balanced distribution under load disturbance is carried out based on the collaborative correction amount; and controlling the double motors based on an error balanced distribution result. According to the method, dynamic weight distribution and dynamic error balanced distribution are combined, multi-source interference working conditions such as mechanical unbalance loading, dynamic coupling and parameter disturbance can be dealt with, synchronous errors and disturbance fluctuation in a dual-motor system can be accurately monitored and coordinated, and high-precision stability of cooperative driving is guaranteed.

An SRAM cell includes a first inverter cross-coupled to a second inverter. The first inverter includes a first pull-up transistor and a first pull-down transistor, having coupled drains that define a first storage node. The SRAM cell further includes a first N-type pass-gate transistor having a first drain coupled to a write bit line, a first source coupled to the first storage node, and a first gate coupled to a first write word line. The SRAM cell further includes a first P-type pass-gate transistor having a second drain coupled to the write bit line and a second source coupled to the first storage node. The SRAM cell further includes a P-type transistor having a third drain, coupled to a second gate of the first P-type pass-gate transistor, a third source coupled to a second write word line, and a third gate coupled to an enable signal.

The invention discloses a high-speed level conversion circuit, and belongs to the technical field of integrated circuit design, the circuit mainly comprises an input signal processing module, a voltage boosting module, a differential signal generation module, a signal amplification module and an output module, the input signal processing module converts a low-voltage input signal into a complementary logic signal pair; the voltage boosting module raises the voltage amplitude of the complementary logic signal by using a charge pump principle; the lifted signal drives a thick gate transistor in the differential signal generation module to generate a differential signal; the signal amplification module adopts a cross coupling structure to quickly amplify the differential signal; and finally, the output module outputs a high-voltage domain signal in an inverted manner. By introducing voltage bootstrap before gate driving, the overdrive voltage of a core switch tube is remarkably increased, so that the problem of low conversion speed of a traditional level conversion circuit is effectively solved on the premise of not increasing the device size and static power consumption, and high-speed and high-efficiency level conversion is realized.

The invention provides a voltage stability control method for a multi-output switching power supply, which comprises the following steps of: sampling a main output channel in real time to obtain a voltage signal; the voltage signal is processed through a wide bandwidth error amplifier, a main channel adjusting signal is generated, and the main channel adjusting signal is used for driving a main power switch device; receiving an input voltage fluctuation frequency band of an auxiliary channel, a load current transient change gradient and a frequency spectrum coupling characteristic of a main channel adjusting signal through a dynamic prediction model, and generating an auxiliary channel adjusting signal with a phase lead compensation characteristic; a cross coupling active offset mechanism is constructed, time domain-frequency domain characteristics of coupling interference are extracted through a high-precision differential detection circuit, amplitude-frequency adjustable reverse correction signals are generated in real time through an adaptive compensation algorithm and injected into control nodes of an auxiliary output channel, and dynamic decoupling and ripple suppression are carried out. According to the method, high-stability control of multi-channel voltage under all working conditions is realized, and the dynamic response speed and the anti-interference capability are improved.

The invention relates to a high-dynamic gantry control method, system and device based on a PMAC controller and a medium, and the method comprises the steps: screening, optimizing and deploying a cross-coupling synchronous control strategy algorithm; executing at least one pre-operation of double-drive-shaft setting, double-drive-shaft motor debugging, double-drive-shaft motor control parameter tuning, double-drive-shaft motor zeroing and gantry motion program configuration; a deployed algorithm is adopted, and synchronous control of the double-drive shaft is divided into one path of synchronous following instruction and the other path of feedback closed-loop control instruction based on the position deviation of the double-drive shaft; the synchronous following instruction and the feedback closed-loop control instruction are sent to a driver to be amplified to control the motors, and feedback signals of the motors are received to achieve closed-loop control over the motors. Therefore, through a series of innovative strategies and optimization measures, high-precision and high-dynamic control over the gantry double-drive shaft is achieved, and remarkable technical progress and application value are brought to the field of industrial automation and precision machining.

The invention discloses a floating-point number index maximum value searching circuit and an in-memory computing chip. The searching circuit comprises an SRAM (Static Random Access Memory) unit matrix which comprises a plurality of rows and columns of SRAM units, wherein each unit comprises NMOS (N-channel Metal Oxide Semiconductor) tubes N1-N5 and PMOS (P-channel Metal Oxide Semiconductor) tubes P1 and P2; n1, N2, P1 and P2 are in reverse cross coupling to form a pair of storage nodes Q and QB; the grid electrode of the N5 is connected with a node QB; the grid electrode of the N3 in the ith row is connected with a word line WLLlt; igt; the grid electrode of the N4 is connected with a word line WLRlt; igt; ; the drain electrode of each column of N5 is connected in series with the source electrode of the next column of N5, and the source electrode of the first column of N5 is connected with a signal SELlt; igt; the N5 drain electrode of the last column is connected with a signal PRE; in the jth column, N3 is a corresponding node Q and a bit line BLlt; jgt; the transmission tube N4 is a corresponding node QB and a bit line BLBlt; jgt; and a transmission tube. According to the invention, the number of searching cycles is saved, the calculation time is shortened, the subsequent calculation amount is reduced, the efficiency is improved, the power consumption is reduced, and the defects of relatively high power consumption, complex hardware implementation, relatively long calculation delay and the like of an existing circuit are overcome.

The invention discloses a 23T4M anti-radiation TCAM storage unit circuit which comprises a pre-charging module, an RH reading circuit module, a programmable logic module, a reconfigurable magnetic tunnel junction storage module, a discharging module and an output module. In the RH reading circuit module, the grid electrode of a transistor N7 is connected with the drain electrode of a transistor N8, the grid electrode of the transistor N8 is connected with the drain electrode of the transistor N7, a cross coupling structure is formed, a node S0 and a node S1 are controlled by a node Q and a node QB, meanwhile, the node S0 and the node S1 control the charging and discharging paths of the node Q and the node QB respectively, and after any node is overturned by high-energy particles, the charging and discharging paths of the node Q and the node QB are controlled by the node S0 and the node S1. All the nodes are maintained or charged to recover to the original logic level. According to the method, data upset at a single sensitive node can be completely resisted, and meanwhile, the search error rate of the TCAM is improved.

The invention discloses a ferroelectric field effect transistor-based continuous time physical Isin machine and a solving method thereof, and belongs to the technical field of novel circuit design and calculation. A sigma circuit of the Isin machine is of a latch structure formed by connecting two phase inverters through two switches in a cross coupling mode, each phase inverter is composed of an n-type FeFET and a p-type FeFET, a J circuit of the Isin machine is composed of four FeFETs and used for programming the coupling relation and strength between sigma 1 and sigma 2, continuous time solution is achieved by programming the FeFETs of the J circuit, and therefore the coupling relation between sigma 1 and sigma 2 is obtained. And by continuously modulating the threshold voltage of the FeFET, the continuous modulation of the coupling strength can be realized, and a plurality of coupling coefficient circuits are not needed. Compared with a traditional continuous time physical Isin machine, the method has the advantages that the hardware overhead is greatly reduced, and the solving power consumption is reduced.

The present invention belongs to the technical field of parameter identification for permanent-magnet synchronous motors. Disclosed are a parameter identification method and apparatus for a permanent-magnet synchronous motor, and a storage medium and a device. The method comprises: using a variable step-size feedback neural network algorithm to solve a voltage equation and a d-q axis current discrete state equation, which take cross-coupled inductance into consideration, of a permanent-magnet synchronous motor in a dq coordinate system, so as to obtain intermediate parameters generated in the process of constructing the d-q axis current discrete state equation; and performing calculation on the basis of the intermediate parameters, so as to obtain the stator resistance, the d-axis inductance, the q-axis inductance, the cross-coupled inductance and the permanent-magnet flux linkage of the permanent-magnet synchronous motor, and thereby completing parameter identification. The present invention takes cross-coupled inductance into consideration and uses the variable step-size feedback neural network algorithm, such that the computational load is extremely small, the degree of complexity is reduced, rapid and effective identification can be realized, and errors can be reduced; in different convergence time periods, the algorithm adjusts the step size on the basis of the magnitude of steady-state errors, such that identification results approach stable values more quickly, thereby improving the speed and stability of convergence.

An electronic device may include wireless circuitry. The wireless circuitry can include a first input transistor, a first capacitance neutralization having a source terminal coupled to a tail node, and a second order intermodulation generation circuit configured to produce second order intermodulation signals at the tail node. The wireless circuitry can further include a second input transistor and a second capacitance neutralization transistor having a source terminal coupled to the tail node. The first and second capacitance neutralization transistors can be cross-coupled with the input transistors. A fixed or adjustable current source can be coupled to the tail node. The second order intermodulation generation circuit can include a transistor biased in a weak inversion mode.

The invention relates to a method for improving the grid-connected stability of a grid-forming type inverter based on inductive current feedforward and coupling enhancement, and belongs to the technical field of inverter control. The method comprises the following steps: measuring inverter port voltage and filter inductive current, and calculating output active power and reactive power; calculating a port voltage reference value according to the amplitude and phase angle reference of the port voltage generated by the active controller and the reactive controller respectively; and taking the port voltage as a feedback value of the voltage regulator, and subtracting the feedback value from the port voltage reference value to serve as the input of the voltage regulator. And then adding the feedforward inductive current to the output of the voltage regulator to obtain a current reference value, and subtracting the inductive current from the current reference value to serve as the input of the current regulator. And finally, the output of the current regulator is added with the feedforward port voltage and combined with the cross-coupling enhanced voltage to obtain a modulation signal, and the modulation signal is subjected to space vector modulation to generate a driving signal so as to control the inverter. According to the method, on the premise that hardware cost and software complexity are not increased, the stable operation capacity of the grid-forming inverter under the strong power grid working condition is improved.

A multi-port memory cell has a write-only cell and a buffered read port. The write-only cell has cross-coupled inverters and transmission gates to write bit lines. Each transmission gate has n-channel and p-channel transistors in parallel that both turn on during writing but remain off for reading. A node in the cross-coupled inverters is applied to a gate of a buffer transistor that has a channel in series with a channel of a read pass transistor to a read bit line. The buffered read port can be an inverter and a transmission gate, or can have p-channel and n-channel buffer and pass transistors in a four-transistor stack. The number of p-channel and n-channel transistors can be equal for use in a standard-cell or macro library layout, and the standard-cell logic power supply can be used for the memory cells even for ultra-low supply voltages.

The invention relates to a multi-threshold 16T anti-radiation SRAM (Static Random Access Memory) storage unit circuit and a memory, a storage module in the circuit is of a bistable structure formed by two cross-coupled phase inverters formed by PMOS (P-channel Metal Oxide Semiconductor) transistors, and two storage nodes are formed; the redundant storage module adopts NMOS (N-channel metal oxide semiconductor) transistors to form a bistable structure, and two redundant nodes are formed to serve as redundant backups of the storage module; when the read-write operation control module reads or writes data, a word line is activated, and the data is read from the storage node and the redundant node or written into the storage node and the redundant node through the switched-on transistor; and the bit line driving module is used for driving the bit lines during reading and writing operations. According to the circuit, by introducing redundant nodes and a feedback mechanism, efficient resistance and recovery of single-particle and multi-node upset are achieved, the anti-radiation capacity is improved, the static noise margin, the read-write speed and the power consumption performance are optimized, and the circuit is suitable for the reliable data storage requirement in the high-radiation environment.

Techniques are provided herein to form an integrated circuit having a backside interconnect structure coupled between different transistor elements, such as between source or drain regions and / or gate structures. The backside interconnect structure may be used to replace frontside local interconnect structures, thus freeing up more space in the frontside interconnect region. In one such example, a first semiconductor device includes a first semiconductor region extending from a first source or drain region and a first gate structure extending over the first semiconductor region, and a second semiconductor device includes a second semiconductor region extending from a second source or drain region and a second gate structure extending over the second semiconductor region. A conductive structure is coupled between a bottom surface of each of the first source or drain region, the second source or drain region, and a portion of the first gate structure.

The embodiment of the invention provides a voltage-controlled oscillator, an oscillator circuit, a chip and electronic equipment, relates to the technical field of communication or radar detection, and can improve the linearity of the voltage-controlled oscillator. The voltage-controlled oscillator comprises a voltage-controlled oscillator resonant cavity, an even harmonic generator circuit and a self-mixing frequency tripler circuit. The voltage-controlled oscillator resonant cavity comprises a voltage transformation diode array and a first-stage mode switching capacitor. The even harmonic generator circuit comprises a group of cross coupling tubes, one end of each cross coupling tube is electrically connected to the two differential ends of the voltage-controlled oscillator, and the even harmonic generator circuit serves as an even harmonic generator and is electrically connected to the self-mixing frequency tripler circuit. The self-mixing frequency tripler circuit comprises a differential unit and a resonant cavity, and one end of the self-mixing frequency tripler circuit is electrically connected to the even harmonic generator circuit. The low-frequency voltage-controlled oscillator and the self-mixing frequency tripler circuit achieve current multiplexing, the even harmonic generator circuit serves as a negative resistor of the oscillator and also serves as an even harmonic generator of the self-mixing frequency tripler, and the linearity of the millimeter wave frequency source is improved.

The embodiment of the invention discloses a level shift circuit and a high-voltage half-bridge driving chip. The level shift circuit comprises a first high-voltage switch tube, a second high-voltage switch tube, a cross coupling module and a conversion module; the controlled end of the first high-voltage switch tube is connected with a setting signal; a reset signal is accessed to the controlled end of the second high-voltage switch tube; the cross coupling module comprises a first current mirror and a second current mirror, first current is connected to the first end of the first current mirror, second current is connected to the first end of the second current mirror, and the first current is larger than or equal to N times of the second current; the first and second of the conversion module are respectively connected with the first and second current mirrors through the first and second nodes, and output signals are output. The level shift circuit can filter common-mode noise so as to ensure the stability of an output signal, a large resistor or capacitor does not need to be arranged, delay is reduced, and the signal transmission speed is increased.

An electronic device may include a display that generates light for an optical system that redirects the light towards an eye box. The optical system may include a waveguide, a non-diffractive input coupler, a cross coupler, and an output coupler. The cross coupler may expand the light in a first direction. The cross coupler may perform an even number of diffractions on the light and may couple the light back into the waveguide at an angle suitable for total internal reflection. The output coupler may expand the light in a second direction while coupling the light out of the waveguide. The cross coupler may include surface relief gratings or holographic gratings embedded within the waveguide or formed in a separate substrate. The optical system may direct the light towards the eye box without chromatic dispersion and while supporting an expanded field of view and optical bandwidth.

The invention relates to the technical field of integrated circuits, in particular to a capacitive coupling type current steering digital-to-analog converter for transmitting switch control signals, which comprises a current steering unit and a switch signal control unit. The switching signal control unit comprises two capacitance coupling type level shifters; the current steering unit comprises a current source and transistors M1-M4, source electrodes of the transistors M1-M4 are connected with one end of the current source, and the other end of the current source is grounded; drain electrodes of the transistors M1-M2 are connected to form a positive output signal, and drain electrodes of the transistors M3-M4 are connected to form a negative output signal; the grid electrodes of the transistors M1-M2 are connected with a first capacitive coupling type level shifter, and the transistors M3-M4 are connected with a second capacitive coupling type level shifter; the on and off of the transistors M1-M4 are controlled through the two capacitance coupling type level shifters; the cross coupling unit is introduced to assist in transmitting switch control signals, and the dynamic performance of the digital-to-analog converter is improved.

A memory device includes a storage element formed of a first inverter and a second inverter cross-coupled to each other, a first transistor having a first conductive type, and connected between a first bit line and a first storage node of the storage element; a second transistor having the first conductive type, and connected between a second bit line and a second storage node of the storage element; and a third transistor having a second conductive type opposite to the first conductive type, and connected between the first storage node and a third bit line.

The invention provides a low-delay level shift circuit, and belongs to the technical field of analog integrated circuit power management, the circuit comprises a level shift core circuit and an edge detection logic circuit, the level shift core circuit adopts a high-voltage-resistant LDMOS to complete conversion of different voltage domain signals on the basis of a traditional cross coupling structure, and the edge detection logic circuit is connected with the edge detection logic circuit. The edge detection logic circuit detects a fast falling edge of the level shift core circuit, and an output signal only related to the fast edge is obtained after logic operation. The low-delay level shift circuit provided by the invention has no static power consumption, the delay of the level shift circuit can be reduced to below 1ns, the delay time of the low-delay level shift circuit is obviously reduced compared with the delay time of a traditional two-stage cross coupling level shift circuit, and the low-delay level shift circuit is suitable for the field of SiC MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) driving with higher requirements on propagation delay.

The invention relates to the technical field of radio frequency integrated circuits, and discloses a low-noise voltage-controlled oscillator circuit which comprises a source electrode following low-noise bias circuit with digital calibration, a source electrode following low-noise bias circuit with digital calibration, a source electrode following low-noise bias circuit with digital calibration and a source electrode following low-noise bias circuit with digital calibration, the cross-coupled amplifier array is composed of a plurality of units, and the source electrode of the cross-coupled amplifier array suppresses low-frequency noise through a resistance-capacitance feedback network and receives a digital amplitude calibration signal so as to dynamically adjust the number of working units and stabilize the output amplitude; the amplitude self-calibration loop consists of digital logic and a peak detector; the switched capacitor unit array is provided with stable direct-current bias; and a wide linear variable capacitor array driven by the stepped bias voltage. Through deep fusion of digital and analog technologies, the phase noise is remarkably reduced, the linear tuning range is widened, the amplitude stability is ensured, the power consumption is reduced, and the method is particularly suitable for a high-performance radio frequency communication chip of the Internet of Things.

A gate driver circuit includes a high-side region that operates in a first voltage domain; a low-side region that operates in a second voltage domain lower than the first voltage domain; a gate driver configured to drive a power switch between an on-state and an off-state with an adaptive dead time; a capacitor cross-coupled to the high-side region and the low-side region; a logic circuit configured to use the capacitor to detect a voltage transient of the power switch based on a first crossing of a threshold, and detect an end of the voltage transient based on a second crossing of the threshold; and an active-passive discrimination circuit configured to indicate whether the voltage transient is active or passive. The logic circuit is configured to regulate the adaptive dead time based on the second crossing of the threshold and based on the voltage transient being passive.

The MEMS capacitive accelerometer comprises a cover plate, a structural layer and a substrate, the structural layer comprises a fixed frame and a mass block, a first acceleration release groove is formed in the middle of the fixed frame, the mass block can move in the X-axis direction and the Y-axis direction along the first acceleration release groove, and the fixed frame is arranged between the cover plate and the substrate in a four-edge clamping and packaging mode; the mass block comprises a first detection unit, a second detection unit, a third detection unit and a fourth detection unit which correspond to the four corners and are sequentially arranged anticlockwise from the lower left corner, and the first detection unit, the second detection unit, the third detection unit and the fourth detection unit form an X-axis acceleration detection differential structure symmetrically along the Y axis. The first detection unit, the fourth detection unit, the second detection unit and the third detection unit form a Y-axis acceleration detection differential structure symmetrically along the X axis. The differential fixed tooth offset detection structure is designed, the linearity and the sensitivity are improved, interference caused by a non-sensitive axis is eliminated, and the cross coupling degree is reduced.

The invention discloses a low-power-consumption voltage-controlled oscillator based on an SOI (Silicon On Insulator) process, relates to the technical field of integrated circuit design, and is used for solving the technical problem that an existing Colpitts oscillator is too high in power consumption and cannot be applied to a low-power-consumption integrated circuit. The invention discloses a low-power-consumption voltage-controlled oscillator based on an SOI (Silicon On Insulator) process. The low-power-consumption voltage-controlled oscillator comprises a Colpitts resonance circuit, a negative resistance unit and an LC filter network, the negative resistance unit is at least provided with a pair of RC network bias NMOS transistors and a pair of cross-coupled NMOS transistors, and the drain electrodes of the RC network bias NMOS transistors are connected with the Colpitts resonance circuit; the input end of the LC filter network is connected with the source electrodes of the cross-coupled NMOS transistors; the negative resistance unit biases the NMOS transistor through the RC network to introduce a feedback path to form a C-class oscillator structure, the Colpitts resonance circuit generates a first signal, and the first signal passes through the negative resistance unit and is output after common-mode noise is filtered by the LC filter network.

The invention relates to the technical field of radio frequency integrated circuits, and discloses a dynamic bias C-type voltage-controlled oscillator based on a CMOS (complementary metal oxide semiconductor) process, the voltage-controlled oscillator adopts a C-type structure, a cross-coupled network adds two resistors and a capacitor on the basis of a cross-coupled transistor, a circuit works in the C type by adjusting bias voltage at a resistor end, and the voltage-controlled oscillator works in the C type. The C-type voltage-controlled oscillator, a tail current source, a variable capacitance network, a switched capacitor array and a fixed LC resonance network form a core structure of the C-type voltage-controlled oscillator capable of numerical control tuning and voltage-controlled tuning, so as to determine the working frequency of the circuit and realize numerical control and voltage-controlled tuning functions; and the operational amplifiers with two bandwidth modes are introduced, so that the problem of difficult oscillation starting is solved, and the oscillation starting speed and the phase noise performance in a stable state are considered at the same time.

The invention provides a pneumatic vibration deicing device and method for power transmission line multi-equipment cooperation, and aims to solve the problems of power failure operation, frequent on-line and off-line of equipment, poor terrain adaptability, high line damage risk and the like in a traditional deicing method. The device is stably hung on the power transmission line for a long time through the hanging lugs, the servo motor drives the air cylinder to reciprocate to drive the vibration rod to vibrate up and down, the power transmission line accurately shakes in a small range, and efficient deicing is achieved. And the icing condition of the line is monitored in real time through the camera and fed back to the remote terminal. According to the invention, a phase-locked loop synchronous control method of a master-slave cross-coupling PID control architecture is adopted, high synchronization of vibration signals among a plurality of devices is ensured, and the cooperative deicing efficiency is improved. The device is small in size and light, can be hung on the power transmission line for a long time, effectively avoids damage to the power transmission line, and remarkably improves the deicing safety and reliability of the power transmission line.