108 results about "Cross coupled" patented technology

The application belongs to the cross field of electric power system and power electronics technology, and particularly relates to a regional power grid power quality treatment method for multi-type subject access. By introducing advanced phase compensation, the phase lag of the detection link is calculated and fully compensated in real time, so that the extracted harmonic component is instantaneously synchronized with the actual harmonic of the power grid. In combination with an adaptive hybrid modulation technology, the dominant harmonic frequency band can be focused on compensation. A fully decoupled control based on feedforward is adopted, which eliminates the cross coupling between the d and q axis currents, so that the inner loop controller can realize fast tracking with almost no overshoot. Meanwhile, the adaptive adjustment mechanism of the PLL bandwidth ensures that the synchronization signal is fast and robust when the power grid changes.

The application provides a common-source common-gate amplifier, comprising a signal input module, which is used for generating an input signal according to a power supply voltage; a cross-coupling module, which is electrically connected with the signal input module and is used for forming internal positive feedback according to an output signal; a first biasing module, which is electrically connected with the cross-coupling module; a first branch module, which is electrically connected with the first biasing module; a second biasing module, which is electrically connected with the cross-coupling module; a second branch module, which is electrically connected with the second biasing module; wherein the first biasing module and the second biasing module are used for providing biasing after an input common-mode feedback voltage, the first branch module and the second branch module are used for providing large-swing output biasing, and the first branch module and the second branch module are respectively electrically connected with the signal input module, and the signal input module is further used for outputting branch signals to the first branch module and the second branch module. The application improves the voltage swing, the gain and the bandwidth of the circuit under the single-stage amplifier structure.

The present disclosure provides a voltage-controlled oscillator structure for a communication circuit. The structure includes a cross-coupling circuit and a transmission line module. The cross-coupling circuit has a first transistor, a first capacitor, a second transistor, and a second capacitor. The transmission line module has a first transmission line unit and a second transmission line unit. A transmission line effect of the cross-coupling circuit is eliminated through the transmission line module, so as to reduce phase noise of a voltage-controlled oscillator, thereby further achieving a purpose of increasing a communication frequency range.

The present application relates to an elastic wave device and a communication device, the elastic wave device comprising: a package substrate; a piezoelectric substrate configured opposite to the package substrate and connected by a plurality of bumps; the bumps include a first bump also used for heat dissipation; a plurality of series resonators formed on the piezoelectric substrate, each series resonator is connected in series by a corresponding wiring; a cross-coupled capacitor formed on the piezoelectric substrate, a first end of the cross-coupled capacitor is connected to a first wiring between two series resonators, and a second end of the cross-coupled capacitor is connected to a first bump pad of the first bump joint. By utilizing the first bump used for heat dissipation as a path for the cross-coupled capacitor to the package substrate, the wiring can be effectively reduced, and the occupied area can be reduced.

This invention discloses a SRAM memory cell hardened based on FDSOI technology and its single-event effect evaluation method, mainly addressing the problem of decreased radiation resistance performance under low critical charge conditions in existing technologies. It includes: a pair of cross-coupled memory inverters, a memory node, and symmetrical accessors. The memory inverter includes two series-connected PMOS transistors and two series-connected NMOS transistors, forming pull-up and pull-down branches respectively, with interlocking transistors connecting the branches. Each connection point constitutes a memory node. The accessor includes four NMOS transistors, with their sources connected to the memory node, drains connected to the bit line, and gates connected to the word line. The pair of memory inverters achieves functional complementarity of the memory nodes through cross-connection of the memory node and the gate of the series-connected transistor at the opposite end. This invention can reproduce the current tailing effect of single-event transient pulses in FDSOI devices, improve radiation resistance performance under low critical charge conditions, and achieve quantitative evaluation of radiation resistance performance. It can be used for reliability evaluation of aerospace-grade integrated circuits under space radiation environments.

This invention discloses a linear multi-zero cavity duplexer based on a hybrid resonator. The duplexer comprises a rectangular hollow metal cavity, a common signal terminal at the top of the cavity, and two signal branches on either side. The branches employ a hybrid cascaded structure of single-mode and dual-mode metal resonators, forming a linear topology without cross-coupling. The dual-mode metal resonator can operate simultaneously in inter-plate coupling mode and coaxial mode. The resonant mode order is set by pre-setting the internal inter-plate distance, allowing each branch to generate two preset transmission zeros. This invention achieves a six-pole filtering response using only four resonant cavities, forming a dual passband and generating four preset transmission zeros, ensuring high quality factor and high channel isolation while achieving device miniaturization. This invention features a simple structure, easy fabrication, and independently and precisely adjustable coupling parameters, making it suitable for 5G / 6G communication, emergency communication, and UAV-borne high-performance miniaturized RF front-end applications.

This invention pertains to implantable medical device technology, specifically relating to a large-gap, offset-resistant wireless power and communication system for implantable medical devices. The system includes an external control module, an external relay module, and an implantable stimulation module. The external control module is used for energy transmission and communication control, while the implantable stimulation module is used for energy reception and information feedback. The external relay module is positioned between the two to improve the wireless power transmission distance and efficiency. The system achieves wireless power transmission through a multi-stage magnetic resonant coupling structure and incorporates a decoupling structure between the relay coils to reduce cross-coupling, ensuring stable transmission performance even under spatial offset conditions. An internal and external wireless communication link is established, integrating energy and information transmission, and closed-loop control is achieved by collecting status information from the energy storage unit. The system can achieve stable and efficient wireless power supply and reliable communication under conditions of large gaps and positional offsets.

Integrated circuits having an array of memory cells are provided. Each memory cell can include at least a pair of cross-coupled inverters, a write access transistor, and optionally a separate read port. The cross-coupled inverters in each memory cell can have a positive supply terminal. The positive supply terminal of each memory cell along a given column in the array can be coupled to a respective pull-up transistor. The pull-up transistor can receive a control signal from a pull-up weakening control circuit. The control signal can be temporarily raised during a write operation, otherwise can be driven back to ground to help optimize read performance. The pull-up weakening control circuit can be implemented using a chain of N-channel transistors or resistors.

An oscillating circuit with a withstand voltage mechanism. An inductor circuit is coupled to a pair of oscillating output terminals. A cross-coupled transistor circuit is coupled between the pair of oscillating output terminals and a first terminal. A capacitor circuit is coupled between the pair of oscillating output terminals. A first source degradation circuit includes: a first inductor, a first capacitor, a second capacitor, and a first source degradation transistor. The first inductor is electrically coupled between the first terminal and a first power supply voltage. The first capacitor is electrically coupled between the first terminal and a second terminal. The second capacitor is coupled between the first power supply voltage and a third terminal, wherein the third terminal is coupled to a second power supply voltage. The first source degradation transistor is coupled between the second terminal and the third terminal and is turned on by a first feed voltage.

This invention discloses an FPGA-based F-P etalon length tilt adjustment method and device. It performs layered adjustment of "X and Y direction parallelism adjustment" and "Z direction cavity fixing," relying on an FPGA to construct a two-level priority scheduling mechanism with fixed underlying hardware. Utilizing the parallel processing advantages and nanosecond-level clock determinism of FPGA hardware logic, the X and Y direction parallelism determination is fixed as the highest hardware priority. In each control iteration, the FPGA performs threshold comparison with low latency. If the parallelism does not meet the standard, the system intercepts the Z-direction cavity fixing command within a deterministic control cycle and prioritizes the leveling branch. This "software algorithm hardwareization" strategy effectively suppresses multidimensional cross-coupling oscillations. The adjusted etalon achieves the theoretical peak transmittance and spectral resolution, and the area array detector exhibits a sharp interference ring with good contrast.

A non-isolated DC-to-DC switching hybrid converter is implemented using a cross-coupled series-capacitor quadruple step-down buck converter topology. In some embodiments, the DC-to-DC switching hybrid converter includes a switched-capacitor converter circuit and incorporates a zero-voltage switching network to implement soft switching and a coupled inductor to realize a fixed step-down ratio. The hybrid converter is capable of supporting a high step-down ratio (such as 8:1) while providing high efficiency. In other embodiments, the DC-to-DC switching hybrid converter incorporates a transformer in place of the coupled inductor to further increase the step-down ratio.

The application relates to the technical field of radio frequency integrated circuits, and discloses a low-noise voltage-controlled oscillator circuit which comprises a source follower low-noise bias circuit with digital calibration, a cross-coupled amplifier array composed of multiple units, a stable DC bias switch capacitor unit array, a wide linear variable capacitor array driven by a ladder bias voltage, and an amplitude self-calibration loop composed of digital logic and a peak detector.

This utility model belongs to the field of filters, specifically a coaxial-to-waveguide filter, including a cavity with a waveguide port on the inner side. A coaxial connector is bolted to the top side of the waveguide port. Multiple resonant cavities are formed inside the cavity, and a coupling grounding post is installed inside the cavity through the resonant cavities. A coupling conductor is fixed between the waveguide port and one of the resonant cavities through a supporting insulating medium. One end of the coupling conductor is soldered to the coupling grounding post in the corresponding resonant cavity, and the other end extends into the waveguide port, realizing bidirectional coupling transmission of electromagnetic waves. This utility model introduces cross-coupling technology inside the filter, which significantly improves the out-of-band suppression compared to relying on natural attenuation, reduces the number of resonant cavities required to achieve the same suppression, thereby effectively reducing the product size and also reducing the filter insertion loss. This device achieves low port return loss through high out-of-band suppression.

This application provides an SRAM cell and an SRAM memory device. The SRAM cell includes a substrate, and a latch module, a write module, and a read module integrated on the substrate. The latch module includes a pull-up transistor group and a pull-down transistor group, forming a first inverter and a second inverter. The first inverter and the second inverter are cross-coupled to form a first memory node and a second memory node. The write module includes a first transmission gate transistor group, which connects a first write word line and a first write bit line pair. The first transmission gate transistor group includes a first transmission gate transistor and a second transmission gate transistor. The first transmission gate transistor is connected to the first memory node, and the second transmission gate transistor is connected to the second memory node. The read module includes a first read module and a second read module, which are connected to the first memory node and the second read module is connected to the second memory node. This application improves parallel access capabilities.

This invention belongs to the field of motor control technology and discloses a dual-motor cooperative control driver and control method based on vector control. Through a built-in parallel two-level cross-coupling synchronous control strategy, the speed loop and clamping force loop are set up in parallel. A cross-compensation algorithm is executed so that the control setpoint of each motor is simultaneously adjusted by its own and the other motor's speed and clamping force errors, achieving adaptive weight adjustment logic to achieve multi-variable cooperation. The driver integrates a force feedback interface, which can be directly connected to a force sensor to form a clamping force-torque composite closed-loop control mode, realizing high-quality closed-loop control from command to output, improving the system's intelligence and control accuracy. The modular hardware design, combined with CAN communication and analog signal acquisition, enhances configuration flexibility and system integration convenience. Precise feedback from the resolver decoding module and current sampling module, and the driving of the three-phase full-bridge drive module, ensure high efficiency from signal sensing to power output.

The application relates to a silicon-based millimeter wave broadband compact double-drive high-efficiency Doherty power amplifier, belonging to the technical field of radio frequency integrated circuits, comprising an input quadrature coupler, a main and auxiliary two power amplifier paths and a broadband load modulation output network; wherein the power amplifier path adopts a differential common source and common gate unit with cross-coupling capacitance and a double-mode drive topology to improve the gain and efficiency of the millimeter wave frequency band; the output network adopts a slow wave transmission line structure combined with a cascade coupling line pair to realize broadband active load modulation and absorb transistor parasitic capacitance, and simultaneously optimize the chip area. Thus, the problem that the efficiency and bandwidth are difficult to be considered simultaneously due to the limited load modulation bandwidth and the decreased transistor gain of the traditional silicon-based millimeter wave Doherty power amplifier is solved.

This invention proposes a maximum torque-to-current ratio control method and system considering the inductor nonlinearity of a permanent magnet synchronous motor (PMSM), belonging to the field of motor technology. The method includes alternating injection of a voltage square wave at a frequency one-quarter of the control frequency, extracting the difference current between two control cycles, and identifying the fully incremental inductance containing cross-coupled inductance under various operating conditions. The cross-coupled inductance is divided into relative position mutual inductance and flux linkage saturation mutual inductance. Under unsaturated conditions, the relative position mutual inductance is used to calculate the actual position coordinate system angle. Under saturated conditions, the flux linkage saturation mutual inductance is obtained through a mutual inductance iteration method to calculate the decoupling coordinate system angle. A high-order sliding mode observer is used to fit the back electromotive force to observe the permanent magnet flux linkage and phase resistance parameters. The optimal current angle is calculated in the decoupling coordinate system to achieve maximum torque-to-current ratio control. This invention considers the influence of PMSM inductor nonlinearity on maximum torque-to-current ratio control, improving control accuracy and robustness, and achieving higher system efficiency.

The embodiment of the application discloses a reverse flow prevention circuit, a linear voltage regulator and a chip, wherein the reverse flow prevention circuit comprises a first PMOS tube, a second PMOS tube, a third PMOS tube and a fourth PMOS tube to form a cross-coupled structure, the first PMOS tube, the second PMOS tube and a first resistor form a left branch, the third PMOS tube, the fourth PMOS tube and a second resistor form a right branch, and the reverse flow prevention circuit further comprises a first NMOS tube and a second NMOS tube, the drain of the second NMOS tube and the gate of the fourth PMOS tube are connected to the input end of an inverter combination, and a control signal is output through the output end of the inverter combination to control the on-off of a main power tube in the linear voltage regulator. Thus, the reverse flow current can be reduced, the current reverse flow can be effectively prevented, and the circuit safety can be protected.

An oscillator circuit having voltage-withstanding mechanism is provided. An inductor circuit is coupled to a pair of oscillating output terminals. A cross-coupled transistor circuit is coupled between the oscillating output terminals and a first terminal. A capacitor circuit is coupled between the oscillating output terminals. A first source degeneration circuit includes a first inductor, a first capacitor, a second capacitor and a first source degeneration circuit. The first inductor is coupled between the first terminal and a first power voltage. The first capacitor is coupled between the first terminal and a second terminal. The second capacitor is coupled between the first power voltage and a third terminal that is coupled to a second power voltage. The first source degeneration is coupled between the second terminal and the third terminal and is turned on based on a first feeding voltage.

This invention relates to the field of power equipment condition monitoring technology, and discloses an online monitoring and evaluation device and method for series compensation capacitors. The method includes: acquiring operating signals and extracting steady-state operating characteristics and transient characteristic parameters; combining historical cumulative fatigue damage, calculating the dynamic frequency-varying equivalent series resistance modulated by the damage positive feedback effect, and substituting it into the thermal differential equation to iteratively calculate the dynamic hot spot temperature sequence; for transient events, constructing a cross-coupling term characterizing the synergistic effect of electrodynamics and thermomechanical softening, and calculating the high-frequency equivalent partial discharge; performing thermomechanical softening correction on the transient overvoltage peak to obtain the thermomechanical equivalent transient stress, and dynamically updating the electro-thermal-mechanical coupled cumulative fatigue damage by combining real-time dynamic hot spot temperature and high-frequency equivalent partial discharge; finally outputting a health status index. This invention integrates the time-varying evolution of thermal stress and the multi-physics field transient synergistic damage mechanism, significantly improving the accuracy of equipment damage quantification.

In some embodiments, an apparatus for communication in a wireless network includes a radio frequency (RF) circuitry. The RF circuitry includes one or more transceivers and a signal booster. The signal booster is coupled to the one or more transceivers to provide boosted high frequency signal to the transceivers based on a local oscillator signal received via a transmission line. The signal booster includes an amplifier including a pair of transistors cross-coupled each other in cascode. This configuration results in a reduced impedance of the signal booster, thus provides an improved Q value for the high frequency signal provided to the transceivers, without incurring additional power consumption as in existing systems. The signal booster can be implemented in any access point or client device in a wireless communication network such as IEEE 802.11.

This disclosure provides a method for forming ultra-high density integrated circuit systems (e.g., such as for 6T SRAM). The method involves applying a dual-patterned exposure-etch-exposure-etch (LELE) process and using a spacer process to reduce the critical size of features. To improve process tolerance, the method implements a dual-patterning technique by modifying the layout and dividing the cross-coupled strips into two colors (e.g., each color corresponding to a mask etching process). Furthermore, a spacer process is implemented to reduce feature size and increase the metal-to-metal spacing between the two cross-coupled strips to improve process tolerance and electrical performance. This is achieved by depositing a spacer layer over an opening in a hard mask and then performing spacer etch-back. Therefore, the opening shrinks by an amount equal to the spacer thickness. The strip to strip spacing can then be increased by up to twice the spacer thickness.

Embodiments of the present disclosure relate to electronic amplifiers. A variable gain amplifier has a cascode stage formed by a pair of cross-coupled transistors. Each pair of cross-coupled transistors is provided with a transformer that keeps the impedance presented to the cross-coupled transistors constant with gain.

A constant-transconductance bias circuit is provided that includes a PMOS current mirror cross-coupled with an NMOS current mirror. The PMOS and NMOS current mirrors drive a first current through a first current path and a second current through a second current path. A resistor in the first current path introduces an ohmic voltage drop from a gate voltage of a diode-connected PMOS transistor in the PMOS current mirror to provide a bias voltage. The bias voltage biases a gate of a PMOS transistor in the second current path.

The embodiment of the application relates to the technical field of filter design, and discloses a straight-line topology structure with phase compensation characteristics, design and a superconducting filter. The topology structure is based on a standard straight-line topology structure comprising a source suspension branch, a straight-line coupling main path and a load suspension branch. Four continuous resonators are selected on the straight-line coupling main path. A first resonator and a fourth resonator of the four continuous resonators are cross-coupled to form the straight-line topology structure with the phase compensation characteristics. The four continuous resonators form a CQ structure. Therefore, under the condition of fully utilizing the simplicity of the straight-line topology structure, the introduction, independent control and adjustment of the phase compensation real zero point are realized, the group delay in the passband of the filter is compensated while the sideband suppression capability is improved, and therefore the signal fidelity of a communication system is improved.