1285 results about "Cross coupled" patented technology

The invention provides a clock signal generating circuit, a wired communication transceiver and electronic equipment, and the circuit outputs a first DC voltage comprising phase difference information and frequency difference information of a reference clock signal and a feedback clock signal through a phase frequency detection module. The pulse generator generates a narrow pulse signal based on the DC voltage and a reference clock signal, the oscillation frequency of each secondary ring oscillator in the cross-coupled ring oscillator is controlled by the first DC voltage, and the cross-coupled loop performs synchronous coupling and phase sequence adjustment processing on each secondary ring oscillator. One output node in the cross coupling ring oscillator receives the narrow pulse signal, frequency and phase locking is completed in an injection locking mode, and the frequency divider is used for conducting frequency division processing on any high-frequency clock signal and outputting a feedback clock signal. Therefore, a high-frequency multi-phase clock signal with low phase noise and high phase precision can be generated by using the low-frequency reference clock signal.

The invention provides a broadband low-noise amplifier based on a three-coil coupling transformer. The broadband low-noise amplifier comprises an input matching network, a common-source differential output driving stage amplifier, an inter-stage matching network, a common-source differential output power stage amplifier and an output matching network which are connected in sequence, broadband matching is realized by using the input matching network and the inter-stage matching network, and the effective transconductance of the transistor is improved; through the cross-coupled capacitors, the LNA gain and stability on a broadband are improved, better isolation is realized, and input and output are decoupled; due to the design of the grounding capacitor, the linearity of the LNA is improved; through the combination of the three-coil coupling transformer and the differential topology, output signals are superposed in the same direction at the output end, and noise is cancelled in the reverse direction at the output end, so that the thermal noise is greatly inhibited, the isolation is improved through the output matching network, the insertion loss is reduced, and the output matching performance is optimized.

A radio frequency to direct current (RF-DC) converter for harvesting radio frequency energy includes an antenna circuit, and a plurality of cross-coupled differential-drive (CCDD) rectifier stage. The antenna circuit receives RF signals and outputs a positive signal at a positive RF terminal and outputs a negative signal output at a negative RF terminal. Each CCDD rectifier stage includes a first NMOS transistor, a first PMOS transistor, a second NMOS transistor and a second PMOS transistor. Each CCDD rectifier stage further includes two flying capacitors and two body capacitors. An input terminal is connected to a connection point between a source terminal of the first NMOS transistor and a source terminal of the second NMOS transistor. An output terminal is connected to a connection point between a source terminal of the first PMOS transistor and a source terminal of the second PMOS transistor.

In a memory device including a ternary memory cell, the ternary memory cell may include: a first inverter and a second inverter cross-coupled in a first node and a second node and including a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off; a first read transistor and a first write transistor which are connected to each other in parallel between the first node and a first bit line; and a second read transistor and a second write transistor which are connected to each other in parallel between the second node and a second bit line, wherein the first read transistor and the second read transistor may have a read access current, which is less than or equal to the constant current, pass therethrough in response to an activated read word line.

The invention relates to the technical field of servo control, in particular to a high-precision current closed-loop control system and method for a servo driver, and the method comprises the steps: collecting three-phase current, rotor position, winding temperature and bus voltage, and constructing a state data set; constructing a parameter identification model fusing physical prior and an attention mechanism, deducing inductance and flux linkage parameters influenced by temperature, saturation and cross coupling, and correcting a motor model in real time; the correction parameters are injected into an FOC decoupling and feedforward link, and a self-adaptive PI regulator is linked to set the gain of a current loop on line; calculating a d-q axis voltage command according to the update model to respectively control excitation and torque components; an extended state observer is introduced to estimate load abrupt change and parameter disturbance, feed-forward compensation is carried out, and three-phase PWM is generated through anti-Parker and SVPWM; and an inverter nonlinear compensation model of a dead zone and switch delay is constructed, PWM is pre-distorted and output to a power device, and robust and low-ripple current closed-loop control of the servo motor is realized.

The invention provides an oscillator frequency modulation circuit and a communication chip. The oscillator frequency modulation circuit comprises a first resonance area which comprises a first resonance circuit, a first coupling tube (Mn) and a second coupling tube (Mp), wherein the first coupling tube (Mn) and the second coupling tube (Mp) are cross-coupled with the first resonance circuit; the second resonance area comprises a second resonance circuit, and the second resonance circuit comprises a first branch circuit electrically connected with the first coupling tube (Mn) and a second branch circuit electrically connected with the second coupling tube (Mn); the second branch is electrically connected with the second coupling tube (Mp); the first tail inductor (Ln) is connected to the first branch in series; the second tail inductor (Lp) is connected in series with the second branch; and the differential capacitor array (Ct) is connected between the first branch circuit and the second branch circuit in parallel. According to the oscillator frequency modulation circuit and the communication chip, low noise can be realized in a broadband range, the anti-interference capability is realized, meanwhile, the occupied area is relatively small, and high-quality signals can be continuously output for a multi-protocol system.

The invention discloses an extensible silicon-based terahertz radiation array source based on an on-chip micro-convex antenna and a terahertz radiation source. The extensible silicon-based terahertz radiation array source based on the on-chip micro-convex antenna comprises a plurality of array units formed by cross-coupled harmonic oscillators based on the on-chip micro-convex antenna, and the array units are connected to form the extensible silicon-based terahertz radiation array source of an n * n array structure. According to the extensible silicon-based terahertz radiation array source, the on-chip micro-convex antenna radiation structure meets the terahertz frequency and broadband requirements, the extensible silicon-based terahertz radiation array source can be applied to a terahertz radiation source system, and the terahertz radiation source array system which is high in working frequency, high in radiation power and tunable in broadband can be achieved.

The invention provides a wide-angle scanning dual-circularly-polarized phased-array antenna unit, which belongs to the field of dual-circularly-polarized antennas and comprises a first dielectric layer, a second dielectric layer and a third dielectric layer which are sequentially stacked, the antenna radiator is arranged on the side, away from the second dielectric layer, of the first dielectric layer, the antenna radiator comprises four radiation patches, each radiation patch comprises a metal patch and a loading branch knot, and each metal patch is provided with a slotted structure; the first metal ground layer is clamped between the first dielectric layer and the second dielectric layer, and a cross coupling gap and a first coupling gap and a second coupling gap which are perpendicular to each other are formed in the first metal ground layer; the U-shaped feeder line is clamped between the second dielectric layer and the third dielectric layer, and two ends of the U-shaped feeder line are respectively connected with a coaxial feed column penetrating through the third dielectric layer; the second metal ground layer is arranged on the side, away from the second dielectric layer, of the third dielectric layer; an array is also provided; the problem that a traditional circularly polarized antenna is narrow in impedance bandwidth and limited in polarization is solved.

The invention provides a double-permanent-magnet synchronous motor rotating speed synchronization method based on an active-disturbance-rejection technology. The method comprises the following steps that 1, a linear active-disturbance-rejection controller replaces a traditional PI controller to serve as a speed ring controller of a double-permanent-magnet synchronous motor; and 2, taking the sliding mode cross coupling controller as a rotating speed synchronous controller between the double motors. The method has the beneficial effects that the control strategy and the control structure are improved, and high-precision synchronization of the rotating speed is realized. A linear active-disturbance-rejection controller is designed according to a mathematical model of the permanent magnet synchronous motor, so that the disturbance rejection and the dynamic response speed of the system are improved; a sliding-mode cross-coupling controller is designed based on the cross-coupling control structure, and high-precision synchronization of the rotating speed is realized through the sliding-mode cross-coupling controller.

The invention discloses a low-phase noise ring voltage-controlled oscillator based on multiphase injection locking, relates to the technical field of integrated circuits, and is used for solving the technical problems that an existing injection locking oscillator limits the frequency tuning range and cannot effectively suppress noise. The invention discloses a low-phase noise ring voltage-controlled oscillator based on multiphase injection locking. The low-phase noise ring voltage-controlled oscillator comprises a first ring oscillator unit and a second ring oscillator unit, the n first ring oscillator units are connected in series to form a chain structure; the second ring oscillator unit is provided with a cross coupling inverter complementary injection unit and a tail current source injection unit; a first output end of the chain structure is connected with a second input end of the second ring oscillator unit, and a second output end of the chain structure is connected with a first input end of the second ring oscillator unit; a first signal is injected into a cross-coupling inverter complementary injection unit and a tail current source injection unit, and a second ring oscillator unit receives a second signal output by a chain structure and then outputs a third signal.

The invention discloses a cross coupling calculation method and device based on an unequal-width magnetic circuit model, and the method comprises the steps: adding a permanent magnet equivalent magnetomotive force source into a large-pole magnetic circuit and a small-pole magnetic circuit of a d-axis in a permanent magnet motor through employing a normalization method, and obtaining a normalized large-pole magnetic circuit and a normalized small-pole magnetic circuit, the magnetic circuit model is a d-axis-permanent magnet cross coupling magnetic circuit model based on a normalized large and small pole magnetic circuit method; a magnetic isolation bridge part in the magnetic circuit model is adjusted, a permanent magnet is added, and before the magnetic circuit model is adjusted, a large-pole magnetic circuit triangular area and a small-pole magnetic circuit triangular area are not communicated with the magnetic isolation bridge; in a large and small pole magnetic circuit with permanent magnet magnetomotive force, connecting a triangular area between permanent magnets and a magnetic isolation bridge to obtain a corrected magnetic circuit model after the magnetic isolation bridge channel is corrected; and calculating the total magnetic flux and inductance of the loop by combining the corrected magnetic circuit model and the corresponding equivalent magnetic circuit.

The invention provides a cross-coupling cooperative control method for double permanent magnet synchronous motors of an aviation airborne suspension lifting system. The cross-coupling cooperative control method comprises the following steps: acquiring a global instruction and real-time state feedback of the double motors; based on the global instruction and the real-time state feedback, constructing a dynamic topology and dynamically adjusting the weight to obtain the weight of the dynamic topology; generating a collaborative correction based on the weight of the dynamic topology and a consistency protocol; dynamic error balanced distribution under load disturbance is carried out based on the collaborative correction amount; and controlling the double motors based on an error balanced distribution result. According to the method, dynamic weight distribution and dynamic error balanced distribution are combined, multi-source interference working conditions such as mechanical unbalance loading, dynamic coupling and parameter disturbance can be dealt with, synchronous errors and disturbance fluctuation in a dual-motor system can be accurately monitored and coordinated, and high-precision stability of cooperative driving is guaranteed.

An SRAM cell includes a first inverter cross-coupled to a second inverter. The first inverter includes a first pull-up transistor and a first pull-down transistor, having coupled drains that define a first storage node. The SRAM cell further includes a first N-type pass-gate transistor having a first drain coupled to a write bit line, a first source coupled to the first storage node, and a first gate coupled to a first write word line. The SRAM cell further includes a first P-type pass-gate transistor having a second drain coupled to the write bit line and a second source coupled to the first storage node. The SRAM cell further includes a P-type transistor having a third drain, coupled to a second gate of the first P-type pass-gate transistor, a third source coupled to a second write word line, and a third gate coupled to an enable signal.

In an embodiment, a device includes: a first transistor including a first gate structure; a second transistor including a second gate structure, the second gate structure disposed above and coupled to the first gate structure; a third gate structure; a fourth gate structure, the fourth gate structure disposed above and coupled to the third gate structure; a gate isolation region between the first gate structure and the third gate structure, the gate isolation region disposed between the second gate structure and the fourth gate structure; and a cross-coupling contact extending beneath the gate isolation region, the first gate structure, and the third gate structure, the cross-coupling contact coupled to the first gate structure.

The invention discloses a high-speed level conversion circuit, and belongs to the technical field of integrated circuit design, the circuit mainly comprises an input signal processing module, a voltage boosting module, a differential signal generation module, a signal amplification module and an output module, the input signal processing module converts a low-voltage input signal into a complementary logic signal pair; the voltage boosting module raises the voltage amplitude of the complementary logic signal by using a charge pump principle; the lifted signal drives a thick gate transistor in the differential signal generation module to generate a differential signal; the signal amplification module adopts a cross coupling structure to quickly amplify the differential signal; and finally, the output module outputs a high-voltage domain signal in an inverted manner. By introducing voltage bootstrap before gate driving, the overdrive voltage of a core switch tube is remarkably increased, so that the problem of low conversion speed of a traditional level conversion circuit is effectively solved on the premise of not increasing the device size and static power consumption, and high-speed and high-efficiency level conversion is realized.

The invention provides a multi-phase clock generator which outputs N injection current signals corresponding to different phases by processing an input clock signal, N is an integral multiple of 4, and a cross-coupled loop is arranged in a cross-coupled ring oscillator. The loop is respectively coupled with output nodes in N / 4 secondary ring oscillators based on a phase sequence, and the secondary ring oscillators realize high-working-frequency and high-stability oscillation frequency output and low-error phase alignment through a cross coupling mechanism, so that the secondary ring oscillators can output N oscillation clock signals with equally-spaced phases, and the phase alignment is realized. Since the injection current signal is input into each output node in the secondary ring oscillator based on the phase sequence, the frequency and the phase of the secondary ring oscillator are locked, the frequency is the same as the frequency of the input clock signal, and the phase noise is very low, so that the frequency and the phase of the secondary ring oscillator are locked. According to the invention, a high-speed multi-phase clock signal with low phase noise and high phase precision can be generated.

The invention discloses a decoupling vibration isolation composite beam frame structure shaped like a Chinese character'tian 'and a high-precision four-mass double-shaft micro-accelerometer thereof. The structure comprises at least four outer ring straight beam mechanisms and at least four decoupling vibration isolation rings. The accelerometer comprises a substrate layer and a device layer, and the device layer comprises the decoupling vibration isolation composite beam frame structure shaped like the Chinese character'tian ', an X-axis dual-mass sensing unit and a Y-axis dual-mass sensing unit. The problem of inter-axis cross coupling of double-axis acceleration detection is solved, isolation and vibration reduction of the MEMS accelerometer to the surrounding environment are achieved, and the influence of temperature and environment vibration on the measurement precision of a device is effectively restrained; by adopting a mode of crosswise arranging the electrode positions, the output error of the MEMS microstructure caused by process mismatch can be effectively inhibited, so that the output precision of the device is improved; each axial direction is designed in a combination mode that double mass sensing unit modules are connected in parallel, so that the detection sensitivity of the device is improved exponentially.

A level shifter includes: a low voltage domain configured to output non-overlapping first and second current pulses based on opposite edges of a logic input signal; and a high voltage domain comprising a latch and a current mirror circuit configured to mirror the non-overlapping first and second current pulses such that the latch is set when the first current pulse is active and reset when the second current pulse is active. The current mirror circuit includes a first mirroring path for the first current pulse and a second mirroring path for the second current pulse. The level shifter has a common mode slew current that is added to the non-overlapping first and second current pulses. The first mirroring path and the second mirroring path are cross-coupled such that the common mode slew current is reduced or cancelled before the non-overlapping first and second current pulses are input to the latch.

The invention discloses an ECPT system based on a bilateral LC and bilateral LCLC hybrid compensation network, and relates to the technical field of wireless electric energy transmission, the ECPT system comprises an electric energy transmitting end and an electric energy receiving end, two sets of coupling mechanisms of which the cross coupling capacitance can be neglected respectively use bilateral LC and bilateral LCLC topologies for compensation, and the two are connected with an inverter and a load through series input and series output combination. The bilateral LC compensation topology and the bilateral LCLC compensation topology both adopt constant current mode matching, the system can achieve the constant current output characteristic irrelevant to the load, and due to the fact that the output characteristics of the two compensation topologies and the coupling mutual capacitance CM are in a complementary relation, the system can basically achieve constant power output under the change of the coupling mutual capacitance CM. And good anti-coupling mechanism deviation performance is shown.

The invention provides a voltage stability control method for a multi-output switching power supply, which comprises the following steps of: sampling a main output channel in real time to obtain a voltage signal; the voltage signal is processed through a wide bandwidth error amplifier, a main channel adjusting signal is generated, and the main channel adjusting signal is used for driving a main power switch device; receiving an input voltage fluctuation frequency band of an auxiliary channel, a load current transient change gradient and a frequency spectrum coupling characteristic of a main channel adjusting signal through a dynamic prediction model, and generating an auxiliary channel adjusting signal with a phase lead compensation characteristic; a cross coupling active offset mechanism is constructed, time domain-frequency domain characteristics of coupling interference are extracted through a high-precision differential detection circuit, amplitude-frequency adjustable reverse correction signals are generated in real time through an adaptive compensation algorithm and injected into control nodes of an auxiliary output channel, and dynamic decoupling and ripple suppression are carried out. According to the method, high-stability control of multi-channel voltage under all working conditions is realized, and the dynamic response speed and the anti-interference capability are improved.

The invention belongs to the field of wireless communication, and particularly relates to a Butler matrix feed network with a slow wave structure, which comprises a substrate integrated waveguide and a Butler matrix feed network formed on the substrate integrated waveguide, the Butler matrix feed network comprises a first 3dB coupler, a second 3dB coupler, a third 3dB coupler, a fourth 3dB coupler, a first cross coupler, a second cross coupler, a first 45-degree slow wave loading phase shifter, a second 45-degree slow wave loading phase shifter, a first 0-degree slow wave loading phase shifter and a second 0-degree slow wave loading phase shifter. According to the Butler matrix feed network, a row of non-radiation transverse slots are introduced into each phase shifter to serve as phase delay lines, so that the structure size of the Butler matrix feed network is reduced, and the dispersion is reduced.

A compact substrate integrated waveguide triangular cavity dual-band band-pass filter is sequentially provided with an upper metal layer, a dielectric layer substrate clamped between the two metal layers and a lower metal layer from top to bottom, and the upper metal layer is connected with the lower metal layer through a metalized via hole. The middle dielectric layer substrate and the middle dielectric layer substrate form a cavity filled with dielectric, and the shape of the cavity is an isosceles right triangle. The whole filter is composed of four isosceles right-angle triangular cavities, and the whole filter is of a square structure. According to the invention, the passband parallel connection technology and the harmonic coupling control technology are combined, and the mode cross coupling technology is used, so that double passbands are realized, a transmission zero point is generated on a transition band between the two passbands, and the isolation degree between signals passing through the two passbands is improved. In addition, the whole filter is very simple and compact in structure.

A noise-shaping successive-approximation register (SAR) analog-to-digital converter (ADC) (SAR ADC) including a noise-shaping (NS) filter, a comparator, a differential input path between the NS filter and the comparator, and a cross-coupled set of capacitive elements coupled to the differential input path.

The invention relates to a class-C voltage-controlled oscillator with negative-pressure substrate bias and a use method thereof. Aiming at the problem that a traditional C-type voltage-controlled oscillator is difficult to start, the C-type voltage-controlled oscillator provided by the scheme adopts different circuits to simultaneously control the grid voltage and the substrate voltage of the cross-coupled pair transistors, so that the transistors are effectively prevented from entering a linear region, and the C-type voltage-controlled oscillator is quickly started and stably works in a C-type oscillation mode. The circuit structure of the scheme comprises an NMOS (N-channel Metal Oxide Semiconductor) cross coupling circuit, a PMOS (P-channel Metal Oxide Semiconductor) cross coupling circuit, an LC resonant cavity circuit, an amplitude detection circuit, a Schmidt signal processing circuit and a negative voltage charge pump circuit. Wherein the Schmidt signal processing circuit and the negative voltage charge pump circuit rapidly process an initial oscillation signal and provide negative voltage required by the system, and a substrate of the NMOS cross coupling tube is biased. According to the scheme, the design structure is simple, the tuning range is wide, and a new thought is provided for research and design of quick start of the C-type voltage-controlled oscillator.

The invention relates to a high-dynamic gantry control method, system and device based on a PMAC controller and a medium, and the method comprises the steps: screening, optimizing and deploying a cross-coupling synchronous control strategy algorithm; executing at least one pre-operation of double-drive-shaft setting, double-drive-shaft motor debugging, double-drive-shaft motor control parameter tuning, double-drive-shaft motor zeroing and gantry motion program configuration; a deployed algorithm is adopted, and synchronous control of the double-drive shaft is divided into one path of synchronous following instruction and the other path of feedback closed-loop control instruction based on the position deviation of the double-drive shaft; the synchronous following instruction and the feedback closed-loop control instruction are sent to a driver to be amplified to control the motors, and feedback signals of the motors are received to achieve closed-loop control over the motors. Therefore, through a series of innovative strategies and optimization measures, high-precision and high-dynamic control over the gantry double-drive shaft is achieved, and remarkable technical progress and application value are brought to the field of industrial automation and precision machining.

The invention discloses a floating-point number index maximum value searching circuit and an in-memory computing chip. The searching circuit comprises an SRAM (Static Random Access Memory) unit matrix which comprises a plurality of rows and columns of SRAM units, wherein each unit comprises NMOS (N-channel Metal Oxide Semiconductor) tubes N1-N5 and PMOS (P-channel Metal Oxide Semiconductor) tubes P1 and P2; n1, N2, P1 and P2 are in reverse cross coupling to form a pair of storage nodes Q and QB; the grid electrode of the N5 is connected with a node QB; the grid electrode of the N3 in the ith row is connected with a word line WLLlt; igt; the grid electrode of the N4 is connected with a word line WLRlt; igt; ; the drain electrode of each column of N5 is connected in series with the source electrode of the next column of N5, and the source electrode of the first column of N5 is connected with a signal SELlt; igt; the N5 drain electrode of the last column is connected with a signal PRE; in the jth column, N3 is a corresponding node Q and a bit line BLlt; jgt; the transmission tube N4 is a corresponding node QB and a bit line BLBlt; jgt; and a transmission tube. According to the invention, the number of searching cycles is saved, the calculation time is shortened, the subsequent calculation amount is reduced, the efficiency is improved, the power consumption is reduced, and the defects of relatively high power consumption, complex hardware implementation, relatively long calculation delay and the like of an existing circuit are overcome.

An example system for passive sensing includes a coupled pair of resonators including a sensor resonator and a reader resonator, the sensor resonator including a resistor a loss associated with the resistor, and the reader resonator including a MOS cross-coupled pair that implements a nonlinear gain of the reader resonator via compressive saturation of negative resistance. An amplitude detector measures the amplitude of oscillations associated with the reader resonator, and the negative resistance is determined based on the measured amplitude of oscillations associated with the reader resonator when the measured amplitude reaches a steady state, i.e., when the gain of the reader resonator balances the loss of the sensor resonator. The resistance associated with the resistor of the sensor resonator may be determined based on the determined negative resistance. When the resistor is a resistive sensor, indications of measurements by the resistive sensor may be determined in this way.

The invention discloses a 23T4M anti-radiation TCAM storage unit circuit which comprises a pre-charging module, an RH reading circuit module, a programmable logic module, a reconfigurable magnetic tunnel junction storage module, a discharging module and an output module. In the RH reading circuit module, the grid electrode of a transistor N7 is connected with the drain electrode of a transistor N8, the grid electrode of the transistor N8 is connected with the drain electrode of the transistor N7, a cross coupling structure is formed, a node S0 and a node S1 are controlled by a node Q and a node QB, meanwhile, the node S0 and the node S1 control the charging and discharging paths of the node Q and the node QB respectively, and after any node is overturned by high-energy particles, the charging and discharging paths of the node Q and the node QB are controlled by the node S0 and the node S1. All the nodes are maintained or charged to recover to the original logic level. According to the method, data upset at a single sensitive node can be completely resisted, and meanwhile, the search error rate of the TCAM is improved.

The invention discloses a ferroelectric field effect transistor-based continuous time physical Isin machine and a solving method thereof, and belongs to the technical field of novel circuit design and calculation. A sigma circuit of the Isin machine is of a latch structure formed by connecting two phase inverters through two switches in a cross coupling mode, each phase inverter is composed of an n-type FeFET and a p-type FeFET, a J circuit of the Isin machine is composed of four FeFETs and used for programming the coupling relation and strength between sigma 1 and sigma 2, continuous time solution is achieved by programming the FeFETs of the J circuit, and therefore the coupling relation between sigma 1 and sigma 2 is obtained. And by continuously modulating the threshold voltage of the FeFET, the continuous modulation of the coupling strength can be realized, and a plurality of coupling coefficient circuits are not needed. Compared with a traditional continuous time physical Isin machine, the method has the advantages that the hardware overhead is greatly reduced, and the solving power consumption is reduced.

The present invention belongs to the technical field of parameter identification for permanent-magnet synchronous motors. Disclosed are a parameter identification method and apparatus for a permanent-magnet synchronous motor, and a storage medium and a device. The method comprises: using a variable step-size feedback neural network algorithm to solve a voltage equation and a d-q axis current discrete state equation, which take cross-coupled inductance into consideration, of a permanent-magnet synchronous motor in a dq coordinate system, so as to obtain intermediate parameters generated in the process of constructing the d-q axis current discrete state equation; and performing calculation on the basis of the intermediate parameters, so as to obtain the stator resistance, the d-axis inductance, the q-axis inductance, the cross-coupled inductance and the permanent-magnet flux linkage of the permanent-magnet synchronous motor, and thereby completing parameter identification. The present invention takes cross-coupled inductance into consideration and uses the variable step-size feedback neural network algorithm, such that the computational load is extremely small, the degree of complexity is reduced, rapid and effective identification can be realized, and errors can be reduced; in different convergence time periods, the algorithm adjusts the step size on the basis of the magnitude of steady-state errors, such that identification results approach stable values more quickly, thereby improving the speed and stability of convergence.