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315results about "Continuous tuning details" patented technology

Integrated spiral inductor

An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors with shields to increase circuit Q. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
Owner:AVAGO TECH INT SALES PTE LTD

Digitally adjustable inductive element adaptable to frequency tune an LC oscillator

A digitally adjustable inductive element which can be implemented in an integrated circuit. The digitally adjustable inductive element can include a first inductor, and a digital inductance controller operatively coupled to the first inductor which can be utilized to vary the effective inductance of the first inductor. The digitally adjustable inductive element can include a second inductor operatively coupled to the first inductor, and a digital current controller operatively coupled to the second inductor. The digital current controller can include a number of transistors operatively coupled to the second inductor. The digitally adjustable inductive element can be utilized to create a tunable oscillator. The tunable oscillator can include a first inductor, a digital inductance controller operatively coupled to the first inductor which can be utilized to vary the effective inductance of the first inductor, and an oscillator circuit which generates an oscillating signal utilizing the effective inductance of the first inductor. The tunable oscillator can include a second inductor operatively coupled to the first inductor, and a digital current controller operatively coupled to the second inductor. The digital current controller can include a number of transistors operatively coupled to the second inductor.
Owner:IBM CORP

Digital IF demodulator with carrier recovery

A digital IF demodulator receives and demodulates an analog IF input signal to produce a digital audio signal and a digital video signal. The digital IF demodulator includes an A / D converter, a first digital complex mixer, a second digital complex mixer, and various digital filters. The first digital complex mixer receives the output of the A / D converter and down-converts the output of the A / D converter to baseband. Additionally, the picture carrier is recovered from the output of the first digital complex mixer, and fed back to a direct digital synthesizer to control the tuning accuracy of the first digital complex mixer. More specifically, a feedback loop is formed to so that the picture carrier is down-converted to DC so as to control the tuning accuracy of the first digital complex mixer. The complex output of the first complex mixer is further processed using Nyquist filtering and other filtering to recover the digital video signal. The digital audio signal is recovered by further processing the output of the first digital complex mixer. With the picture carrier located at DC, the audio signal is shifted off DC by approximately 4.5 Mhz. A second complex mixer down-converts the output of the first digital complex mixer so that the audio signal at 4.5 MHz is down-converted to baseband. After filtering and demodulation, the digital audio signal is recovered.
Owner:AVAGO TECH WIRELESS IP SINGAPORE PTE

System and method for ESD protection

An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
Owner:AVAGO TECH WIRELESS IP SINGAPORE PTE
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