The invention relates to an AIS receiver based on the superheterodyne principle. The AIS receiver taking the FPGA as a control core comprises a simulation front-end module, a primary frequency mixing module, a secondary frequency mixing module, a base band demodulation module, a PLL module, a clock management module, a power supply management module, an FPGA controller module and a serial port driver module. According to the invention, by use of a low-noise amplifier and an AGG circuit, the dynamic range is wide, weaker signals can be captured, and ships in the longer distance can be detected; by use of an intermediate frequency signal processing chip with quite high demodulation sensitivity, the sensitivity of the receiver is further improved; by use of the CMX7042, demodulation, decoding and verification of base band signals are achieved, system design is simplified, and cost is controlled; and temperature-compensation crystal oscillators are used for supplementing the system clock, and a clock fan-out chip is used for carrying out unified distribution, synchronization of the system is achieved, output frequency stability of a phase-locked loop is improved and precision of the system is further improved.