201 results about "Direct-conversion receiver" patented technology

An apparatus and method to reduce interference in a communication device particularly effective for second-order interference in direct conversion receiver from a co-located transmitter. This is accomplished by characterizing a transfer function of a transmission path from the transmitter to the receiver and applying this transfer function to the baseband signal from the transmitter to provide an estimation of interference to be expected in the received signal. The estimated interference is subtracted from the receiver baseband signal to reduce interference. Adaptive filtering can also be applied to further minimize interference dynamically.

A system and method for generating a local oscillator (LO) frequency in a zero intermediate frequency (IF) receiver or transmitter is presented. A signal is received from a voltage controlled oscillator (VCO). The signal has a VCO frequency. The VCO frequency is divided by a number N to produce a signal having a divided-down frequency. The signal having the VCO frequency is then mixed with the signal having the divided-down frequency to produce an output signal having an output frequency. Local oscillator leakage is reduced. Thus, the receiver or transmitter may operate in multiple wireless communication bands and modes and meet the associated specifications.

In a frequency modulation radio receiver with direct conversion, a local oscillator signal is generated having a frequency within a preselected frequency range and the frequency is varied in response to a variable low frequency signal; the local oscillator signal is mixed with a received signal to provide a baseband signal. The variable low frequency signal is generated by a controlled oscillator in inverse relationship to a direct current component in said baseband signal. In a frequency modulation radio transceiver a broadcast function is provided by varying the low frequency signal with an information signal with the resulting local oscillator frequency being varied accordingly and amplified for broadcast. The transceiver is controlled to operate alternately in either a receive mode and a broadcast mode at substantially the same frequency. While in the receive mode the controlled oscillator causes the local oscillator signal to be drawn toward the carrier frequency of a received signal yielding preferred direct conversion of modulating information into the base band.

Multi-mode-multi-band direct conversion receiver with complex I and Q channel interference mitigation processing for cancellation of intermodulation products are described. In one embodiment, a method comprising over sampling of the entire receiver passband to acquire the IMP source signals that can generate IMPs within the SOI, using these signals to generate a coherent complex I-Q channel estimates of the interference and (after phase and amplitude adjustment) using these estimates to cancel the SOI inband IMPs in the I and Q channels independently and simultaneously in near real time, generating estimates of 2^nd and 3^rd order IMP products, adjusting the phase and amplitude of the estimates and using the estimates to cancel the SOI inband IMPs on the I ad Q channels independently and simultaneously in real time or very near real time, sampling of the transmitter feed thru signal and blocking signals and computing the cross modulation products estimate and adjusting the phase and amplitude and using the estimate to cancel the SOI inband cross modulation products energy in real time or near real time in the I and Q channels of the receiver, using the cross modulation cancellation to cancel of the effects of the on chip transmitter feed thru to support building a single transceiver chip with full duplex operation with cancellation being done independently and simultaneously on the I and Q channels of the receiver, and creation of an estimate of the DC offset in the receiver and adjusting the amplitude of the DC offset in a near real time closed loop fashion to cancel the DC offset in the I and Q channels independently and simultaneously and adjusting the rate of update to match system parameters.

A direct current (DC) offset correction system for a direct conversion receiver and corresponding receiver and methods facilitate reduction of DC offsets in such receivers. One method includes calibrating a DC offset correction system in a closed loop configuration over each of a plurality of gain settings to provide a plurality of offset data for an operating mode of the direct conversion receiver; selecting one of the plurality of offset data based on a current gain setting of the direct conversion receiver as supplied, e.g., by an AGC system; and operating the DC offset correction system in an open loop configuration using the one of the plurality of offset data to correct for a DC offset in the direct conversion receiver.

A novel method and apparatus for calibrating DC offsets in a direct conversion receiver. The present DC offset calibration method and apparatus comprises a direct conversion receiver equipped with a frequency shifter means and a DC offset measurement and correction technique. In accordance with the present invention, DC offsets are calibrated in direct conversion receivers through an inventive method including two steps: a DC offset measurement step and a DC offset correction step. In the DC offset measurement step the frequency of a local oscillation signal (typically generated by a voltage-controlled oscillator (VCO)) is shifted by a selected frequency shift value during the inactive time intervals of the receiver. DC offsets are measured while the frequency of the down-conversion oscillation signal is shifted by the frequency shift value. Before the inactive time interval expires, the frequency of the down-conversion oscillator signal is shifted back to its original value. In the DC offset correction step of the present invention incoming signals are corrected using a correction means that removes the DC offset measured during the DC offset measurement step.

A determining section (18) and gain variation amount detecting section (9) detect a period having a possibility of a DC-component offset in an internal circuit of a direct conversion receiver increasing beyond an allowable value due to AGC operation, and during the period, a cut-off frequency of each of high-pass filters (12a to 12d) is set at a frequency higher than that in general operation, thereby rapidly converging transient responses of signals passed through the high-pass filters, while controlling precisely operation timings of reception power measuring section (16), gain calculating section (22), gain control section (23) and circuit power supply control section (24) composing an AGC loop, whereby the DC offset is prevented from increasing and stable circuit operation is assured. It is thereby possible to achieve further reductions in size and power consumption of a CDMA receiver using the direct conversion receiver.

An OFDM transceiver has a transmitter, a receiver, and a loopback switch. The loopback switch configured is for selectively establishing a physical connection between an output terminal of the transmitter and an input terminal of the receiver. The transmitter is configured for outputting to the output terminal an OFDM signal generated based on a local oscillator signal. The receiver is configured for demodulating the OFDM signal, received via the physical connection, using the local oscillator signal and determining amplitude and phase imbalance parameters based on performing frequency-domain estimation of amplitude and phase imbalances. Hence, the receiver is configured for performing imbalance compensation on a received wireless OFDM signal based on the determined amplitude and phase imbalance parameters. Hence, amplitude and phase imbalances can be estimated accurately despite channel fading and frequency variations encountered between the transmitter of the wireless OFDM signal and the receiver.

A radio frequency transceiver (102), including a transmitter (104), a duplexer (108) and a direct-conversion receiver (106) including a mixer (140 and 141). An IIP2 calibration system (170), coupled to the transceiver, includes an IIP2 coefficient estimator (172) for calculating an estimate of second-order distortion intermodulation distortion, and an IIP2 controller (174) for adjusting an IIP2 tuning port of the mixer in the receiver to minimize second-order distortion intermodulation distortion in the receiver that may be caused by the receiver receiving a transmit RF signal leaking through the duplexer.

A current-mode direct conversion RF receiver is presented. In one set of embodiments the RF receiver comprises a simple transconductor input stage to create a current-mode modulated signal from a voltage-mode modulated signal. A downconversion mixer may be coupled to the transconductor input stage via a low impedance current cascode stage, and may operate to create a set of current-mode quadrature baseband signals from the current-mode modulated signal. The downconversion mixer may be implemented with a transistor-switching network, which may be driven by a phase locked loop (PLL) with quadrature outputs. The set of current-mode quadrature baseband signals may be converted back to the voltage domain by a transimpedance filter, which may perform channel selection for the receiver. The transimpedance filter may additionally include a low frequency zero to remove DC offsets. The receiver may be implemented using CMOS design technologies and operated with minimal self-mixing effects, minimal DC offset in the baseband signal, and utilizing low voltages.

A wireless communications mobile station (10) includes at least one antenna (240) and a RF transceiver (210,220) containing a direct conversion receiver (1) coupled to the antenna. The direct conversion receiver contains a low noise amplifier (3) for amplifying a received RF signal and for outputting the amplified RF signal to a current switching down-conversion mixer (4). The down-conversion mixer has a first input node for receiving the amplified RF signal, a second input node for receiving a local oscillator (LO) signal for mixing with the amplified RF signal and an output node coupled to an input of an operational amplifier forming a low pass filter (5A). In accordance with an aspect of this invention the low pass filter has a low pass pole generated by a resistor R and a capacitor C coupled in parallel in a feedback path of the operational amplifier, where a low pass comer frequency of the low pass filter is inversely proportional to the product of R and C. In a preferred embodiment at least the down-conversion mixer and the low pass filter are implemented as part of an integrated circuit, and the resistor and the capacitor are fabricated within the integrated circuit.

A mixer for use in a direct conversion receiver includes a compensating differential amplifier which injects equal amplitude opposite phase currents with respect to even order distortion currents. The compensating differential amplifier utilizes an ideal current source. The mixer is an active mixer which utilizes four switching transistors. The even order distortion is introduced by non-linear components which demonstrate strong off-channel signals.

An apparatus and method for receiving and processing multiple independent, uncorrelated RF signals is presented. The apparatus includes a Hybrid-Direct Conversion Receiver incorporating front end branches, protocol-specific digital processing branches, an interference detector, a correlator, and an offset control for controlling oscillator sources. The front end branches each contain a preselector that filters received signals and a mixer that down converts the received signal to an IF offset from a reference frequency by a unique offset. The bandwidth of an IF processor is partitioned into sub-channels corresponding to the different offsets and is wider than the combination of the sub-channels. The interference detector and correlator determine whether a particular desired signal is degraded by interference signals and select a new sub-channel. This information is provided to the offset control, which adjusts a LO source coupled to the corresponding down mixer accordingly.

A direct conversion receiver apparatus includes a local oscillator to produce a first local oscillation signal and a second oscillation signal. A first modulation circuit modulates the first local oscillation signal, and a second modulation circuit modulates the second local oscillation signal. A RF mixer mixes a received radio frequency signal with the modulated first local oscillation signal, and another RF mixer mixes the received radio frequency signal with the modulated second local oscillation signal. Demodulating circuits translate desired signals of the mixed signal from the RF mixers into band and translate undesired signals of the mixed signal out of band. Filters remove the undesired signals from the demodulated signals.

A feedforward error-compensated receiver for minimizing undesired odd-order nonlinear distortion products. The receiver includes a first receiver path configured to receive an input signal. The first receiver path outputs a signal including at least one baseband (BB) frequency. At least one second receiver path is configured to receive the input signal and to provide a second receiver path output signal. The second receiver path includes at least one odd-order nonlinear distortion reference generator. The at least one odd-order nonlinear distortion reference generator and the mixer are configured to generate a synthetic odd-order nonlinear distortion signal. A combining element is configured to receive the output signal from the first path and the output signal from the second receiver path output and to combine the signals such that the odd-order nonlinear distortion signals are substantially attenuated at an output of the combining element.

A receiving method and a direct conversion receiver are provided. The receiver comprises a mixer (308) for mixing a received signal into a base band signal com-prising I and Q branches, and an A/D converter (316) for converting the base band signal into digital form, and a phase adjuster (318) for performing a frequency selective IQ phase error estimation and for correcting the digitised signal with frequency selective correction factors based on the error estimation.

The DCOC block is used in ZIF BB to form HPF function to cancel dc offset with a penalty of small silicon area and low power consumption. It is a LPF plus a voltage to current conversion (VIC) resistor, and can hook up with any BB opamp used in signal path, to form a feedback loop, with or without signal gain stages in the loop. The BB opamp is used as a summing point. The summing method is input current summing. The cutoff frequency of the HPF function is thus defined by the integrator, the VIC resistor, and the feedback resistor in the summing opamp. The presence of the VIC resistor can drastically reduce the integrator capacitor and resistor values and thus save silicon area or improve receiver performance.

A low voltage, low power, high linearity active CMOS mixer for radio frequency (RF) wireless communication applications consists of high linearity RF transconductor to convert the incoming RF voltage into a RF current; an ac-coupling stage to deliver the RF current to the next stage, and to block the DC signal and the flicker noise of the RF transconductor; followed by a current commutating (mixing) stage to down-convert the RF signal to the desired intermediate frequency (IF), and an IF section that converts the down-converted signal current back to voltage. The invention suggests a novel low-voltage, low-power RF mixer circuit that exhibits a high linearity in terms of IIP2 and IIP3 and is suitable for a low voltage, direct conversion receiver (DCR) which requires a relatively high IIP2. The DCR is a candidate for the fourth generation of mobile communication systems (4G).

The invention relates to a method for adjusting IQ-imbalance of a direct conversion receiver (200). In the method a radio frequency training signal is locally generating and conveyed to an in-phase branch and a quadrature-phase branch of the receiver (200). The method comprises mixing, in the analogue domain, the radio frequency training signal of the in-phase branch with a first mixing signal to form a baseband in-phase component (I) of the training signal and mixing, in the analogue domain, the radio frequency training signal of the quadrature-phase branch with a second mixing signal to form a phase shifted component (Q) of the training signal. The baseband in-phase component (I) and phase shifted component (Q) are analogue-to-digital converted to form a digital baseband in-phase component and a digital baseband phase shifted component of the training signal. In the method the digital baseband in-phase and phase shifted components of the training signal are analyzed, in a digital demodulator (210), so as to detect the IQ-imbalance of the direct conversion receiver (200). The IQ-imbalance is corrected, based on the analysis, in the analogue domain.

A MIMO transceiver integrated circuit (IC) includes a plurality of multiple band direct conversion transmitter sections, a plurality of multiple band direct conversion receiver sections, and a local oscillation generation module. Each of the plurality of multiple band direct conversion transmitter sections includes a transmit baseband module and a multiple frequency band transmission module. Each of the plurality of multiple band direct conversion receiver sections includes a multiple frequency band reception module and a receiver baseband module. The local oscillation generation module is operably coupled to generate the first frequency band local oscillation when the multiple band MIMO transceiver IC is in a first mode and operably coupled to generate the second frequency band local oscillation when the multiple band MIMO transceiver IC is in a second mode.

A frequency mixing circuit and a frequency mixing method. The frequency mixing circuit includes first and second differential amplifiers, a subtracter and a mixer. The first differential amplifier amplifies a first pair of input signals having a first frequency to generate a first differential signal. The second differential amplifier amplifies a second pair of input signals having the first frequency orthogonal to the first pair input signals to generate a second differential signal. The subtracter subtracts the second differential signal from the first differential signal. The mixer mixes the subtracted signal with a first and second pairs of drive signals having a second frequency orthogonal to each other, in a sub-harmonic double balanced mixing mode, so that the mixer generates a pair of output signals orthogonal to each other without secondary harmonics.