55 results about "Loop stability" patented technology

The invention discloses a pre-oscillation stability monitoring active damper for a grid-connected power electronic system, and belongs to the technical field of power electronics. Comprising the steps that a direct-current voltage control loop stabilizes energy storage; the stability monitoring loop calculates power grid impedance and inverter impedance based on fundamental wave separation and FFT (Fast Fourier Transform) through phase-locked synchronous broadband pulse disturbance injection, and generates an activation signal by utilizing an MPC criterion; the damping control loop starts the virtual resistor according to the activation signal, and the virtual resistor is dynamically adjusted through closed-loop optimization, so that the stability margin of the system is close to a critical value. Interference before oscillation is achieved, the problems of response delay, high energy consumption and poor compatibility of a traditional scheme are solved, simulation shows that the harmonic suppression response time is smaller than or equal to 20 ms, and THD is reduced to 0.57%.

The invention discloses a power supply detection device and a test method thereof, particularly relates to the field of power electronic control, and is used for solving the problems of high-frequency phase distortion and incapability of reflecting a stability boundary under a real load dynamic state in an open-loop state caused by introduction of additional impedance due to disconnection of a loop in an existing open-loop injection test method. A switching node voltage ripple signal is synchronously collected as a disturbance input signal and an output voltage feedback signal is synchronously collected as a response output signal in a power supply closed-loop state; performing time domain alignment on the two signals to generate a time correlation signal pair; fourier transform is carried out on the signal pair to extract open-loop transfer function characteristics; mapping the characteristics to an intersection phase angle of a Nyquist plane identification curve and a unit circle; generating a chaos distortion index based on the local curvature change characteristics of the Nyquist curve of the intersection neighborhood; and correcting the phase angle of the intersection point by using a chaotic distortion index, and outputting a loop stability evaluation conclusion according to a correction result, thereby realizing high-precision stability evaluation of uninterrupted closed-loop control.

The invention relates to the field of LPV system tracking control, in particular to a robust tracking control method for a data-driven LPV system under an event triggering strategy. The method comprises the following steps: 1, introducing an integral compensator, and popularizing a perturbation LPV system to an augmented perturbation LPV system; and 2, based on an LPV system-continuous excitation condition, collecting data such as a state variable and a scheduling variable of an unknown augmented perturbation LPV open-loop system, and establishing closed-loop representation of the LPV system based on the data. 3, based on the closed-loop data representation of the augmented perturbation LPV system, synthesizing data to drive a controller, and ensuring the closed-loop stability of the system; 4, on the basis of the whole-block S-process, infinite constraints in semi-definite programming for controlling gain calculation are converted into limited constraints calculated on vertexes of a polyhedron; 5, designing an event triggering strategy, and designing a controller for ensuring the closed-loop stability performance of the augmented perturbation LPV system; and 6, performing robust tracking control applied to the augmented perturbation LPV system.

The invention relates to the technical field of overload protection, in particular to a modularly-designed switch socket overload protection optimization system and method, and the method comprises the steps: obtaining the lower surface performance of a contact in a power-on state, extracting resistance jump data, recognizing an offset concentration trend, and judging a conduction instability behavior. Analyzing a path action and feedback response difference value to identify the failure of the main path, matching the power-off consistency of the standby path, confirming the continuous circuit cut-off and false triggering exclusion state of the loop, and forming a closed-loop disposal result. Abnormal offset distribution judgment is achieved by recognizing the contact surface state and the resistance jump amplitude, the conduction instability behavior is analyzed and judged in combination with the offset sequence increment trend, path failure is recognized by comparing the main and standby path response time sequence with the feedback difference value, the action response and current interruption matching relation is analyzed, the standby path execution effect is confirmed, and the stability of the circuit is improved. And the power-off closed-loop stability is improved by combining current cut-off and signal state judgment.

The invention provides a permanent magnet synchronous motor rotating speed control method and system, and belongs to the technical field of motor control. The method comprises the following steps: firstly, constructing a discrete time mathematical model of a motor and an external source system comprising a lumped reference signal and lumped interference, and establishing a composite system model according to the discrete time mathematical model; then, constructing a dimensionality reduction observer to estimate an external source signal, and performing state and input transformation in combination with a regulator equation; thirdly, constructing a constraint set of the transformation system, and decomposing a state variable into a nominal component, a deterministic error component and an uncertain error component; a time-varying constraint tightening set is dynamically constructed according to the error, a model prediction control optimization problem with dynamic tightening constraint is solved online, and a nominal control quantity is obtained; and finally, combining the nominal control quantity and the estimated external source signal to synthesize an actual control voltage. According to the method, interference can be effectively suppressed, system security constraints are strictly ensured, recursion feasibility and closed-loop stability of control are ensured, and the dynamic response speed is increased.

The invention discloses a boost control circuit and control method based on current sampling, the boost control circuit comprises a boost conversion module, a current sampling module, a voltage sampling module and a control module, the input end of the current sampling module is connected with the current sampling end of the boost conversion module, and the output end of the current sampling module is connected with the first input end of the control module; the input end of the voltage sampling module is connected with the voltage output end of the boost conversion module, and the output end of the voltage sampling module is connected with the second input end of the control module; the output end of the control module is connected with the control end of the boost conversion module. According to the boost control circuit, through cooperative detection of the current sampling module and the voltage sampling module and in combination with a double-loop adjustment mechanism of the control module, the stability of a loop is improved, the control bandwidth is optimized, and therefore the situation that the dynamic performance is affected due to the stability requirement is avoided.

The invention provides a bus voltage regulation method, which comprises the following steps: S1, in the case of no overload, a DC / DC (Direct Current / Direct Current) outputs constant voltage, and a first bus voltage target value is set; s2, when the load is overloaded, the DC / DC outputs constant current, and a second bus voltage target value is set; s3, judging whether the second bus voltage target value is greater than the first bus voltage target value, if so, selecting the first bus voltage target value, otherwise, selecting the second bus voltage target value; and S4, based on the first bus voltage target value or the second bus voltage target value, multiplying the first bus voltage target value or the second bus voltage target value by a fixed coefficient to obtain a final bus voltage target value, through the method, the method can be suitable for bus voltage regulation under various load working conditions such as normal load, overload and derating, the bus voltage is more stable, and the loop stability is better.

This invention discloses a gain-balanced fault-tolerant control method for a redundant-driven multi-degree-of-freedom motion table. The method designs corresponding output decoupling matrices for the case of complete failure of any actuator in the redundant-driven multi-degree-of-freedom motion table. These matrices can be switched via a gain balancing module when an actuator fails, thus controlling the logic axis control signal u after the complete failure of a single actuator. cor Reassigning to the remaining actuators produces the same output as before the failure. act This method ensures that the motion table system P can still track the reference position signal r, significantly improving the reliability and fault tolerance of the redundantly driven multi-degree-of-freedom motion table system. This method not only achieves good motion control and high tracking accuracy when the actuators are fault-free, but also provides good fault-tolerant control even when a single actuator of the redundantly driven multi-degree-of-freedom motion table completely fails, guaranteeing the closed-loop stability and tracking accuracy of the motion table system.

The invention provides a power hardware-in-the-loop interface compensation method based on power amplifier parameter identification. Parameter identification is carried out on a power amplifier system, parameter information of a passive device in the power amplifier is estimated, and the robustness of the system to parameter changes is improved. Due to the existence of a filter in a power amplifier, deviation of actual power transmission and ideal power transmission characteristics is generally caused, and the amplitude and phase angle deviation caused by the filter is compensated through parameters identified in an interface method, so that the power transmission precision is improved, and the reliability of power hardware in the loop is improved. In addition, the compensated system is closer to an ideal system, is more suitable for power hardware in-loop stability analysis and verification, and particularly has remarkable advantages under the condition of parameter aging offset of the power amplifier.

The invention provides an FVF type LDO (Low Dropout Regulator) circuit. In the FVF type LDO circuit, the positive input end of an operational amplifier is coupled with a reference voltage, the negative input end and the power supply end of the operational amplifier are coupled with a circuit output voltage, and in the FVF module, a power tube is coupled between the circuit input voltage and the circuit output voltage. The control end of the source electrode following transistor is coupled with the output end of the operational amplifier, the source end of the source electrode following transistor is coupled with the negative input end of the operational amplifier, the control end of the power tube is a dominant pole, the voltage of the connection point of the power tube and the source electrode following transistor is the circuit output voltage, and the current source is coupled between the dominant pole and the ground. Compared with the mode that power input voltage is adopted to supply power to the operational amplifier, the direct influence of the power input voltage on the operational amplifier can be shielded, improvement of DC gain and loop stability is facilitated, in addition, the output impedance of the branch where the FVF module is located is reasonably designed, and the loop stability can be ensured within the wide load range.

This invention provides a method and system for controlling the speed of a permanent magnet synchronous motor, belonging to the field of motor control technology. The method first constructs a discrete-time mathematical model of the motor and an external system including lumped reference signals and lumped disturbances, and establishes a composite system model accordingly. Then, a dimension-reduced observer is constructed to estimate the external signals, and state and input transformations are performed in conjunction with regulator equations. Next, a constraint set for the transformed system is constructed, and the state variables are decomposed into nominal components, deterministic error components, and uncertain error components. Furthermore, a time-varying constraint compression set is dynamically constructed based on the errors, and an online model predictive control optimization problem with dynamically tightened constraints is solved to obtain the nominal control quantity. Finally, the nominal control quantity and the estimated external signals are combined to synthesize the actual control voltage. This invention effectively suppresses disturbances, strictly ensures system safety constraints, guarantees the recursive feasibility and closed-loop stability of the control, and improves the dynamic response speed.

Circuits and methods for maintaining loop stability and good load regulation in low loop gain LDO regulator circuits. Embodiments encompass LDO regulator circuits that include an offset error correction circuit that generates an opposing voltage VOFFSET as a function of load current to substantially cancel out variations in VOUT that would otherwise occur due to load regulation limitations of the LDO regulator circuits. Embodiments use VOFFSET to imbalance currents in differential paths in a last-stage LDO error-amplifier so that an offset is propagated to a pair of inputs to the error-amplifier, thereby altering the output voltage VOUT to a corrected value. Benefits include improved LDO load regulation even when feedback loop gain is low, the available of both digital and analog implementations, high LDO accuracy and less variation of the output voltage VOUT, and suitability for implementation in integrated circuits for applications such as high precision power supplies.

This invention discloses a novel Class-AB output buffer load compensation structure, belonging to the field of analog integrated circuits. It includes a feedforward output buffer module and a load compensation loop module. The on-chip compensation capacitor in the load compensation loop is multiplied by the loop gain under the action of the gain amplification stage, forming a very large equivalent load compensation capacitor. Simultaneously, a left-half-plane zero is introduced, thereby achieving the goal of ensuring loop stability under various load conditions without using a large external load compensation capacitor. This invention has the advantages of simple circuitry and ease of use, and is suitable for Class-AB output buffer designs with a wide load range.

The application discloses a phase-locked loop capable of realizing fast locking, comprising a waveform broadening frequency discriminator, a digital auxiliary phase discriminator, a charge pump, a filter, a VCO and a frequency divider; the application realizes greater gain by broadening the pulse width of UP or DN, and simultaneously, due to the proposed new locking mode, a new discrimination is added on the basis of the traditional size bandwidth: whether the phase error exceeds pi, the filter structure is different when the phase error exceeds pi, the loop stability does not need to be considered when the current is increased to realize greater bandwidth, so that greater current, higher upper limit and greater gain are realized on the basis of the original, simultaneously, due to the early entering of the phase tracking stage, the charging speed of the capacitor is accelerated, the establishment time is accelerated, in addition, the switching of the bandwidth and the switching of the resistance can realize the invariability of the damping coefficient, the loop stability is not affected, the robustness is better, and fast locking is realized under the condition of guaranteeing small bandwidth and good performance.

The invention discloses a fixed-time anti-interference control system and method for an eddy-current hybrid power system, and the method comprises the steps: obtaining a disturbance affine form nonlinear mathematical model of a turbine engine of the eddy-current hybrid power system through system identification, and designing a fixed-time disturbance observer to estimate the lumped interference of the system in real time; a feed-forward signal measurer is designed to measure and calculate a feed-forward quantity in real time, and a fixed-time anti-interference feed-forward composite controller is constructed based on a nonlinear backstepping method and a dynamic inverse method, so that accurate control of the rotating speed of a turbine engine in the eddy-current hybrid power system is realized. The system designs a virtual control quantity through a nonlinear backstepping method, and a controller adopts a non-smooth instruction filter and an interference and feed-forward compensation mechanism to realize effective compensation for the uncertainty of the system. The method has high control precision, good anti-interference capability and closed-loop stability, and is suitable for rotating speed control of the turbine engine in the eddy-current hybrid power system under complex working conditions.

This invention discloses an LDO circuit for improving loop stability, relating to electronic circuits, and proposes a solution to address the loop instability problem in existing technologies. An internal ESR compensation module is set up to generate a zero to compensate for the secondary pole of the power transistor's gate, and the output signal is input to the inverting input of the error amplifier through negative feedback. The buffer stage is configured with an adaptive load, which dynamically changes the gate impedance of the power transistor according to the load current. Its advantages include not requiring an external capacitor to provide a specific ESR value, and the output capacitor can be a low-cost, small-size low-ESR ceramic capacitor, reducing component specification limitations. Before the compensation zero appears, negative feedback ensures that the voltage across the added compensation resistor is equal, preventing current flow and thus avoiding DC offset, resulting in a more accurate output voltage. The power transistor gate impedance can be dynamically adjusted according to changes in load current, which is beneficial for achieving loop stability across the entire load range.

The invention provides a phase-locked loop circuit and a phase-locked loop frequency hopping method, and relates to the technical field of radio frequency communication, a mapping relation between oscillator frequency and frequency control words is stored in a control module, and based on the mapping relation, in the frequency hopping process, the frequency control words of the frequency control words of the phase-locked loop can be effectively controlled. The hopping step size and the frequency control word corresponding to each hopping step size can be determined according to the current frequency and the target frequency. By adopting the above scheme, the method can skip a frequency searching stage and a phase locking stage at the initial stage of the phase-locked loop, directly enters a phase tracking stage, and greatly improves the frequency hopping speed. Furthermore, the frequency division module also performs frequency division on the output clock signal of the oscillator to generate a feedback clock signal, so that the voltage generation module compares the phase difference between the reference clock signal and the feedback clock signal in real time, thereby dynamically tracking the phase error and ensuring the loop stability and the performance index.

The invention relates to the technical field of radar speed measurement, and discloses a radar speed measurement method based on gain control, comprising the following steps: S1, system initialization and gain calibration: pre-testing loop stability; s2, signal transmitting and echo receiving: transmitting and receiving a dynamic gain control echo signal; s3, high-speed signal acquisition and synchronization: acquiring I / Q channel data; s4, Doppler processing and dynamic gain compensation: Doppler frequency is extracted; s5, Doppler peak value detection and speed calculation: detecting a target peak value, and calculating a target speed; s6, dynamic performance verification: carrying out a multi-target scene test and an anti-interference test; s7, boundary condition robustness test: carrying out extreme environment test and overload recovery test; and S8, calibrating and outputting data. Through real-time gain compensation of digital automatic gain control and robust Doppler processing, high-precision speed measurement can still be realized under the conditions of strong clutter, interference and rapid gain change, the stability is good, and the influence of the environment is small.

The application discloses a new energy unit phase-locked loop synchronous stability evaluation method and system of a multi-machine system, which constructs a new energy phase-locked loop output phase angle dynamic equation mathematical model and a synchronous unit steady-state power angle, calculates the new energy end phase-locked loop output phase angle of the multi-machine system before a fault, the synchronous machine power angle when the fault is removed, the new energy unit phase-locked loop output phase angle and the new energy unit phase-locked loop stability limit phase angle, and finally calculates the increasing area and the decreasing area of the new energy phase-locked loop output phase angle of the multi-machine system when the fault is removed, and further determines the new energy unit phase-locked loop synchronous stability, that is, the application combines the synchronous unit to evaluate the phase-locked synchronous stability of the new energy unit in the multi-machine system, improves the evaluation accuracy of the new energy unit phase-locked synchronous stability, and solves the problem that the prior art lacks consideration of the influence of the thermal power unit on the new energy unit in the multi-machine system, thereby resulting in low accuracy of the phase-locked synchronous stability of the new energy power generation unit.

This invention discloses a method and system for event-triggered load frequency security control in multi-regional power systems. The key technical points are: addressing the problem that existing load frequency control methods generally assume continuous availability of communication links, making it difficult to maintain stable operation under DoS attack conditions, this invention models the system as a switching system when a DoS attack occurs and switches the control mode in real time based on whether the link is under DoS attack: when communication is normal, conventional learning control is executed to optimize frequency regulation performance; when an attack occurs, it switches to an anti-attack control mode, thereby maintaining closed-loop stability and suppressing frequency deviation and tie-line power fluctuations even when communication is disrupted, significantly improving system security; furthermore, this invention is based on the RL method, obtaining control strategies through online learning with the environment when the system model is unknown or parameters are uncertain, thereby minimizing control energy consumption and improving operational economy without relying on precise system dynamics.

The application discloses an AGC substation side soft takeover and mode switching non-interference control method and device, when the equipment is in an on-site mode, the substation collects and filters actual active power in a period; when it is detected that the remote mode is switched back and the takeover target of the master station is received, the substation first performs initial value credibility verification, then constructs a target deviation with the credible initial value and sequentially performs dead zone, damping and amplitude limiting constraints; then, an internal soft takeover trajectory is generated based on the constrained deviation, and freezing, speed limiting or weakening processing is performed when data jumps, protection actions or operation boundary triggers. The method focuses on protecting the process that the substation execution layer is smoothly transitioned from the "current actual operation point" to the "received takeover target", can significantly reduce mode switching power mutation, reduce equipment impact and improve AGC closed loop stability.

The application discloses a mechanical system stability determination method, device and medium, to solve the technical problem of low debugging efficiency in the debugging process and the requirement that the on-site debugging personnel must have higher control theory professional knowledge. The method part comprises the following steps: acquiring original frequency response data of a mechanical system, wherein the original frequency response data comprises an open-loop Bode curve; acquiring modified system parameters, and generating simulation frequency response data based on the system parameters; obtaining a corresponding closed-loop Bode curve by calculation according to the simulation frequency response data; acquiring a determination reference line, and comparing the closed-loop Bode curve with the determination reference line; and determining a closed-loop stability evaluation result of the mechanical system based on the comparison result.

This invention discloses a learning-based fault-tolerant control method and system for quantifiable performance of nonlinear systems, belonging to the field of automatic control technology. The method designs a learning-based fault-tolerant control algorithm that embeds an RBF network to compensate for fault dynamics when a fault occurs. Based on deterministic learning theory, an RBF network is constructed by setting neurons along a desired reference trajectory. Secondly, by analyzing the convergence characteristics of the learning-tolerant control system through sampled data, a detailed quantitative analysis of the learning accuracy and learning speed of the proposed learning-based fault-tolerant control method is performed, and calculation formulas for learning accuracy and learning speed are given. This invention establishes quantitative expressions for learning speed and learning accuracy through theoretical derivation, realizing quantitative analysis and pre-setting of fault-tolerant control performance, and achieving quantitative controllability of learning speed and approximation accuracy while ensuring the closed-loop stability of the system.

The application discloses an active damping parameter setting method and device, equipment and medium, and relates to the technical field of motor control. The method comprises the following steps: determining a transfer function of an inverter-side current feedback closed-loop control loop; the inverter-side current feedback closed-loop control loop comprises a control element, a time delay element, an active damping element, a filter element and a motor element; determining an upper limit expression of an active damping parameter when a control loop stability condition is met according to the transfer function; obtaining the numerical value of each target parameter in the upper limit expression of the active damping parameter; determining the upper limit value of the active damping parameter according to the upper limit expression of the active damping parameter and the numerical value of each target parameter; and selecting a numerical value within the upper limit value of the active damping parameter as the set value of the active damping parameter. The method can improve the efficiency of active damping parameter setting, and the set active damping parameter is more accurate.

Circuits and methods for maintaining loop stability and good load regulation in low loop gain LDO regulator circuits. Embodiments encompass LDO regulator circuits that include an offset error correction circuit that generates an opposing voltage VOFFSET as a function of load current to substantially cancel out variations in VOUT that would otherwise occur due to load regulation limitations of the LDO regulator circuits. Embodiments use VOFFSET to imbalance currents in differential paths in a last-stage LDO error-amplifier so that an offset is propagated to a pair of inputs to the error-amplifier, thereby altering the output voltage VOUT to a corrected value. Benefits include improved LDO load regulation even when feedback loop gain is low, the available of both digital and analog implementations, high LDO accuracy and less variation of the output voltage VOUT, and suitability for implementation in integrated circuits for applications such as high precision power supplies.

This invention relates to the field of earthquake data processing technology, specifically to a highly reliable power supply and data protection method and system for earthquake monitoring equipment. When the main power supply fails, it switches to a composite energy system consisting of a battery and a supercapacitor to ensure that critical data is not lost due to power interruption. The equipment then enters an emergency state, activating a dual-loop stability control mode: the fast loop analyzes the dynamic behavior parameters of the group submission cache write status to intelligently determine the stability of the group submission rhythm and adjust the write frequency accordingly; the slow loop monitors key indicators of the tail write status of segment files to accurately identify tail congestion risks and dynamically adjust the submission batch. Furthermore, the system continuously monitors key load indicators of the equipment, intelligently determines the sealing conflict window, and automatically triggers sealing optimization strategies when resource contention is detected. This method significantly improves the data reliability and system stability of earthquake monitoring equipment under extreme operating conditions, providing complete and accurate data support for earthquake early warning.

This invention discloses an adaptive capacitor-compensated FVF-type low-dropout linear regulator based on multiple feedback loops, belonging to the field of integrated circuit technology. The invention includes an output power transistor, a first feedback loop, and a second feedback loop. The input terminal of the first feedback loop is coupled to the output node, and the output terminal is coupled to the control terminal of the output power transistor, used to respond to changes in load current. The input terminal of the second feedback loop is coupled to the output node, and the output terminal is coupled to the first feedback loop. It includes an impedance element, which, together with the load capacitance at the output node, forms a zero-point generation network to generate zeros whose frequency varies with the load capacitance, thus compensating for the poles of the first feedback loop. This invention achieves loop stability without requiring large-value Miller compensation capacitors by introducing adaptive zeros associated with the load capacitance, significantly reducing chip area and improving loop bandwidth and transient response performance.

The invention provides an FVF type low dropout regulator. The FVF type low dropout linear regulator comprises a bias loop and a fast response loop, the fast response loop comprises a source electrode following transistor, a power tube, a transmission circuit and a buffer circuit, a first end of the power tube is coupled with a power supply input voltage, a second end of the power tube is coupled with a source end of the source electrode following transistor and a circuit output voltage, and the buffer circuit is coupled with the source electrode following transistor. The transmission circuit can transmit power supply disturbance to the input end of the buffer circuit, one part of voltage ripples at the control end of the power tube are generated by the power supply ripples through gate-source voltage, the other part of the voltage ripples are generated by the buffer circuit, and the polarities of the two parts of voltage ripples are opposite, so that the two parts of voltage ripples can be at least partially counteracted. Therefore, the influence of the power supply ripple on the output end of the circuit is reduced, and the circuit has better loop stability.

The application discloses a multi-region power system event-triggered load frequency safety control method and system, and the technical scheme points are as follows: in view of the problem that the existing load frequency control method generally assumes that the communication link is continuously available and is difficult to maintain stable operation under the condition of DoS attack, the system is modeled as a switching system when the DoS attack exists, and the control mode is switched in real time according to whether the link is subjected to the DoS attack: the conventional learning control is executed to optimize the frequency regulation performance when the communication is normal; the anti-attack control mode is switched to when the attack occurs, so that the closed-loop stability can be maintained and the frequency deviation and the tie-line power fluctuation can be inhibited under the condition that the communication is blocked, and the system safety is significantly improved; in addition, based on the RL method, the control strategy is obtained by online learning through interaction with the environment under the condition that the system model is unknown or the parameters are uncertain, so that the control energy minimization and the operation economy are realized without depending on the accurate system dynamics.

The present application relates to compensation circuit, and disclose a kind of loop stability compensation circuit for the LDO of which output current changes greatly, including LDO voltage regulator, detection resistance RL, current detection circuit, controller and current compensation circuit, the output end of the LDO voltage regulator connects output load output, the input end of current detection circuit is connected at the output end of detection resistance RL, the signal output end of current detection circuit is connected at the input end of controller.The current value transmitted by detection chip U1 is detected by the chip U2 of the present application, and when it is small, the relay KA1 is controlled to be closed, at this time, the current compensation circuit is equivalent to be connected to the power supply of LDO voltage regulator, to increase the current of LDO voltage regulator output end, when the chip U2 detects that the current is too large, then control relay KA1 is disconnected, so that the current of LDO voltage regulator output end is controlled in stable range.