46 results about "Flicker noise" patented technology

A system for audio segmentation for context change detection in speech is disclosed. The system accesses a speech signal of a user and identifies the user based on the voice print associated with the user. The system detects a potential context change between a first audio frame and a second audio frame of the speech signal. The system splits the speech signal into a first set of split audio frames based on the potential context change. The system generates a noisy speech signal by modulating a flicker noise signal into the speech signal. The system splits the noisy speech signal into a second set of split audio frames. The system detects a difference between the first and second sets of split audio frames. The system reconfigures a modulation of the speech signal with the flicker noise signal to reduce the difference between the first and second sets of audio frames.

The invention relates to a method and system for extracting a flicker noise model of a high-voltage MOS device, and the method comprises the steps: designing high-voltage MOS devices of different sizes, and carrying out the measurement to obtain the DC characteristic data of each device in an operable voltage range and the flicker noise characteristic data of each device under different bias voltage conditions; based on the direct-current characteristic data, performing model fitting on the direct-current performance of the high-voltage MOS device to obtain a direct-current characteristic model, the direct-current characteristic model comprising an intrinsic current part and a collision ionization current part; and based on the direct current characteristic model and the flicker noise characteristic data, carrying out model fitting on flicker noise brought by the intrinsic current part and flicker noise brought by the collision ionization current part to obtain a flicker noise model. By fitting the noise source model associated with the magnitude of the collision ionization current, the flicker noise characteristics of the collision ionization current part are subjected to function characterization, and the flicker noise characteristic characterization precision of the high-voltage MOS device under high-voltage bias is improved.

The invention discloses a pulse wave signal detection-oriented transimpedance amplifier circuit with input voltage clamping and current offset functions, and relates to the technical field of integrated circuit design, the pulse wave signal detection-oriented transimpedance amplifier circuit comprises a pseudo-differential structure, a current offset module and a photosensitive diode, the pseudo-differential structure is composed of two independent operational amplifiers with double-end input and single-end output, the trans-impedance amplifier of a pseudo-differential structure composed of two independent operational amplifiers with double-end input and single-end output is used, the same voltage is connected to the same-direction input end of the trans-impedance amplifier, voltage clamping is carried out on double-end input, the differential mode precision and low-frequency stability of an input virtual site are improved, differential mode imbalance and flicker noise caused by operational amplifier mismatch are eliminated, and the stability of the trans-impedance amplifier is improved. The dynamic range of the pulse wave detection system is improved, and the pulse wave detection system has the advantages of high-precision and wide-range ambient light suppression effect, high circuit reliability, low circuit complexity, easy implementation, high loop stability, small area and low power consumption.

The invention relates to a W-band low-noise voltage-controlled oscillator based on a transformer resonant cavity and harmonic extraction. The W-band low-noise voltage-controlled oscillator comprises a dual-core in-phase coupled oscillator core, a two-bit switched capacitor bank, a linear variable capacitor bank and an output buffer, the dual-core in-phase coupled oscillator core comprises a transformer resonant cavity and a harmonic extraction network, a fundamental wave oscillation signal is generated in the transformer resonant cavity and is coupled and output to the output buffer, and a high-power second harmonic oscillation signal is generated in the harmonic extraction network and is output as a target oscillation signal; the two-bit switched capacitor bank adopts an HBT switch with excellent high-frequency performance, the tuning range of the oscillator is divided into four sub-bands, and the tuning gain is reduced; the capacitance value of the linearized variable capacitor bank is linearly changed along with the tuning voltage height, and a conversion mechanism of flicker noise is inhibited; and the output buffer realizes load isolation and buffering of the fundamental wave oscillation signal. The voltage-controlled oscillator has low tuning gain and high output power in the W wave band, and excellent phase noise is achieved.

In one aspect, a transistor includes a diffusion region having a drain, a source, and a channel between said drain and source. The transistor further includes an isolation region around said diffusion region for electrically isolating said transistor. In addition, the transistor includes a gate poly overlapping at least a part of said channel, wherein said diffusion region extends laterally beyond said gate poly in a channel width direction.

This invention relates to a high-voltage, capacitor-free, low-noise linear regulator. It comprises a high-voltage switching voltage follower, a self-zeroing error amplifier, and voltage divider resistors. The high-voltage switching voltage follower significantly enhances the system's transient response to load changes and improves power supply rejection in the mid-frequency range. The self-zeroing error amplifier, together with the high-voltage switching voltage follower, forms a global slow loop. The self-zeroing error amplifier employs a ping-pong self-zeroing method, effectively reducing low-frequency flicker noise and offset while ensuring continuous operation in the time domain. This invention introduces a settling phase between the self-zeroing and amplification phases of the ping-pong module, significantly reducing output glitches caused by amplifier settling time. This invention operates stably without an external output capacitor, supports a wide input and output voltage range, and possesses excellent characteristics such as low noise, high power supply rejection, and fast response, making it suitable for various demanding high-voltage power supply applications.

This invention relates to the field of integrated circuit manufacturing technology and discloses a digital self-calibration circuit and method for a SAR ADC capacitor array. In the process of integrated circuit manufacturing and on-chip analog-to-digital conversion circuit implementation, by causing the target capacitor to generate excitations with opposite polarities and corresponding amplitudes in odd-numbered and even-numbered calibration cycles, the DC offset components of the comparator cancel each other out during the difference calculation. By generating bit decisions through multiple statistical methods for the comparison results of each bit of the sub-ADC, the disturbance of thermal noise to the final calibration result is reduced at the bit decision level. By alternating between odd and even calibration cycles and performing pairing and difference calculation in a short time, the influence of flicker noise in adjacent calibrations is reduced. By solving the capacitor weights of each bit sequentially from low to high bits, the propagation of errors at each level is reduced. By digitally reconstructing the output result after all weights have been solved, the final output of the SAR ADC is made closer to the actual capacitor array weight relationship.

The application discloses a kind of based on global chopping's analog-digital converter unbalance voltage and the suppression system of flicker noise, including ADC main body circuit, clock frequency division circuit, input modulation circuit, output demodulation circuit, wave filter.Through input modulation circuit cooperation clock frequency division circuit generation phase synchronization sampling clock and chopping clock, periodically global polarity flip modulation is carried out to input signal in analog domain, then is realized spectrum rearrangement by digital end synchronous demodulation, will ADC whole link inherent direct current unbalance voltage, low frequency 1 / f flicker noise shift to chopping frequency and its odd high frequency harmonic place, finally, high-frequency noise component is filtered by digital mean filter mode, realize low-frequency band error global cancellation.The application does not introduce non-linear error, with low power consumption, small chip area, wide temperature range adaptability, long-term work stability is high The characteristics of, be applicable to high-resolution, precision sensor signal acquisition, low-frequency weak signal detection, aerospace deep space data acquisition and other high-precision application scenarios.

The invention relates to a capacitive touch detection device which comprises a capacitive touch device and a touch detection chip connected with the capacitive touch device. The touch detection chip comprises a capacitance detection module and a calculation unit connected with the capacitance detection module; the capacitive touch device is configured to convert a touch action into a capacitance change signal and send the capacitance change signal to the touch detection chip; and the touch detection chip is configured to sense the capacitance variation of the capacitive touch device through the capacitance detection module, and then obtain a final capacitance value through the calculation unit. According to the invention, the self-capacitance is discharged twice through the two resistors, the discharge resistances of the two times of discharge are different, so that two different discharge curves are obtained, and the relative value of the ground sub-capacitance is obtained through the difference of the two discharge curves. The scheme of two resistors is simple in structure and simple in control time sequence; the low-frequency noise (such as flicker noise) can be effectively suppressed through subtraction of two discharge curves.

The invention relates to the technical field of sensing circuits, and provides a high-performance front-end instrumentation amplifier circuit and a resistive sensing circuit, the high-performance front-end instrumentation amplifier circuit comprises a differential amplifier, a chopping modulation circuit, a ripple reduction loop and a pre-charging loop; the input end of the differential amplifier is connected to the resistive sensor, and the differential amplifier amplifies the input signal; the chopping modulation circuit is connected to the input end and the output end of the differential amplifier and is used for modulating and demodulating the input signal and the output signal; the ripple reduction loop is bridged between the chopping modulation circuit and the input end of the differential amplifier and is used for reducing output ripples caused by chopping modulation; and the pre-charging loop is bridged at the input end of the differential amplifier and is used for improving the input impedance. According to the technical scheme, flicker noise and direct current offset are effectively reduced, the influence of output ripples brought by chopping modulation is reduced, input impedance is improved, and completeness and effectiveness of signal acquisition are guaranteed.

A calibration apparatus and method for nonlinear mismatch in a differential MEMS resonant accelerometer are disclosed. The apparatus includes a differential MEMS resonant accelerometer, a calibration control circuit, and a test signal generator. The differential MEMS resonant accelerometer has identical first and second channels. This invention suppresses flicker noise introduced by nonlinear stiffness mismatch between the two channels of the differential MEMS resonant accelerometer due to manufacturing defects, thereby further improving the performance of the differential MEMS resonant accelerometer. This invention suppresses flicker noise introduced by nonlinear stiffness mismatch without changing the mechanical architecture of the differential MEMS resonant accelerometer and maintains its high bandwidth and high signal-to-noise ratio characteristics.

The application provides a detector microphonic noise suppression method and system, and relates to the field of radiation detection. The method comprises the following steps: receiving an output signal of a detector by a detector signal conditioning circuit and separating a microphonic noise signal from the output signal; processing the microphonic noise signal by an adaptive microphonic noise suppression system running an adaptive noise suppression algorithm, wherein the microphonic noise signal is used as an error signal in the adaptive noise suppression algorithm, and a vibration adjustment signal is output to a vibration absorber driving circuit when the error signal does not satisfy a preset minimization condition in the adaptive noise suppression algorithm; and adjusting the vibration of a vibration absorber installed in the detector according to the vibration adjustment signal by the vibration absorber driving circuit. The application also provides a detector comprising a detector microphonic noise suppression system. The application directly aims at minimizing the microphonic noise in the output signal of the detector, can effectively suppress the microphonic noise in the detector to a certain extent, and has a simple structure.

Devices having impedance measurement circuits that allow for flicker noise reduction can be implemented in a variety of applications. Carrier suppression techniques can be implemented to remove noise artifacts associated with the carrier signal from its sidebands, thereby substantially removing the carrier signal. Carrier suppression in an AC impedance measurement circuit can be achieved by sensing the carrier signal of the measurement circuit at a transmit location of the measurement circuit and subtracting a weighted version of the carrier signal at a receive location of the measurement circuit. One or more compensating impedances can be used to allow the carrier signal's sidebands to be received with the carrier signal suppressed relative to the receive location.

The invention provides a semiconductor device structure and a preparation method thereof, and relates to the technical field of semiconductors, the semiconductor device structure comprises a substrate, a bottom doped region, a drift region, a first doped region and a second doped region, and the drift region is adjacent to the upper part of the bottom doped region; the first doped region is located at one side of the bottom doped region and the drift region and is in contact with the drift region and the bottom doped region, and a first gate connection region is formed at the top of the first doped region; the second doped region is located in the drift region and is spaced from the bottom doped region in the direction perpendicular to the substrate, and a second gate connection region is formed at the top of the second doped region. Compared with the prior art, the embedded conducting channel can be formed, flicker noise can be greatly reduced, meanwhile, device parameters are more stable, and long-term reliability is better. Moreover, the second doped region and the bottom doped region can form a buried shielding layer together, so that the electric field distribution can be optimized, the short-channel effects such as DIBL can be effectively inhibited, and more ideal switching characteristics can be obtained.

The invention discloses a high-performance analog front-end circuit applied to a piezoelectric sensor. The circuit comprises a chopping capacitor transimpedance rail-to-rail output operational amplifier circuit, a servoloop circuit module, a piezoelectric sensor modeling circuit, a buffer circuit and a two-phase non-overlapping clock generation circuit. Wherein the two-phase non-overlapping clock controls the chopping modulation switch to suppress low-frequency flicker noise; a cascode current mirror bias source follower of the servop module outputs nA-level current to compensate input leakage current, high output impedance of the cascode current mirror bias source follower and a Miller capacitor generate a secondary pole, and the lower limit cut-off frequency is reduced to the 0.026 Hz level; and the buffer circuit enhances the driving capability of the amplifier. The device can realize low noise, low lower limit cut-off frequency and leakage current compensation, reduces cost and power consumption, improves stability, and is suitable for measurement of vibration, pressure, acceleration and other physical quantities of the piezoelectric sensor.

A system for audio segmentation for context change detection in speech is disclosed. The system accesses a speech signal of a user and identifies the user based on the voice print associated with the user. The system detects a potential context change between a first audio frame and a second audio frame of the speech signal. The system splits the speech signal into a first set of split audio frames based on the potential context change. The system generates a noisy speech signal by modulating a flicker noise signal into the speech signal. The system splits the noisy speech signal into a second set of split audio frames. The system detects a difference between the first and second sets of split audio frames. The system reconfigures a modulation of the speech signal with the flicker noise signal to reduce the difference between the first and second sets of audio frames.

Systems and methods for scalable digital beamforming and low power analog amplification are provided. Various embodiments of the present technology provide systems and methods for achieving efficient data distribution and superior signal integrity in multi-chip sensor arrays. Embodiments of the digital beamforming architecture utilizes a plurality of chiplets where sampled analog-to-digital converter bitstreams are distributed wirelessly via low power short-range transmitters in an inherently broadcast manner, thereby achieving scalable interconnectivity complexity. Embodiments include a system and method that uses a multi-stage, multi-path feed-forward compensated operational amplifier configured with a non-idealities reduction loop that employs chopping to frequency-translate and suppress low-frequency non-idealities, such as flicker noise and offset voltage, enabling power- efficient data conversion circuitry like continuous-time sigma delta ADCs.

The application discloses a flicker noise filtering system. To solve the flicker noise problem caused by the flickering light source, the flicker noise filtering scheme disclosed by the application is as follows: a first event is received, the time difference between the first event and the previous event of the first event is obtained according to the timestamp of the first event and the timestamp of the previous event of the first event; the size relationship between the time difference and a first threshold value is judged, and the result representing the size relationship is written into a first position in a first list corresponding to the first event in a first storage space; whether the first event is flicker noise is judged according to a plurality of results representing the size relationship stored in a plurality of positions of the first list corresponding to the first event in the first storage space. The application takes the list recording time difference discrimination results as a technical means, solves the flicker noise problem, and obtains the low-power-consumption, low-delay and high-performance noise reduction effect. The application is suitable for the field of event cameras and brain-like computing.

The invention relates to the technical field of signal processing, and relates to a signal processing method, a signal processing circuit, equipment, a medium and a product. The method comprises the following steps: receiving a first analog signal to obtain a first clock signal, and modulating and amplifying the first analog signal based on the first clock signal to obtain a second analog signal; acquiring a second clock signal, and performing analog-to-digital conversion processing on the second analog signal based on the second clock signal to obtain a first digital signal; filtering the first digital signal to obtain a second digital signal; wherein the period of the first clock signal is determined based on the period of the second clock signal and the oversampling rate. Thus, by performing filtering processing in the digital domain, flicker noise can be suppressed, meanwhile, the area of the signal processing circuit is reduced, and the power consumption resource of the signal processing circuit is further reduced.

The application belongs to the technical field of semiconductor and integrated circuit, and particularly relates to a high-precision self-zeroing comparator. The comparator comprises a first-stage preamplifier and a second-stage latch, wherein the first-stage preamplifier comprises an amplifier circuit and a self-zeroing circuit; the amplifier circuit amplifies signals and improves signal-to-noise ratio; and the self-zeroing circuit reduces comparator offset voltage and reduces comparator flicker noise; the second-stage latch comprises a latch formed by two inverters and serves as an output stage to output digital code words. The comparator provided by the application can significantly improve noise and precision performance of the comparator by using the self-zeroing technology, and does not need an additional amplifier circuit, thereby saving area and power consumption consumed by the self-zeroing technology.

The invention provides a low-noise voltage-controlled oscillator circuit and method, and belongs to the technical field of radio frequency integrated circuits. The invention aims to solve the problem that phase noise, power consumption and area of a voltage-controlled oscillator in the prior art are difficult to consider. The circuit comprises a main circuit, a grounding bias resistor and a feedback loop, wherein the main circuit consists of a first NMOS (N-channel Metal Oxide Semiconductor) transistor pair which is cross-coupled; the bias resistor replaces a traditional tail current source to eliminate flicker noise of the traditional tail current source. The input end of the feedback loop is connected to a common source node of the first NMOS transistor pair, the output end of the feedback loop is connected to a grid electrode of the first NMOS transistor pair, and the feedback loop is used for actively stabilizing the voltage of the common source node and restraining noise coupling. According to the scheme, on the premise that the power consumption and the area are not increased, the phase noise is remarkably reduced, and the power supply noise rejection ratio is improved.

The application provides a chip atomic clock multi-source taming method based on Kalman filtering and LQG control, and relates to the technical field of precise time and frequency control, and the method comprises the following steps: receiving at least two external time reference signals including satellite time signal and ground reference signal; respectively pre-processing and real-time reliability evaluating each signal to obtain the quality index of each signal; dynamically distributing the fusion weight of each signal based on the quality index; weighting and fusing the clock difference measurement value of each signal through the distributed weight to obtain the fused reference clock difference; and constructing the state vector for describing the dynamic characteristics of the chip atomic clock by taking the reference clock difference as the observation, wherein the state vector comprises phase deviation, frequency deviation and a plurality of Markov process components for the chip atomic clock unique frequency modulation flicker noise. The application solves the deficiencies of the traditional taming method in phase accuracy, frequency stability and environmental adaptability.

The invention discloses a switch transconductance type low-flicker noise down-conversion mixer circuit which comprises a switch stage, a transconductance stage and a radio frequency input matching network. The switch stage consists of a PMOS (P-channel Metal Oxide Semiconductor) tube and an NMOS (N-channel Metal Oxide Semiconductor) tube which are complementary, and periodically switches a conducting state under the driving of a differential local oscillator signal The transconductance stage adopts a cross coupling differential structure, and a transient coupling network is formed through a coupling capacitor and a bias resistor, so that drain-source direct current of a transconductance transistor is zero, and flicker noise is inhibited from the source; residual noise is symmetrically modulated to odd harmonics of the local frequency under the turning effect of the switch, and is far away from the intermediate frequency output frequency band; and the radio frequency input matching network realizes 50-ohm impedance matching and bandwidth optimization. While low power consumption is maintained, the flicker noise of the intermediate frequency output end is remarkably reduced, the flicker noise inflection point frequency can be reduced to below 10 Hz, and the method is suitable for a direct frequency conversion receiver architecture.

This application discloses a display device and a backlight control method. The signal acquisition module includes a light-collecting unit for collecting ambient light intensity to generate a light detection signal; a signal amplification module for spectral shifting and amplification of the light detection signal followed by demodulation to obtain an amplified signal; a display resolution module for obtaining the average brightness of the image to be displayed on the display panel based on the image data; and a backlight control module for adjusting the brightness of the backlight provided by the backlight module to the display panel based on the amplified signal and the average brightness. By spectrally shifting and amplifying the light detection signal to obtain the amplified signal, the flicker noise of the signal amplification module itself can be reduced during the amplification process, improving the signal-to-noise ratio of the amplified signal and thus enhancing the accuracy of the backlight control module in adjusting the backlight brightness based on the amplified signal and the average brightness.

Systems, methods, and tools for optically transmitting information are described herein. The light source may be configured to generate a beam. The beam may include a series of light pulses. The light beam may be modulated. A modulator may be configured to modulate the series of light pulses in response to a data transmission signal, thereby encoding transmission data into the series of light pulses. The modulated light beam may be received and both amplified and filtered. The filtered light beam may be transmitted from or to a detector having a light receiver. An optical receiver may be configured to extract transmission data from the filtered light beam.

An IR thermopile sensor and a method of manufacturing the same. In the IR thermopile sensor, a substrate defines an annular first groove provided therein with a thermal conductivity enhancement layer made of an electrically conductive material. A plurality of thermocouple components are spaced apart from one another above an insulating layer and a support layer extend from above the thermal conductivity enhancement layer towards the inside of an internal annular wall of the first groove. The additionally included thermal conductivity enhancement layer can stabilize the temperature of cold ends of the thermocouple components and reflect IR radiation, helping maintain cold junctions at the same temperature as the ambient temperature. Thus, a temperature gradient can be more easily established across hot and cold ends, resulting in improved performance. The thermal conductivity enhancement layer can be made of a material, which is selected to make the present invention easy to implement in terms of structure. Additionally, since the only cost increase is caused by the thermal conductivity enhancement layer, facilitating commercial large-scale production. The insulating layer is disposed between the thermal conductivity enhancement layer and the thermocouple components and can reduce flicker noise in signals output from the IR thermopile sensor.

A bandgap voltage generator circuit is formed using only bipolar transistors. The bandgap voltage generator circuit includes an output node at which a bandgap reference voltage is generated. A transconductance amplifier circuit in a current control feedback loop has a differential input which receives a base current. A compensation current sink circuit operates to sink a compensation current from the output node corresponding to the base current received at the differential input of the transconductance amplifier.

In some embodiments, an optical communication system may include a light source, a modulator, and an optical receiver. The light source may be configured to generate a beam comprising a series of light pulses. The optical receiver may have a detection window duration of 1 nanosecond or less. As the first pulse travels through a variable refractive medium, photons in the first pulse may be refracted, thus traveling along different ray paths to reach the optical receiver according to a time distribution curve. The full width at half maximum (FWHM) value of the time distribution curve may be greater than the coherence time value of the first pulse, and the detection window of the optical receiver may be greater than the FWHM value of the time distribution curve.

This disclosure provides an incremental Delta-Sigma analog-to-digital converter (ADC) circuit, including a modulator and an integrator cascaded filter. The incremental Delta-Sigma ADC circuit has an order of L, where L is a constant greater than 1. The modulator includes a chopper control signal generation module, which has L frequency-divided signal inputs for the sampling clock. The chopper control signal generation module generates a chopper control signal based on the L frequency-divided signals of the sampling clock through combinational logic. The modulator outputs a modulated signal based on the chopper control signal. The integrator cascaded filter receives the modulated signal and outputs a corresponding converted signal based on the average error of the ADC circuit within the conversion period. Under chopper timing control, the modulator bitstream, after being processed by the integrator cascaded filter, can achieve complete cancellation of DC offset within one chopper cycle, eliminating the residual offset of the ADC circuit and reducing the influence of flicker noise.

An oscillator circuit includes a first cross coupled pair, a second cross coupled pair, a resonant circuit coupled between the first cross coupled pair and the second cross coupled pair and a first injection circuit. The resonant circuit includes a first node outputting a first voltage signal and a second node outputting a second voltage signal. The first injection circuit is coupled to the first cross coupled pair and injects a first compensating current with a first predetermined phase to a predetermined node of the first cross coupled pair.