113results about How to "Reduce flicker noise" patented technology

When a SOI substrate is produced a first silicon layer epitaxially grown on the insulating underlay is ion implanted to make deep part of interface of the silicon layer amorphous, and then annealed to recrystallize. Next, the silicon layer is heat treated to oxidize part of the surface side, and after the silicon oxide is removed by etching, a silicon layer is epitaxially grown on the remaining first silicon layer to form a second silicon layer. Subsequently, the second silicon layer is again ion implanted to make deep part of interface amorphous, then annealing is performed to recrystallize. With this method, a SOI substrate, which is very small in crystal defect density of the silicon layer and good in surface flatness, can be produced. Therefore, on the semiconductor substrate an electronic device or optical device having high device performance and reliability can be realized.

A sigma-delta digital-to-analog converter comprises a current digital-to-analog converter (IDAC) stage which generates a current depending on an input digital signal. An output current-to-voltage converter converts the generated signal to a voltage on a continuous-time basis. The amplifier used in the output current-to-voltage converter is chopper-stabilized. The converter can be single bit or multi-bit. The IDAC stage can be implemented with a pair of branches, a first branch comprising a first biasing current source and a second branch comprising a second biasing current source. The biasing current sources can be chopper-stabilized by connecting the bias current sources to the output current-to-voltage converter by a set of switches. The switches connect the biasing current sources to the output current-to-voltage converter in a first configuration and a second, reversed, configuration. This modulates flicker noise contributed by the bias current sources to the chopping frequency. from where it can be removed by filtering downstream of the current-to-voltage converter.

It is an object of the invention to provide a method of reducing flicker noises in an X-Y address type solid-state image pickup device for reducing flicker noises generated by a fluorescent light for room illumination when taking a picture in door.A configuration is provided in which signal storage time ts resulting in no flicker noise under a fluorescent lamp having an emission frequency of 120 Hz is preset (step S1); average luminance of image data is calculated for each frame in a predetermined average luminance detection area allocated in the frame (step S2); a difference in average luminance is calculated between frames (step S3); and the signal storage time ts is changed based on the difference in luminance (steps S4, S5 and S6).

A band-pass filter made up by an operational amplifier and by an input circuit. The input circuit is formed by a capacitive filtering element, connected to the input of the operational amplifier; a coupling switch, coupled between an input node and the capacitive filtering element; a capacitive sampling element, coupled between the input of the filter and the input node; and a sampling switch, coupled between the input node and a reference-potential line. The coupling switch and the input sampling switch close in phase opposition according to a succession of undesired components sampling and sensing steps, so that the capacitive sampling element forms a sampler for sampling the undesired component in the undesired components sampling step, in the absence of the component of interest, and forms a subtractor of the undesired components from the input signal in the sensing step.

The invention relates to a training method and device of a neural network model for image processing. The method comprises that video frames adjacent in time are obtained; the neural network model output intermediate images corresponding to the video frames respectively; change of the video frames in relatively earlier time and optical flow information of the video frames in relatively later timeare obtained; and image formed by changing the intermediate image, corresponding to the video frame in relatively earlier time, according to the optical flow information is obtained; time loss betweenthe intermediate image corresponding to the video frame in relatively later time and an image after change is obtained; characteristic loss between the intermediate image and a target characteristicimage is obtained; and the neural network model is adjusted according to the time loss and the characteristic loss, the step of obtaining the video frames adjacent in time is returned to, and trainingis not stopped until the neural network model satisfies a training ending condition. Thus, the neural network model obtained by training has a better video characteristic conversion effect.

A multi-bit continuous-time sigma-delta analog-to-digital converter (ADC) has an input stage which receives an analog input signal current. A multi-bit feedback current digital-to-analog converter (IDAC) generates a multi-level feedback current depending on a feedback signal. An integrator integrates a sum of the generated current and input signal current on a continuous-time basis. The IDAC has a first output branch including a first biasing current source and a second output branch including a second biasing current source. The biasing current sources supply a bias current to a respective branch of the IDAC to bias the input stage in a mid-scale condition. The biasing current sources are connected to the branches via chopping switches which connect the biasing current sources to the branches in a first configuration and a second, reversed, configuration. The integrator amplifier can also be chopper-stabilized, although preferably only the first stage is chopper-stabilized.

An image coding device for reducing flicker noise in moving image coding based on Motion JPEG-2000, which applies wavelet transform to an input image, quantizes the wavelet transform coefficients, and replaces quantization coefficients of adjacent frames in accordance with a predetermined judgment condition. The device spreads the finally output quantization coefficients into bit-planes from the MSB to LSB, generates coding passes in each bit-plane, performs arithmetic coding in the coding passes, controls the code quantity to a target code quantity from the generated arithmetic codes, and generates a packet of the image data by attaching a header to the arithmetic codes. The quantization coefficients are replaced based on a difference of absolute values of the quantization coefficients at the same sub-band in the adjacent frames. By further adding the wavelet transform coefficients, erroneous detection in the substitution processing can be decreased and the flicker noise can be suppressed effectively. Also, an image coding method for the same.

An LCD and a display panel thereof are provided. A common voltage generation circuit of the display panel is electrically connected to at least one pixel in a non-active pixels region. According to the display voltage at a drain of a TFT in the pixel, an average of display voltages of positive and negative polarities is obtained in two frame times. The average value is regarded as a common voltage supplied to every pixel in an active pixel region in the display panel. Thereby, the problem of a drift of a feed-through voltage (ΔVD) of a scan voltage due to an RC delay of a parasitic-capacitance and a parasitic-resistance on the scan line can be avoided. Further, the gray-level accuracy of every pixel in the active pixel region can be improved, and the flicker-noise of the display-panel can be reduced, thus significantly promoting the display quality of the LCD.

The present invention provides a method of analyzing multiple samples simultaneously by absorption detection. The method comprises: (i) providing a planar array of multiple containers, each of which contains a sample comprising at least one absorbing species, (ii) irradiating the planar array of multiple containers with a light source and (iii) detecting absorption of light with a detection means that is in line with the light source at a distance of at least about 10 times a cross-sectional distance of a container in the planar array of multiple containers. The absorption of light by a sample indicates the presence of an absorbing species in it. The method can further comprise: (iv) measuring the amount of absorption of light detected in (iii) indicating the amount of the absorbing species in the sample. Also provided by the present invention is a system for use in the above method.The system comprises; (i) a light source comprising or consisting essentially of at least one wavelength of light, the absorption of which is to be detected, (ii) a planar array of multiple containers, and (iii) a detection means that is in line with the light source and is positioned in line with and parallel to the planar array of multiple containers at a distance of at least about 10 times a cross-sectional distance of a container.

The invention discloses a low-voltage reference source with low flicker noise and high power-supply suppression. The low-voltage reference source comprises a starting circuit, a self-cascaded operational amplifier, a temperature coefficient compensating circuit and a reference output-level circuit, wherein the self-cascaded structures; and the self-cascaded the low-voltage reference source, the power-supply suppression is improved and the flicker noise is reduced at the same time; an input metal oxide semiconductor (MOS) pipe in the operational amplifier is a primary MOS pipe, so that the flicker noise is further reduced and voltage redundancy is saved in a low-voltage circuit at the same time; and after the temperature coefficient compensating circuit is expanded into a high-level temperature coefficient compensating circuit, the change of reference source output voltage with the temperature is further reduced and the stability of the reference source output voltage is improved.

The invention relates to a fusion structure of an LNA and a frequency mixer. The fusion structure comprises a low noise transconductance amplifier stage, a switching frequency mixing stage and a resistance loading stage, wherein the low noise transconductance amplifier stage is divided into two parts, a first part adopts a cross coupling main-auxiliary noise offset technology, a main transconductance pipe adopts a cross coupling structure so as to double an equivalent transconductance value, an auxiliary transconductance pipe provides an appropriate transconductance value, and the noise of the main transconductance pipe is offset through the main-auxiliary structure; and a second part adopts a common-source-level structure, then gain is provided, direct current flowing through switching tubes is reduced, and flicker noise is reduced. The switching frequency mixing stage modulates radio-frequency current output from the low noise transconductance amplifier stage and outputs intermediate-frequency current, and source electrodes of two groups of switching tubes are connected through an inductor, so that the flicker noise is reduced, and the conversion gain is improved. The resistance loading stage adopts an RC (current limiting resistor) lowpass filtering network to convert the intermediate-frequency current into an intermediate-frequency voltage signal for outputting. The fusion structure of the LNA and the frequency mixer has the characteristics of low noise, high gain and low power consumption.

A sigma-delta digital-to-analog converter comprises a current digital-to-analog converter (IDAC) stage which generates a current depending on an input digital signal. An output current-to-voltage converter converts the generated signal to a voltage on a continuous-time basis. The amplifier used in the output current-to-voltage converter is chopper-stabilized. The converter can be single bit or multi-bit. The IDAC stage can be implemented with a pair of branches, a first branch comprising a first biasing current source and a second branch comprising a second biasing current source. The biasing current sources can be chopper-stabilized by connecting the bias current sources to the output current-to-voltage converter by a set of switches. The switches connect the biasing current sources to the output current-to-voltage converter in a first configuration and a second, reversed, configuration. This modulates flicker noise contributed by the bias current sources to the chopping frequency. from where it can be removed by filtering downstream of the current-to-voltage converter.

Various systems and methods for implementing dynamic logic are disclosed herein. For example, some embodiments of the present invention provide LC tank circuits having an inductance and a capacitance. In addition, the circuits include a flicker noise reducing switch that is operable to selectively incorporate the capacitance such that an output of the circuit operates at a frequency based on a combination of the inductance and the capacitance.

An image sensor comprises a pixel array, and a control unit which performs, in a first period, a control operation of an electric potential of a signal line to turn off a MOS transistor while the electric potential of a charge-voltage converter in a selected pixel is maintained at an electric potential of a selected state, and, in a second period subsequent to the first period, performs a control operation of the electric potential of the signal line to turn on the MOS transistor while the electric potential of the charge-voltage converter in the selected pixel is maintained at an electric potential of the selected state.

The present invention relates amplifiers using metal oxide semiconductor based integrated circuits. The present invention is particularly but not exclusively related to audio application mixed signal chips. The present invention provides an analogue circuit for processing analogue signals in an integrated circuit comprising a number of metal oxide semiconductor transistor devices, the circuit stage comprising a first said transistor device having a first oxide thickness, and a second said transistor device having a second and different oxide thickness. Preferably a cascode based op amp structure is implemented.

Provided is a method and apparatus for reducing flickers of an image sensor capable of reducing line flickers due to a complementary metal-oxide-semiconductor (CMOS) sensor. The method includes: estimating a profile of a light source per line on the basis of information on image frames which are continuously input; filtering information of the estimated profile of the light source with a predetermined bandwidth; normalizing the filtered information of the estimated profile of the light source, and extracting a correction gain per line; and selecting the correction gain per line repeated in units of predetermined frames, and applying the correction gain to an input image signal.

The invention discloses a switch-type operation amplifier with low power consumption, which comprises a switch-type operation amplifying circuit, a common mode feedback circuit for providing a common mode voltage feedback signal to the switch-type operation amplifying circuit and a biasing circuit for providing a biasing voltage signal to the switch-type operation amplifying circuit and the common mode feedback circuit. The switch-type operation amplifier is in a manner of first level current mirror, of which the input level load uses an internal positive feedback structure to improve gain and the output level is in wide amplitude AB type; and while the amplifier is not needed to work, two switch tubes are used for closing the amplifying circuit, the biasing circuit and common mode feedback circuit totally; therefore, the power consumption is greatly reduced, and the switch-type operation amplifier with low power consumption can be widely applied to fields of analogue-digital converters, filters and the like.

The invention discloses a voltage-controlled oscillator with low power dissipation, low noise and high linear gain. The voltage-controlled oscillator comprises a first inductor, a second inductor, a distributed varactor structure circuit, a negative resistance differential pair circuit, a tail current tube circuit and an amplitude detection circuit, wherein the first inductor, the second inductor and the distributed varactor structure circuit are used to form an LC resonance network for generating an oscillating signal of the VCO with low power dissipation, low noise and high linear gain; the negative resistance differential pair circuit is connected with the LC resonance network and is used for providing energy compensation for the LC resonance network; the tail current tube circuit is connected with an output end of the voltage-controlled oscillator, and uses self-biasing to generate a direct current bias voltage to be used as supply voltage for providing direct current for the LC resonance network; the amplitude detection circuit is connected with an output end of the voltage-controlled oscillator for providing bias voltage for the negative resistance differential pair circuit and the tail current tube circuit. The voltage-controlled oscillator of the invention could realize low power dissipation, low noise and high linear gain.

Disclosed are a sensor interface device and an amplifier used in a sensor system. The sensor interface device in one implementation has a first chopper configured to shift input signals of the sensor system from a baseband frequency to a first frequency, an instrumentation amplifier configured to amplify the shifted signals, a bandpass Delta-Sigma modulator configured to digitize the amplified signals, and a second chopper configured to shift the digitized signals from the a first frequency back to the baseband frequency. The instrumentation amplifier removes the DC offset generated from the first chopper and therefore all sources of DC offset are eliminated in this interface device without bandwidth limitation.

The present invention provides a method and apparatus for calibrating a black level in an imager to reduce flicker noise. A first and a second range is set. The first range corresponds to a range that is larger than a noise level at a highest PGA gain. The second range corresponds to a range that is smaller than a level which reduces an ADC dynamic range too much due to a large black level. The ranges may be adjusted to changes in an imager in real time. When the black level is within the second range a determination is made as to whether the black level has been calibrated before. When it has, the DAC output is held constant. Otherwise the DAC code is adjusted such that the black level is moved toward the first range. A small step size is used in adjusting the DAC code in order to reduce flicker. Step sizes may be adjusted according to the black level in relation to the ranges. A small step size is used when the black level is within the second range. A large step size is used when the black level is beyond the second range.

A mixer circuit comprises an input stage arranged to convert an input voltage signal received at an input of the mixer circuit into at least one current signal, and a frequency conversion stage comprising at least one switching element arranged to convert a signal component of the at least one current signal from an input frequency to a output frequency. The input stage comprises at least one resistance connected between the input of the mixer circuit and the at least one switching element. The at least one switching element and the at least one resistance are arranged such that the at least one switching element comprises a ‘turn-on’ resistance that exhibits a resistivity that is a factor less than the at least one resistance connected thereto.

The present abstract discloses a CMOS bandgap reference source circuit, comprising a startup circuit, a power-off control circuit, a reference voltage generating circuit and an operational amplifier. The positive and a negative input terminal of the operational amplifier both consist of two same field effect transistors and both are provided with an input controlled switch; by doing so, two field effect transistors in the positive terminal and two field effect transistors in the negative terminal work alternately between their strong inversion and cut-off region so as to drastically reduce the noises of the reference circuit, which results originally from the flicker noises of two input transistors of the operational amplifier.

A mixer arrangement includes a mixer cell coupled by a signal input to a mixer input, and is embodied for frequency conversion of a signal present on the input side to an intermediate frequency. A first current source is coupled to the signal input of the mixer cell, and a second current source is coupled to a signal output of the mixer cell. The mixer arrangement furthermore includes a sensor circuit embodied for detection and for outputting of a value which is derived from a current of one of the current sources. A desired value regulating circuit is coupled by a feedback input to the sensor circuit and is designed for outputting a regulating signal to the one current source derived from a comparison of a signal present at a feedback input with a desired value.

A multi-bit sigma-delta analog-to-digital converter (ADC) has a single-ended input for receiving an analog input signal. A multi-bit feedback current digital-to-analog converter (IDAC) generates a multi-level feedback current depending on a multibit digital feedback signal from a Flash ADC. The feedback current is summed with the input signal with the feedback current. The summed signal is integrated on a continuous-time basis. The IDAC is selectively connectable to the summing node via a first path and a second path. The first path transmits current from the IDAC to the summing node with a first polarity and the second path transmits current from the IDAC to the summing node with an inverted polarity. This can reduce flicker noise and can allow the converter to operate without any mid-scale biasing current sources.

A mixer circuit comprises an input stage arranged to convert an input voltage signal received at an input of the mixer circuit into at least one current signal, and a frequency conversion stage comprising at least one switching element arranged to convert a signal component of the at least one current signal from an input frequency to a output frequency. The input stage comprises at least one resistance connected between the input of the mixer circuit and the at least one switching element. The at least one switching element and the at least one resistance are arranged such that the at least one switching element comprises a ‘turn-on’ resistance that exhibits a resistivity that is a factor less than the at least one resistance connected thereto.

A band-pass filter made up by an operational amplifier and by an input circuit. The input circuit is formed by a capacitive filtering element, connected to the input of the operational amplifier; a coupling switch, coupled between an input node and the capacitive filtering element; a capacitive sampling element, coupled between the input of the filter and the input node; and a sampling switch, coupled between the input node and a reference-potential line. The coupling switch and the input sampling switch close in phase opposition according to a succession of undesired components sampling and sensing steps, so that the capacitive sampling element forms a sampler for sampling the undesired component in the undesired components sampling step, in the absence of the component of interest, and forms a subtractor of the undesired components from the input signal in the sensing step.

A liquid-crystal-display (LCD) and a display panel thereof are provided. The display panel includes a plurality of pixel row units and a plurality of switch units. Each pixel row unit is connected between a scan line and a potential switch line. The first end of each switch unit receives the common voltage provided by the display panel, and the second end of each switch unit is connected to its corresponding potential switch line. Thus, not only the flicker-noise of the display panel is reduced, but also the display-quality of the LCD is promoted.

The invention provides an adjustable negative resistance structure-based multimode multi-channel mixer, which comprises a radio frequency input circuit, an adjustable negative resistance circuit, a digital control capacitor array circuit and a double-balanced differential structure circuit, wherein two input ports of the radio frequency input circuit are connected with radio frequency signals RF+ and RF-, and an output port of the radio frequency input circuit is directly connected with ports RFout+ and RFout-; the negative resistance size of the adjustable negative resistance circuit is controlled by two levels Vctrll and Vctrl, and an output end of the adjustable negative resistance circuit is connected with the RFout+ and the RFout-; an input port of the digital control capacitor array circuit is controlled by a digital signal, and two output ports of the digital control capacitor array circuit are connected with the RFout+ and the RFout-; and radio frequency current signals are input into the double-balanced differential structure circuit through the RFout+ and the RFout-, and are mixed with local oscillation signals LO+ and LO- to output intermediate-frequency signals IF+ and IF- to be then input into a rear-end module. By the adjustable negative resistance circuit, the equivalent parallel resistance of a capacitor array is eliminated, a noise coefficient is reduced, the gain of an active mixer is improved, the working frequency of the mixer can be controlled by a digital end, and the requirements of a broadband multi-channel system are met.

A quadrature VCO includes two cross-coupled differential pairs, two parallel LC tank circuits, two LO units and a plurality of source followers, supplying by a tail current source and a tail capacitor. The LC tank circuit constitutes of symmetrical spiral inductors and differential varactors, which constitutes of common anode diodes. The quadrature VCO circuitry is implemented on a chip with 2.4 GHz operating frequency. The quadrature VCO generates quadrature LO signals with high phase accuracy and good gain match under low power, good phase noise and small chip area, thus it can be applied to a variety of integrated transceivers.