157 results about "Phase jitter" patented technology

MEMS-based, computer system, clock generation and oscillator circuits and LC-tank apparatus for use therein are provided and which are fabricated using a CMOS-compatible process. A micromachined inductor (L) and a pair of varactors (C) are developed in metal layers on a silicon substrate to realize the high quality factor LC-tank apparatus. This micromachined LC-tank apparatus is incorporated with CMOS transistor circuitry in order to realize a digital, tunable, low phase jitter, and low power clock, or time base, for synchronous integrated circuits. The synthesized clock signal can be divided down with digital circuitry from several GHz to tens of MHz—a systemic approach that substantially improves stability as compared to the state of the art. Advanced circuit design techniques have been utilized to minimize power consumption and mitigate transistor flicker noise upconversion, thus enhancing clock stability.

A fractional-N frequency synthesizer has a VCO with an output for supplying an output signal of a particular frequency, and an input for receipt of a control signal for controlling the operation of the VCO so that it locks in on a reference frequency. Compensation circuitry is coupled to the input for compensating the output signal for phase jitter. The compensation circuitry has a charge pump that supplies a compensation current to the input. The timing is derived from the output signal, thus rendering the compensation current independent of the frequency range of the VCO and of the reference frequency.

The invention discloses a microwave signal optical fiber stationary phase transmission system based on a microwave phase shifter. The system comprises a central station, a far end and a single-mode optical fiber. The central station is connected with the far end through the single-mode optical fiber. The central station is composed of a semiconductor laser device, a dual-drive Mach-Zehnder modulator, a microwave signal source, a first power divider, a first optical filter, an erbium-doped optical fiber amplifier, an optical coupler, a first array waveguide grating, a first photoelectric detector, a frequency eliminator, a second power divider, an optical source, a strength modulator, a second optical filter, an optical circulator, a second photoelectric detector, a first electric mixer, a band-pass filter, a second electric mixer, a low-pass filter and a linear voltage amplification circuit. The far end is composed of a second array waveguide grating, a third photoelectric detector and a Faraday polariscope. According to the invention, the advantage of low building and maintenance cost can be realized; and the phase jitter of microwave signals can be extracted and fed back on a real-time basis.

The invention relates to a device and method for realizing broadband digital magnetic resonance radio frequency receiving. The device comprises a radio frequency receiving signal conditioner, a clock phase jitter suppressor, a high-speed analog to digital converter and a digital down converter, wherein the radio frequency receiving signal conditioner conducts front-end voltage amplification and anti-aliasing filtering for a magnetic resonance signal received by an external device; the clock phase jitter suppressor is used for suppressing phase jitter of a system clock and providing a high-stability clock source in a picosecond or femtosecond order of magnitude for the high-speed analog to digital converter and the digital down converter; the high-speed analog to digital converter is used for realizing digitalized conversion of the radio frequency receiving signal; and the digital down converter is used for conducting orthogonal coherent detection, filtering and frequency down conversion for data output by the high-speed analog to digital converter to obtain broadband data, of a real part and an imaginary part, to be output to the external device. The device can ensure higher channel signal to noise ratio, realizes orthogonal coherent detection and conducts accurate control for nuclear magnetic resonance signal receiving phases. In the process of applying a direct oversampling or undersampling technology, the device can ensure good receiving channel signal to noise ratio and has good instantaneity.

A system and method of estimating random and periodic phase noise components based on measurement of phase jitter in a given signal uses a difference filter to attenuate low frequency random noise components and a process of obtaining timing measurements at a plurality of sampling frequencies in order to de-alias identified noise spurs. Such technology is especially well-suited for devices capable of undersampling a jitter signal, such as continuous time interval analyzers (CTIAs).

A voltage-controlled oscillator device with an LC-resonant circuit, in particular for implementing integrated voltage-controlled oscillators for the lower GHz range, is disclosed. The device achieves continuous frequency tunability in a wide range in particular with a low level of phase noise and phase jitter. In the voltage-controlled oscillator, a second inductor can be periodically switched in parallel and/or in series with at least one first inductor of the LC-resonant circuit by way of a switching means actuated with the oscillator frequency. A control input of the switching means is connected to a variable dc voltage. In that respect the relationship of the duration of the conducting state and the duration of the non-conducting state of the switching means is variable within an oscillation period of the oscillator in dependence on the value of the control voltage. In accordance with the relationship of the duration of the conducting state and the duration of the non-conducting state of the switching means within an oscillation period of the oscillator the time-averaged effective inductance is variable in dependence on the value of the control voltage.

The invention provides a method for improving performances of digital phase-locked loops. The method adds a proportion differential control module, a fuzzy control module and a filter-parameter updating module one by one between a Hilbert phase detector and a loop filter of the conventional phase-locked loop circuit, automatically adjusts parameters of the loop filter according to the output of the phase detector, and then controls loop bandwidth and completes the self-adaptive control of a phase-locked loop so as to increase locking range, reduce locking time and reduce steady-state phase jitter.

The invention provides a stable frequency transmission method and a system. The method includes: generating a stable frequency standard signal in a central station; using a tunable laser to generate an optical carrier; modulating the frequency standard signal to the optical carrier to form an initial optical signal; transmitting the initial optical signal to a far end through an optical fiber; returning a part of the far-end optical signal to the same optical fiber to the central station; demodulating the return optical signal to obtain a return RF signal; comparing the phase difference of the return RF signal and the frequency standard signal; controlling the tunable laser according to the phase difference to change the wavelength of the optical carrier, obtaining a compensated optical carrier, and enabling the sum of the chromatic dispersion delay inequality of the compensated optical carrier and the initial optical carrier and the link delay variation caused by environmental factors of temperature change and vibration to be zero; and demodulating the stabilized far-end optical signal to obtain a far-end RF signal and outputting the far-end RF signal. The stable frequency transmission method uses the optical fiber both as a transmission medium and a compensation device, an additional compensation device does not need to be added to realize a delay/phase jitter compensation process, the system structure is simple, and the practicability is strong.

Synchronization method for a multi-carrier transceiver using a filter bank, for example a cosine modulated filter bank, a wavelet packet filter bank or a complex modulated filter bank, the transceiver comprising a transmitter (100) and a receiver (300) able to communicate with each other over a communication channel (200), the method comprising the following steps: sending a periodic and coded training sequence over the communication channel (200) with the transmitter (100), determining in the receiver (300) time alignment information from the received training sequence, performing a coarse synchronization of the receiver (300) to said transmitter (100) using said time alignment information, sending modulated data (1) in data mode over the communication channel (200) with the transmitter (100), pilot signals being multiplexed into said data (1), tracking sampling frequency offset and phase jitter within the receiver (300) using the pilot signals, performing the continuous synchronization of the transceiver with the help of the tracking information determined in the step of tracking. The invention also relates to a multi-carrier transceiver, consisting of a transmitter (100) and a receiver (300), able to perform this synchronization method.

The present invention provides an optical carrier suppression-based optical fiber distribution system and method of photo-produced microwave signals. The optical carrier suppression-based optical fiber distribution system of the photo-produced microwave signals includes a photo-produced microwave signal module, a phase detection module, a phase compensation module and a system output module; the photo-produced microwave signal module generates signal light which is required to be transmitted to a remote end and local light which serves as reference; the phase detection module detects phase jitter caused by optical fiber link jitter and obtains corresponding phase information; the phase compensation module controls the output of a voltage-controlled oscillator according to the phase information, and performs single-sideband modulation on the microwave signals outputted by a microwave signal generator through the output signals of the voltage-controlled oscillator, and then generates compensation signals; and the system output module outputs signals light which has been subjected to phase compensation. With the system and method of the invention adopted, phase detection sensitivity is increased to a magnitude order of light wavelength; technical difficulty in live operation-based high-frequency microwave mixing can be eliminated; a phase-locked loop is adopted to carry out feedback control on obtained phase error signals; and a phase compensation mechanism is fast and accurate, and is not limited in compensation scope.

The invention discloses a method for detecting a target echo signal of a random-frequency hopping-frequency agility radar. According to the method for detecting the target echo signal of the random-frequency hopping-frequency agility radar, focusing treatment before detection is carried out on a search trajectory, the blind velocity sidelobe problem can be effectively solved, and the false alarm rate of subsequent detection treatment is reduced; by searching in a target motion parameter space, the signal is subjected to phase compensation to realize coherent accumulation, and the method can solve the problems of range migration and inter-pulse phase jitter at the same time; and when narrow source interference exists in a scene, the method can still realize the effective accumulation of thetarget signal energy, so that a target is detected from an interference background.

An oscillator circuit can generate a periodic signal, and a frequency adjustment circuit can adjust the frequency of the periodic signal. The periodic signal may include phase jitter. In one aspect of the invention, the phase jitter may be mitigated by connecting other circuitry to the oscillator circuit and allowing the other circuitry to draw current. In one embodiment, the other circuitry is connected in parallel with the oscillator circuit. In one embodiment, the other circuitry is configured to draw greater current to mitigate more phase jitter and to draw less current to mitigate less phase jitter. In one embodiment, a greater portion of the other circuitry is connected to the oscillator circuit for higher frequencies and a lesser portion of the other circuitry is connected to the oscillator circuit for lower frequencies.

The invention provides a multi-stage framework based OQPSK signal big-frequency-offset carrier synchronization method. The multi-stage framework based OQPSK signal big-frequency-offset carrier synchronization method comprises the steps of performing rough estimation of a carrier frequency by utilizing an iterative time delay multiplication forward frequency estimation method so as to realize rapid locking of the carrier; realizing synchronous estimation of a carrier phase and bit information by adopting a joint estimation method of combining carrier synchronization with bit synchronization for residual frequency offset phase positions; and eliminating 180-degree integral multiple ambiguity problem of the carrier phase by using an unwinding and unfolding method, and realizing precise estimation of the carrier phase by adopting an automatic sliding window accumulation method. The problem of mutual interference between carrier phase synchronization and clock synchronization in existing OQPSK modulation is solved, big-frequency offset rapid capture of the carrier frequency is realized at the same time, and extremely small phase jitter exists after the capture.

In a clock generation circuit generating a clock that is synchronized with a reference signal, it is an object to provide stable clocks by controlling phase jitter in a generated clock upon change of the reference signal, eliminate a stable-state phase difference between the reference signal and the generated clock so that control is eliminated, and allow the clock generation circuit to be integrated. The clock generation circuit is configured with multiple stages of PLL circuits such that PLL circuits 2 are provided for reference signals 1, respectively, and one of outputs from the PLL circuits 2 is selected to be fed to a PLL circuit 5 provided in a next stage. The phase fluctuation of a signal inputted to the PLL circuit 5 upon change of the reference signal 1 is reduced to control the phase jitter of the generated clock 6, thus allowing high loop gain in both the PLL circuit 2 and the PLL circuit 5. Then, phase difference between the reference signal 1 and the generated clock 6 is eliminated to eliminate control involved, so that the clock generation circuit may be integrated.

A phase rotator generates an output signal having plurality of possible output phases with reduced phase jitter. The low jitter phase rotator includes a plurality of differential amplifiers configured to receive a plurality of input differential signals having different phases, and configured to generate a plurality of weighted signals responsive to the plurality of input differential signals. A plurality of digital-to-analog converters (DAC) are arranged into a plurality of groups, each group of DACs configured to provide current for one of the corresponding differential amplifiers. The number of active DACs in each group of DACs determines a relative weighting of the weighted signals, where relative weighting determining an output phase of an output signal of the phase rotator. The DACs are configured to adjust the output phase of the phase rotator. At a k^th phase, N/4 adjacent DACs are activated that are indexed as m₀, m₁, . . . m_((N/4)−1), wherein N is the number of said plurality of DACs. At (k+1)^th phase, a m_(N/4)DAC is activated that is adjacent to the m_((N/4)−1) DAC. At (k+2)^th phase, the m₀ DAC is de-activated.