40 results about "Phase jitter" patented technology

The invention relates to the technical field of high-frequency signal modulation, and discloses a high-frequency carrier synchronization signal modulation system. A carrier distortion compensation module of the system constructs a model based on a historical transmission data set, captures a phase jitter parameter, a spectrum leakage component and a modulation pulse sequence of a transmitting end carrier in real time, and outputs a reconstructed baseband parameter; the multi-dimensional distortion analysis module compares the reconstructed baseband parameter with a receiving end demodulation baseband parameter through composite difference detection, and generates a channel-level distortion coefficient tensor; the topological positioning network module is used for positioning signal out-of-step physical nodes and generating a probability distribution thermodynamic diagram by combining impedance characteristics of transmission nodes and signal path delay information; and the adaptive modulation strategy module starts a multi-band carrier injection mode for the high-probability out-of-step nodes according to the abnormal probability gradient of the thermodynamic diagram, and applies a phase disturbance test to adjacent transmission links. The system can improve the adaptability and accuracy of high-frequency carrier signal synchronous modulation.

The invention relates to the technical field of communication, and discloses a network communication chip signal interference suppression processing method. The method comprises the following steps: acquiring a local oscillator phase jitter sequence in real time through an on-chip phase noise monitoring unit; estimating Doppler frequency shift and channel coherence time based on the sequence; dynamically adjusting the closed-loop bandwidth of the phase-locked loop; and generating a phase compensation signal, and performing time-varying channel minimum mean square error equalization in combination with a received baseband signal to eliminate inter-symbol interference. The system integrates a phase noise monitoring function module, a channel parameter estimation function module, a phase-locked loop bandwidth regulation function module, a phase compensation generation function module and an interference joint elimination function module. By means of dynamic bandwidth reconstruction and high-precision phase compensation, the bit error rate under high-speed movement is remarkably reduced, the 5G millimeter wave communication standard requirement is met, and the method has the advantages of being achieved on a whole chip, low in delay and high in robustness.

The invention discloses a multi-entropy source dynamic fusion true random number hardware generation system, which comprises a multi-entropy source acquisition module used for acquiring original entropy signals generated by at least two heterogeneous physical entropy sources in parallel, the heterogeneous physical entropy sources comprising an entropy source based on semiconductor junction thermal noise and an entropy source based on ring oscillator phase jitter; the entropy preprocessing module is used for carrying out adaptive gain adjustment and frequency band filtering on each original entropy signal and converting the original entropy signals into digital bit streams; the entropy source quality evaluation module is used for receiving each digital bit stream in real time and calculating a real-time quality evaluation score of each entropy source based on statistical characteristics of the digital bit streams, i is an entropy source identifier, and t is a time sequence; according to the method, the high randomness, high safety and high reliability of true random number generation can be fundamentally improved.

The invention relates to the technical field of blood transfusion pipeline detection, and discloses a blood transfusion pipeline jitter detection method based on an intelligent sensor. According to the method, an initial control instruction generation layer receives an operation instruction, and a natural language analysis unit identifies a pipeline number and a preset jitter threshold parameter; the multi-mode signal detection layer collects pressure waveform signals and three-dimensional motion track signals of a blood transfusion pipeline in real time, and establishes a feature matching database to store reference signal feature combinations corresponding to different pipeline models. The dynamic mapping layer combines the real-time detection signal features with the reference signal features to perform similarity matching; the double-domain interpolation calculation layer generates an anti-jitter control parameter according to a matching result; the anti-phase jitter elimination execution layer outputs a phase compensation instruction according to the anti-jitter control parameters; the parameter optimization layer updates a feature matching database according to the historical jitter residual volume data; and the abnormal decision-making layer judges an unrestrained jitter state and triggers an alarm protocol, and also implements a full-period updating mechanism to refresh a reference signal feature combination.

The invention discloses a scene interference method and device based on pseudo-fuzzy echoes, and the method comprises the steps: obtaining the working mode parameter data of a target object, and constructing a target object parameter database; based on the target object parameter database, processing large-scene image data of a target area to obtain a target pseudo-fuzzy echo interference database; processing target area signal data based on the target pseudo-fuzzy echo interference database to obtain target online interference data; and regulating and controlling the target online interference data to obtain a target online interference signal and transmitting the target online interference signal to a target area. According to the invention, phase jitter is compensated, the influence of phase jitter on interference signals is solved, the physical generation effect of pseudo-fuzzy echoes is guaranteed, and effective interference on a non-cooperative SAR platform is realized.

The invention discloses a high-precision active receiving link phase jitter measurement method, which comprises the following steps of: measuring the phase of the same point frequency signal for multiple times by using an active receiving link, counting a measurement result, obtaining a phase jitter result, analyzing the signal-to-noise ratio of the point frequency signal received by the active receiving link, and calculating the signal phase jitter caused by noise corresponding to the signal-to-noise ratio by using a Cramer-Rao bound formula. And deducting phase jitter caused by noise from a statistical result of dot frequency signal phase measurement to realize accurate measurement of the phase jitter by the active receiving link.

The invention provides an extended target phase offset coherent waveform design and efficient accumulation method. The method comprises the following steps: acquiring a pulse signal of a JFPA waveform received by a target, returning echo signals of a plurality of extended targets, and searching a target coarse velocity by using a minimum envelope entropy, constructing a matching function to perform motion compensation on the echo signal to obtain a two-dimensional time domain signal; taking the jitter initial phase of the echo signal corresponding to the reference waveform as a matched filter, and compensating the jitter initial phase of the echo signal corresponding to the coherent accumulation waveform; and designing the echo signal after initial compensation as a coherent echo signal, and performing Fourier transform on the coherent echo signal along slow time to obtain a coherent accumulation result of the target. According to the method, accurate initial phase jitter compensation is completed without target distance information, the method is suitable for an extended target, and after the echo signal of the JFPA waveform is subjected to initial phase jitter compensation, the phase is controlled to be uniform, so that the complexity of FFT coherent processing can be reduced.

The application relates to the technical field of underwater communication and signal processing, and provides an anti-interference method for underwater power carrier communication, which comprises the following steps: acquiring a power carrier time-frequency signal received by an SRM and synchronously collecting a control instruction stream, wherein the power carrier time-frequency signal is an OFDM signal; determining a state perception weight matrix based on a relay action time window, wherein the relay action time window is determined based on the control instruction stream; determining a joint optimization problem provided with a phase distortion correction operator based on the power carrier time-frequency signal, the state perception weight matrix and a frequency domain confidence matrix in combination with a double-weighted robust principal component analysis algorithm, wherein the frequency domain confidence matrix is determined based on the high-frequency attenuation characteristics of an underwater umbilical cable; and solving the joint optimization problem based on a linearized alternating direction multiplier method to determine a target power carrier signal. The application solves the problem that reliable communication cannot be realized under the double constraints of strong interference and severe phase jitter in the related art.

The invention discloses a multi-mode control switching method for a robot servo system, relates to the technical field of control switching, and is used for solving the problem that the control quantity received by an execution layer at the moment of control mode switching is discontinuous. Collecting a control instruction output frequency of a current control mode controller, calculating an output stability factor based on an output frequency sequence, and when the output stability is insufficient, introducing a log write-in proportion of a control software operation level and calculating a phase jitter density; the mode switching process is subjected to conjoint analysis from the two sides of control output behavior and software state activity, the switching impact time delay is calculated by combining the historical instantaneous switching behavior characteristics of the mode to be switched and the amplitude limiting trigger duration of the controller, the default transition duration interval is subjected to targeted adjustment, and the mode switching time delay is calculated. And the mode switching smoothness and the operation reliability in a complex operation scene are improved.

The invention discloses an indoor positioning method and system, and the method comprises the following steps: carrying out the enhancement processing of original IQ in-phase orthogonal signals collected by multiple antennas through a lightweight neural network, and outputting an anti-multipath interference enhanced IQ signal matrix; and constructing a covariance matrix based on the enhanced signal matrix, and calculating an azimuth angle and a pitch angle by using a MUSIC multiple signal classification algorithm. According to the invention, multipath interference can be effectively suppressed, phase jitter is eliminated, multichannel feature fusion is realized, and the accuracy of indoor positioning is improved.

This invention discloses a multi-mode control switching method for robot servo systems, relating to the field of control switching technology. It addresses the problem of discontinuous control quantities received by the execution layer during control mode switching. By identifying that the robot is in a control mode switching state, the method collects the output frequency of the controller's control commands for the current control mode and calculates an output stability factor based on the output frequency sequence. When output stability is insufficient, it introduces the log writing ratio at the control software runtime level and calculates the phase jitter density. The method jointly analyzes the mode switching process from two perspectives: control output behavior and software state activity. Combining the historical instantaneous switching behavior characteristics of the mode to be switched with the controller's limiting trigger duration, it calculates the switching impact delay and adjusts the default transition duration range accordingly, improving the smoothness and reliability of mode switching in complex operating scenarios.

The invention provides a double-feedback integral bit synchronization ring and a bit synchronization method of a digital communication system. The method comprises the following steps: simultaneously triggering a filtering feedback loop and a threshold feedback loop to independently generate a filtering feedback ring local bit synchronization signal clock signal and a threshold feedback ring local bit synchronization signal clock signal according to a local clock and an input signal; and according to the state of the filtering feedback loop, one path is correspondingly selected for output. Therefore, according to the invention, the condition that the threshold feedback loop may not converge due to inaccurate setting of the threshold value can be avoided by using the filtering feedback loop; and correspondingly, after the filtering feedback loop succeeds in capturing and enters the phase-locked state, the filtering feedback loop is switched to the synchronous clock of the threshold feedback loop, so that the problem of phase jitter caused by continuous use of the filtering feedback loop in the phase-locked state is avoided through the threshold feedback loop.

The present application relates to a kind of system for realizing large-scale MIMO transceiver phase calibration function, including MIMO transceiver, signal source and vector network analyzer, when the transmitting phase of MIMO transceiver is calibrated, the output end of signal source is connected with first port, and transmitting channel TX1-TXn of MIMO transceiver is connected to second port one by one;When the receiving phase of MIMO transceiver is calibrated, one-way output of two-way power divider is connected to first port, and other-way output is connected to receiving channel RX1-RXn of MIMO transceiver one by one.The present application also relates to a kind of method for realizing large-scale MIMO transceiver phase calibration processing, device, processor and storage medium.The system for realizing large-scale MIMO transceiver phase calibration function, method, device, processor and its computer readable storage medium of the present application solve that the phase error caused by large-scale MIMO system itself reference channel phase jitter is larger, and the reliability problem of phase calibration value, ensure the phase consistency of large-scale MIMO transceiver system.

The invention provides an AC voltage phase jitter error compensation system and method based on differential sampling, and the system is characterized in that a to-be-detected AC source is connected with one side of a self-made double-pole double-throw switch; the common end of the double-pole-double-throw switch is connected with the low end of the digital-to-analog conversion board card serving as the voltage standard and the low end of the transformed sampling voltmeter. Two groups of reference signals sent by the rubidium clock are respectively connected to external reference clocks of the two groups of arbitrary waveform generators and external reference signals of the digital-to-analog conversion board card through the self-made optical isolator; the group of arbitrary waveform generators are respectively connected with an external phase-locked end of the AC signal calibration source to be tested, the transformed sampling voltmeter and a trigger signal end of the standard digital-to-analog conversion board card through three optical isolators; and the other group of arbitrary waveform generator is connected with an external reference signal end of the sampling voltmeter through a self-made optical isolator. According to the invention, measurement errors caused by phase jitter can be effectively compensated, so that the accuracy of high-frequency AC voltage magnitude transmission is improved.

The invention discloses a hydrogen power supply DCDC converter control method comprising the following steps: carrying out signal decomposition processing on a converter output current signal to generate signal characteristics representing transient and steady state characteristics; performing phase tracking and control according to the signal characteristics to generate a target phase; based on the signal characteristics and the target phase, performing self-learning optimization on a pre-configured control parameter model, and generating control parameters adaptive to the system state; and generating a PWM control signal in combination with the target phase and the control parameter. The technical problems such as phase jitter caused by bubble burst transient interference and parameter space non-uniformity under the temperature gradient are solved, and the efficiency and stability of a hydrogen production system are improved.

The application discloses a low-voltage power supply pile management method and system, relates to the technical field of intelligent power supply pile management, and samples through a signal sampling and processing module at a high frequency greater than 50 kHz, and constructs an original current set and a preprocessing set, so that subtle disturbances and nonlinear fluctuation characteristics in a power supply process can be accurately captured, the technical limitation that only 'exceeding the limit can be identified' is broken from the root, and the capacity of discovering abnormal signal rudiment in advance is possessed. The ripple feature extraction module constructed by the system not only identifies the ripple density change in the current, but also fuses information in multiple dimensions such as frequency spectrum energy discreteness and phase jitter intensity, and forms a micro-disturbance feature set. Different from the traditional method of only paying attention to the mean value or the peak value, the system identifies the structural change and the continuity change of the disturbance through multiple angles, greatly enhances the identification capacity of the system to the implicit problem in the complex disturbance scene, and improves the resolution and sensitivity of the electrical behavior identification.

The invention relates to the technical field of clocks, and provides a data acquisition and training method and device suitable for short-term clock error prediction, and the method comprises the steps: constructing a time difference sample set through employing a digital double-mixing time difference method; and training a clock error prediction model by using the time difference sample set. According to the method, high-resolution and high-precision time difference measurement is realized by using a digital double-mixing time difference method, so that the time difference capable of reflecting change characteristics such as frequency fluctuation and phase jitter of the clock in a short period is obtained, the training of a subsequent clock error prediction model is facilitated, and finally, the precision and the stability of short-term clock error prediction are remarkably improved.

The application discloses a PXI vector network analyzer multi-module synchronization system based on FPGA, relates to the technical field of communication testing, and comprises a master module and at least one slave module, both of which are configured with FPGA control units; the master module FPGA transmits its system clock to the slave module through a cascade line, serving as the system clock of the slave module; before starting measurement, the master module sends a synchronization request instruction; after all the slave modules feedback that the instruction is received, the measurement is started synchronously; after starting measurement, the master module sends a data acquisition request instruction when the ADC sampling is satisfied; after all the slave modules feedback that the request is ended, the data acquisition operation of the master module and all the slave modules is started synchronously; the master module ADC clock is phase-locked and synchronized with the system clock of the master module as a reference clock, and the slave module ADC clock is phase-locked and synchronized with the system clock transmitted by the master module as a reference clock. The application effectively solves the problems of unstable amplitude and phase jitter caused by different clock frequencies and asynchronous measurement and data acquisition in the traditional multi-module cascade.

The embodiment of the invention provides a random number generation circuit, a chip and a chip module. The circuit comprises a plurality of delay units and an output unit, the plurality of delay units are connected in series to form an annular loop and used for generating oscillation signals, and for each delay unit in the plurality of delay units, the first input end of the delay unit is connected with the output end of the last-stage delay unit of the delay unit, and the second input end of the delay unit is connected with the output end of the last-stage delay unit. The output end of each delay unit is connected with the first input end of the next-stage delay unit, the second input end of each delay unit is connected with the output end of the next-stage delay unit, and the output unit is connected with the output ends of the delay units and used for outputting random numbers according to output signals of the delay units. According to the circuit provided by the embodiment of the invention, by introducing a local feedback mechanism for feeding back the output of the latter stage of delay unit to the former stage of delay unit, multi-stage immediate feedback and efficient collection and amplification of phase jitter can be realized, the entropy of an output signal is remarkably improved, and the quality of a random number is improved.

A method for measuring the phase jitter and phase noise of a signal-under-test (SUT) includes providing first and second oscilloscopes each having a timebase reference oscillator, the timebase reference oscillator of each of the first and second oscilloscopes configured to generate a timebase reference signal of a given output frequency. The method further comprises phase-locking the timebase reference oscillators of the first and second oscilloscopes together, applying the SUT to an input channel of the first oscilloscope and to an input channel of the second oscilloscope, and generating a first phase jitter measurement of the SUT using the first oscilloscope and generating a second phase jitter measurement of the SUT using the second oscilloscope. The method still further includes obtaining the phase noise of the SUT from the first and second phase jitter measurements to obtain the phase noise of the SUT.

This invention provides an active suppression method and system for background noise of partial discharge (PD) UHF signals. The method includes: determining the placement positions of a UHF sensor and a noise sensor on the outer wall of a GIS (Gas-Insulated Structure) device; acquiring the mixed noise PD signal using the UHF sensor; acquiring the noise signal using the noise sensor after determining the minimum acquisition period; inputting the acquired noise signal into a spectrum analyzer for spectrum analysis; extracting the obvious narrowband noise frequency band in the frequency domain, determining its frequency band and phase jitter; and actively suppressing narrowband noise in the frequency band where narrowband noise exists using a narrowband noise interference suppression formula. This invention solves the technical problem of poor applicability to narrowband interference from PD UHF signals of GIS equipment in field environments, which restricts the accuracy and reliability of interference suppression.

The invention relates to the cross technical field of integrated circuits and neural engineering, discloses an in-memory adaptive clock synchronization method and chip for a multi-mode brain-computer interface signal, and aims to solve the problems of large phase jitter, high power consumption and slow dynamic response caused by large sampling rate difference and dependence on an external non-adaptive phase-locked loop in the prior art. According to the method, instantaneous energy features of high-frequency electroencephalogram signals are extracted in real time in a storage and calculation integrated feature extraction array, phase adjustment control signals are generated through an energy-to-phase module, and a local ring oscillator is dynamically adjusted to generate a self-adaptive low-frequency sampling clock which is used for triggering sampling of low-frequency near-infrared spectrum signals and binding a high-precision timestamp. The system comprises a near infrared spectrum signal acquisition module, a storage and calculation integrated feature extraction array, an energy-to-phase module, a digital control ring oscillator, a timestamp generation module and a state synchronization control module. According to the invention, through a storage and calculation integrated closed-loop feedback mechanism, sub-picosecond-level synchronization precision, ultra-low power consumption and high-sensitivity response to key neural events are realized.

The invention discloses an intelligent fine management method and system for a low-voltage power supply pile, and relates to the technical field of intelligent management of power supply piles, sampling is carried out at a high frequency greater than 50kHz through a signal sampling and processing module, and an original current set and a preprocessing set are constructed, so that fine disturbance and nonlinear fluctuation characteristics in a power supply process can be accurately captured; the technical limitation that identification can only be carried out after over-limit is broken from the source, and the method has the capability of finding abnormal signal prototypes in advance. A ripple feature extraction module constructed by the system not only identifies the ripple density change in the current, but also fuses information of multiple dimensions such as spectrum energy discreteness and phase jitter intensity to form a micro-perturbation feature set. Different from a traditional method of only paying attention to a mean value or a peak value, the system recognizes structural and continuous changes of disturbance in a multi-angle mode, the recognition capacity of the system for hidden problems in a complex disturbance scene is greatly improved, and the resolution ratio and sensitivity of electrical behavior recognition are improved.

A method and system for measuring the phase jitter and phase noise of a signal under test (SUT) comprise providing a first and a second oscilloscope, each having a time-base reference oscillator, wherein the time-base reference oscillator of each of the first and second oscilloscopes is configured to generate a time-base reference signal with a specified output frequency. The method further comprises phase-locking the time-base reference oscillators of the first and second oscilloscopes with respect to each other, applying the SUT to an input channel of the first oscilloscope and to an input channel of the second oscilloscope, and generating a first phase jitter measurement of the SUT using the first oscilloscope and generating a second phase jitter measurement of the SUT using the second oscilloscope.The procedure also includes obtaining phase jitter and phase noise of the SUT from the first and second phase jitter measurements in order to obtain the phase noise of the SUT.

The invention discloses a ring oscillator based on multi-phase coupling calibration, which belongs to the technical field of radio frequency integrated circuit design and comprises three mutually coupled oscillation loops based on three-stage delay units and calibration loops among the oscillation loops. In the structure, an input node of a delay unit of each oscillation loop is connected with a calibration unit of a calibration loop, when phases at two ends of the calibration unit are inconsistent, oscillation loop current is redistributed through the calibration unit, and phase alignment is realized through a current real-time compensation mechanism; after the three oscillation loops are mutually coupled, phase jitter caused by external noise disturbance of any oscillation loop can be fed back to the other two oscillation loops through the calibration loop, so that automatic compensation and equalization of phase errors are realized in the whole system, and the phase noise of each oscillation loop is effectively reduced. Meanwhile, the dynamic phase calibration mechanism of the three oscillation loops significantly enhances the single event effect resistance of the circuit.

The present invention provides a method for actively suppressing narrowband interference from partial discharge ultrasonic signals. The method comprises: determining the placement of ultrasonic sensors and noise sensors on the outer wall of a GIS; collecting partial discharge signals using the ultrasonic sensors in a laboratory environment; collecting partial discharge ultrasonic signals mixed with noise using the ultrasonic sensors in a field environment; collecting noise signals using the noise sensors; inputting the collected noise signals into a spectrum analyzer for spectrum analysis; extracting significant narrowband noise frequency bands in the frequency domain to determine their frequency bands and phase jitter; and actively suppressing narrowband noise in frequency bands where narrowband noise exists using a narrowband noise interference suppression formula. The present invention proposes a method for actively suppressing narrowband interference from ultrasonic partial discharge signals of GIS equipment in a field environment, ensuring the accuracy and reliability of interference suppression.

The application relates to the field of communication technology and discloses a network communication chip signal interference suppression processing method.The method comprises the following steps: collecting a local oscillator phase jitter sequence in real time through an on-chip phase noise monitoring unit; estimating a Doppler frequency shift and a channel coherence time based on the sequence; dynamically adjusting a phase-locked loop closed loop bandwidth; generating a phase compensation signal and jointly performing time-varying channel minimum mean square error equalization on the received baseband signal to eliminate inter-symbol interference.The system integrates five function modules of phase noise monitoring, channel parameter estimation, phase-locked loop bandwidth regulation, phase compensation generation and interference joint elimination.The application significantly reduces the bit error rate under high-speed movement through dynamic bandwidth reconstruction and high-precision phase compensation, meets the requirements of the 5G millimeter wave communication standard, and has the advantages of full-chip implementation, low delay and high robustness.

The application provides a double feedback integral type bit synchronization loop and bit synchronization method of a digital communication system, which triggers a filter feedback loop and a threshold feedback loop to independently generate a filter feedback loop local bit synchronization signal clock signal and a threshold feedback loop local bit synchronization signal clock signal according to a local clock and an input signal; and then selects one of the outputs according to the state of the filter feedback loop. Thus, the application can use the filter feedback loop to avoid the possible non-convergence of the threshold feedback loop caused by inaccurate threshold setting; and correspondingly, after the filter feedback loop successfully captures and enters a phase-locked state, the synchronization clock of the threshold feedback loop is switched, so that the phase jitter problem caused by the continued use of the filter feedback loop in the phase-locked state is avoided through the threshold feedback loop.

The application aims at solving the technical problem that the time resolution of the system is difficult to break through the technical barrier of 100 femtoseconds due to the phase jitter between the radio frequency field and the pump laser in the prior art, and providing an ultrafast electron pulse non-jitter static magnetic time compression device and compression method; the device comprises a femtosecond laser, an ultrafast electron gun, an electron beam collimation transmission assembly, an Omega type static magnetic time compression assembly, an electron beam aberration correction and final stage focusing assembly and a sample cavity which are sequentially arranged on the light output path of the femtosecond laser; the Omega type static magnetic time compression assembly is used for introducing an energy related time delay to the ultrafast electron pulse, compensating the initial time chirp of the electron pulse, and compressing the pulse width of the ultrafast electron pulse to below 100 femtoseconds. In the process of electron pulse acceleration and pulse compression, the device does not need to consider the time jitter between the radio frequency field and the femtosecond laser, and can maximize the time resolution of the ultrafast characterization instrument.

The invention provides a flexible DC power transmission control protection system and a communication control method thereof, and the method comprises the steps: carrying out the local clock reference configuration based on the transmission demands of to-be-transmitted data in the flexible DC power transmission control protection system, and determining the transmission frame gap of the to-be-transmitted data in the Ethernet; generating a plurality of data frames based on the to-be-transmitted data in combination with the frame gap and a preset frame structure; bypassing a TCP / IP (Transmission Control Protocol / Internet Protocol) protocol stack, and packaging the plurality of data frames into a plurality of corresponding transmission frames through a naked MAC (Media Access Control) frame injection and static MAC binding mechanism; and scheduling and transmitting the plurality of transmission frames by adopting a time sequence control mechanism. Through clock reference configuration and a frame gap, a plurality of data frames are enabled to pass through a naked MAC frame injection and static MAC binding mechanism, so that formed transmission frame time sequences are the same, transmission of the transmission frames is enabled to be stable, signal rising / falling edge time sequence offset caused by clock phase jitter can be overcome, a sampling point of a receiving end is enabled not to be deviated, and error rate is reduced.