37results about How to "Variation in resistance" patented technology

The present invention provides a semiconductor device which includes a thin film transistor as a resistance element, wherein a variation in resistance of the thin film transistor is suppressed without increasing an area of the resistance element and the resistance element can be produced through simplified production steps. The semiconductor device of the present invention is a semiconductor device including a first thin film transistor and a second thin film transistor on a substrate, the first thin film transistor being used as a resistance element, the second thin film transistor including a semiconductor layer having a low concentration drain region and a high concentration drain region, the low concentration drain region and the high concentration drain region being different in impurity concentration, wherein an impurity concentration of a channel region of a semiconductor layer in the first thin film transistor is the same as an impurity concentration of the low concentration drain region of the semiconductor layer in the second thin film transistor.

The switching element of the present invention includes: an ion conduction layer (4) in which metal ions can move freely; a first electrode (1) that contacts the ion conduction layer (4); and a second electrode (2) that contacts the ion conduction layer (4), that is formed such that the ion conduction layer (4) is interposed between the first electrode (1) and the second electrode (2), and that supplies metal ions to the ion conduction layer (4) or that receives metal ions from the ion conduction layer (4) to cause precipitation of the metal that corresponds to the metal ions. An introduction path (5) composed of the metal and of a prescribed width is further provided on the ion conduction layer (4) for electrically connecting the first electrode (1) and the second electrode (2). The application of voltage to the first electrode (1) relative to the second electrode (2) then causes an electrochemical reaction between the introduction path (5) and the second electrode (2) whereby the electrical characteristics are switched.

A piezoelectric thin film resonator which can reduce variations in resonant frequency and resonant resistance by uniformly planarizing a structural film, and a method of manufacturing the piezoelectric thin film resonator. The piezoelectric thin film resonator has a substrate having at least one flat major surface; a dielectric film having two support portions supported by the major surface of the substrate and a floating portion which is connected to the support portions and which is disposed over the major surface of the substrate with an airspace layer provided therebetween; and a vibration portion which is formed of a pair of electrodes and a piezoelectric thin film provided therebetween and which is provided on the floating portion of the dielectric film at a side opposite to the airspace layer. A surface of the dielectric film at a side opposite to the substrate is planarized by a plasma treatment using an inert gas or a gas containing an element forming a dielectric film.

Interconnect structures possessing a non-porous (dense) low-k organosilicate glass (OSG) film utilizing a porous low-k OSG film as an etch stop layer or a porous low-k OSG film using a non-porous OSG film as a hardmask for use in semiconductor devices are provided herein. The novel interconnect structures are capable of delivering improved device performance, functionality and reliability owing to the reduced effective dielectric constant of the stack compared with that of those conventionally employed and also because of the relatively uniform line heights made feasible by these unique and seemingly counterintuitive features. The present invention also provides a fluorocarbon-based dual damascene etch process that achieves selective etching of a dense low-k OSG films relative to that of a porous low-k OSG film owing to the tunability of the gas-phase fluorine:carbon ratio (gas dissociation) and ion current below a critical threshold and given the larger carbon content of the porous film relative to that of the dense film.

A laminated body and fabrication method thereof, which allow space saving and control of variation in internal layer resistance, are provided. When forming an internal-layer resistive element 7 in a multilayer ceramic substrate 10, the internal-layer resistive element 7 is connected to exterior electrodes (an upper surface electrode 32 and an undersurface electrode 34) via multiple via-electrodes 3a and 3b arranged in parallel, without a pad electrode adopted in the conventional laminated body. Moreover, in a multilayer ceramic substrate having multiple internal-layer resistive elements arranged in a multilayer structure, multiple internal-layer resistive elements are directly connected via multiple via-electrodes arranged in parallel.

Fused and cast refractory product including on oxides basis in percent by weight and for a total of 100%: ZrO2+HfO2 complement to 100%; 3.5% to 6.0% SiO2; 0.7% to 1.5% Al2O3; 0.10% to 0.43% Na2O+K2O; 0.05% to 0.80% B2O3; less than 0.4% CaO+SrO+MgO+ZnO; less than 0.05% P2O5; less than 0.55% Fe2O3+TiO2; less than 1.5% other species. The ratio of percentages by weight of Al2O3 / (Na2O+K2O) being greater than or equal to 3.5 and the ratio of percentages by weight of B2O3 / (Na2O+K2O) being between 0.3 and 2.5.

A single package magnetoresistive angle sensor for use in measuring rotation angle of a magnet is disclosed. The magnetoresistive angle sensor comprises a pair of magnetoresistive sensor chips, wherein one of the chips is rotated by 180-degree rotation relative to the other. The magnetoresistive sensor chips are attached to a standard semiconductor package lead frame to form a single-axis push-pull full-bridge sensor. Each of the magnetoresistive sensor chips comprises a pair of magnetoresistance sensor arms. Each magnetoresistive sensor arm comprises one or more GMR or MTJ sensor elements. The GMR of MTR sensor elements utilize a pined layer. The element blocks of the magnetoresistive sensor electrically are interconnected and connected to the package leads by wirebonding. The magnetoresistive angle sensor can be packaged into various standard semiconductor package designs. Also, provided is a dual-axis push-pull full-bridge magnetoresistive angle sensor comprised of two pairs of magnetoresistive sensor chips.

To provide a semiconductor device having a structure free from variations in resistance even when a stress is applied thereto; and a manufacturing method of the device. The semiconductor device has a metal resistor layer in a region between a passivation film and an uppermost level aluminum interconnect. This makes it possible to realize a high-precision resistor having few variations in resistance due to a mold stress that occurs in a packaging step or thereafter and therefore, makes it possible to form a high-precision analog circuit.

A non-aqueous electrolyte secondary battery includes a housing, a stack-type electrode array accommodated in the housing, and an electrolyte solution. The electrolyte solution includes an infiltrated portion infiltrated into the stack-type electrode array and an excess portion other than the infiltrated portion. In a set-up state that the non-aqueous electrolyte secondary battery is arranged such that a direction of stack of the stack-type electrode array is orthogonal to a vertical direction, a lower end of the separator projects below lower ends of the positive electrode and the negative electrode. In the set-up state, within a range of an operating state of charge, a projecting portion of any of the plurality separators is always in contact with the excess portion and the plurality of positive electrodes and the plurality of negative electrodes are not in contact with the excess portion at any time.